Abstract: A method to provide a ground point for second, or subsequent, e-beam mask-writing steps by selectively removing the photoresist edge bead of a photomask substrate to expose the underlying chrome layer. The selective removal leaves at least one tab of photoresist edge bead over the chrome layer. After the first e-beam mask writing step and subsequent etch, the tab can be removed to expose a portion of the chromium layer that can act as a new ground point for a second e-beam etch. Also, a nozzle for use in selectively removing the edge bead to leave a tab of photoresist edge bead.

Abstract: A method and apparatus for baking a film onto a substrate. A film, such as a layer of photoresist, is disposed on a first surface of a substrate while a second surface is exposed to a liquid bath. The liquid bath is maintained at a pre-selected temperature. Exposure of the substrate to the liquid bath allows the film on the opposite surface to bake. The liquid bath is then re-circulated to maintain a constant and uniform temperature gradient across the substrate.

Abstract: The present invention provides an attenuated phase shift mask (“APSM”) that, in each embodiment, includes completely transmissive regions sized and shaped to define desired semiconductor device features, slightly attenuated regions at the edges of the completely transmissive regions corresponding to isolated device features, highly attenuated regions at the edges of completely transmissive regions corresponding to closely spaced or nested device features, and completely opaque areas where it is desirable to block transmission of all radiation through the APSM. The present invention further provides methods for fabricating the APSMs according to the present invention.

Abstract: A method and apparatus for baking a film onto a substrate. A film, such as a layer of photoresist, is disposed on a first surface of a substrate while a second surface is exposed to a liquid bath. The liquid bath is maintained at a pre-selected temperature. Exposure of the substrate to the liquid bath allows the film on the opposite surface to bake. The liquid bath is then re-circulated to maintain a constant and uniform temperature gradient across the substrate.

Abstract: A device for wet processing of a semiconductor-containing substrate that addresses contamination in the wet process by removing undesired sources of gas contamination, the method involving pumping a processing liquid through a degasifier, exposing the semiconductor wafer, in a vessel, to the degasified processing liquid; and optionally recirculating the processing liquid through the degasifier and back into the vessel.

Abstract: Structures and methods are provided for shielding field emitter devices from radiation. In an embodiment, a shielding layer inhibits radiation from degrading field emitter devices while exerting a predetermined force upon the field emitter devices so as to restrain from damaging the structure or affecting performance of the devices. In an embodiment, the field emitter under the protection of the shielding layer sustains structural equilibrium. In an embodiment, the field emitter sustains structural elasticity. In an embodiment, the shielding layer is comprised of tetratantalum boride, which inhibits radiation from degrading field emitter devices while exerting a predetermined force upon the field emitter devices so as to restrain from damaging the structure or affecting performance of the devices. In other embodiments, the field emitter under the protection of the tetratantalum boride layer sustains structural equilibrium or structural elasticity.

Abstract: Disclosed is a capacitor construction for a more uniformly thick capacitor dielectric layer, and a method for fabricating the same. The method has special utility where the bottom electrode comprises composite layers over which the capacitor dielectric demonstrates differential growth during deposition. Exposed portions of an underlying first electrode layer, are covered either by a conductive or dielectric spacer, or by a dielectric padding. For the preferred embodiments, in which the bottom electrode comprises titanium carbonitride over rough polysilicon, a dielectric padding may be formed during a rapid thermal nitridation step, which causes silicon nitride to grow out of an exposed polysilicon sidewall. Alternatively, a sidewall spacer may be formed by deposition an additional layer of titanium nitride over the original titanim nitride strap, and performing a spacer etch.

Abstract: A method of masking and etching a semiconductor substrate includes forming a layer to be etched over a semiconductor substrate. An imaging layer is formed over the layer to be etched. Selected regions of the imaging layer are removed to leave a pattern of openings extending only partially into the imaging layer. After the removing, the layer to be etched is etched using the imaging layer as an etch mask. In one implementation, an ion implant lithography method of processing a semiconductor includes forming a layer to be etched over a semiconductor substrate. An imaging layer of a selected thickness is formed over the layer to be etched. Selected regions of the imaging layer are ion implanted to change solvent solubility of implanted regions versus non-implanted regions of the imaging layer, with the selected regions not extending entirely through the imaging layer thickness.

Abstract: The invention encompasses a method for forming a pattern across and expanse of photoresist. The expanse comprises a defined first region, second region and third region. The first region is exposed to a first radiation while leaving the third region not exposed; and subsequently the second region is exposed to a second radiation while leaving the third region not exposed to the second radiation. The second radiation is different from the first radiation. The exposure of the first and second regions in a solvent relative to the solubility of the third region of the expanse. After the first and second regions of the expanse are exposed to the first and second radiations, the expanse is exposed to a solvent to pattern the expanse. The invention can be utilized in forming radiation-patterning tools and stencils; and in patterning semiconductor substrates.

Abstract: Disclosed are methods of forming resistors and diodes from semiconductive material, and static random access memory (SRAM) cells incorporating resistors, and to integrated circuitry incorporating resistors and diodes. A node to which electrical connection is to be made is provided. An electrically insulative layer is provided outwardly of the node. An opening is provided in the electrically insulative layer over the node. The opening is filed with semiconductive material which depending on configuration serves as one or both of a vertically elongated diode and resistor.

Abstract: In one aspect, the invention includes a semiconductor processing method, comprising: a) providing a silicon nitride material having a surface; b) forming a barrier layer over the surface of the material, the barrier layer comprising silicon and nitrogen; and c) forming a photoresist over and against the barrier layer.

Abstract: A device for wet processing of a semiconductor-containing substrate that addresses contamination in the wet process by removing undesired sources of gas contamination, the method involving pumping a processing liquid through a degasifier, exposing the semiconductor wafer, in a vessel, to the degasified processing liquid; and optionally recirculating the processing liquid through the degasifier and back into the vessel.

Abstract: A method of masking and etching a semiconductor substrate includes forming a layer to be etched over a semiconductor substrate. An imaging layer is formed over the layer to be etched. Selected regions of the imaging layer are removed to leave a pattern of openings extending only partially into the imaging layer. After the removing, the layer to be etched is etched using the imaging layer as an etch mask. In one implementation, an ion implant lithography method of processing a semiconductor includes forming a layer to be etched over a semiconductor substrate. An imaging layer of a selected thickness is formed over the layer to be etched. Selected regions of the imaging layer are ion implanted to change solvent solubility of implanted regions versus non-implanted regions of the imaging layer, with the selected regions not extending entirely through the imaging layer thickness.

Abstract: In one aspect, the invention includes a semiconductor processing method, comprising: a) providing a silicon nitride material having a surface; b) forming a barrier layer over the surface of the material, the barrier layer comprising silicon and nitrogen; and c) forming a photoresist over and against the barrier layer.

Abstract: The present invention provides an attenuated phase shift mask (“APSM”) that, in each embodiment, includes completely transmissive regions sized and shaped to define desired semiconductor device features, slightly attenuated regions at the edges of the completely transmissive regions corresponding to isolated device features, highly attenuated regions at the edges of completely transmissive regions corresponding to closely-spaced or nested device features, and completely opaque areas where it is desirable to block transmission of all radiation through the APSM. The present invention further provides methods for fabricating the APSMs according to the present invention.

Abstract: A method for alloying a semiconductor substrate upon which wordlines enclosed in spacers have been formed, with the substrate exposed between the wordlines. A thin sealing layer is deposited over the substrate and the wordlines, the sealing layer helping to maintain the alloy in said substrate. The alloying material employed in the substrate is hydrogen and optionally monatomic hydrogen. Alloying the substrate with monatomic hydrogen may also be done after deposition of a metal layer, or at other process steps as desired.

Abstract: A method for alloying a semiconductor substrate upon which wordlines enclosed in spacers have been formed, with the substrate exposed between the wordlines. A thin sealing layer is deposited over the substrate and the wordlines, the sealing layer helping to maintain the alloy in said substrate. The alloying material employed in the substrate is hydrogen and optionally monatomic hydrogen. Alloying the substrate with monatomic hydrogen may also be done after deposition of a metal layer, or at other process steps as desired.

Abstract: The invention encompasses a method for forming a pattern across an expanse of photoresist. The expanse comprises a defined first region, second region and third region. The first region is exposed to a first radiation while leaving the third region not exposed; and subsequently the second region is exposed to a second radiation while leaving the third region not exposed to the second radiation. The second radiation is different from the first radiation. The exposure of the first and second regions of the expanse to the first and second radiations alters the solubility of the first and second regions in a solvent relative to the solubility of the third region of the expanse. After the first and second regions of the expanse are exposed to the first and second radiations, the expanse is exposed to a solvent to pattern the expanse. The invention can be utilized in forming radiation-patterning tools and stencils; and in pattering semiconductor substrates.

Abstract: Disclosed is a capacitor construction for a more uniformly thick capacitor dielectric layer, and a method for fabricating the same. The method has special utility where the bottom electrode comprises composite layers over which the capacitor dielectric demonstrates differential growth during deposition. Exposed portions of an underlying first electrode layer, are covered either by a conductive or dielectric spacer, or by a dielectric padding. For the preferred embodiments, in which the bottom electrode comprises titanium carbonitride over rough polysilicon, a dielectric padding may be formed during a rapid thermal nitridation step, which causes silicon nitride to grow out of an exposed polysilicon sidewall. Alternatively, a sidewall spacer may be formed by deposition an additional layer of titanium nitride over the original titanim nitride strap, and performing a spacer etch.

Abstract: The present invention provides an attenuated phase shift mask (“APSM”) that, in each embodiment, includes completely transmissive regions sized and shaped to define desired semiconductor device features, slightly attenuated regions at the edges of the completely transmissive regions corresponding to isolated device features, highly attenuated regions at the edges of completely transmissive regions corresponding to closely-spaced or nested device features, and completely opaque areas where it is desirable to block transmission of all radiation through the APSM. The present invention further provides methods for fabricating the APSMs according to the present invention.