Patents by Inventor Jean-Olivier Plouchart

Jean-Olivier Plouchart has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190288540
    Abstract: Systems, devices, and techniques facilitating wirelessly charging and/or communicating with one or more electronic devices (e.g., electronic wearable devices) are provided. A device can comprise a memory and a storage component that can be operatively coupled to the memory. The storage component can comprise one or more recesses that can receive a second device that can be charged by the storage component. The storage component can comprise a charging circuit and an inductive circuit that can be coupled to the charging circuit. The storage component can harvest energy from one or more energy sources to charge the charging circuit. Based on the energy harvested, the inductive circuit can inductively couple to the second device having a second inductive circuit and positioned in at least one of the recesses and the inductive circuit can charge a power source of the second device.
    Type: Application
    Filed: March 14, 2018
    Publication date: September 19, 2019
    Inventors: Bing Dang, Duixian Liu, Jean-Olivier Plouchart, John Knickerbocker
  • Patent number: 10286198
    Abstract: Devices and methods are provided for controlled delivery of medical substances such as drugs and medication. For example, a microchip medical substance delivery device includes a control system, and a medical substance capsule that comprises a medical substance contained with a reservoir, and a release structure to release the medical substance from within the reservoir in response to an activation signal generated by the control system. The control system comprises a wireless signal receiving element, processor, actuator circuit, and power supply source. The wireless signal receiving element captures a wireless signal. The processor detects an activation code embedded within the captured wireless signal, and generates an actuator control signal in response to the detection of the activation code. The actuator circuit generates the activation signal in response to the actuator control signal generated by the processor. The power supply source provides power to operate components of the control system.
    Type: Grant
    Filed: April 8, 2016
    Date of Patent: May 14, 2019
    Assignee: International Business Machines Corporation
    Inventors: Bing Dang, Duixian Liu, Jean-Olivier Plouchart
  • Patent number: 10229898
    Abstract: Package structures and methods are provided to integrate optoelectronic and CMOS devices using SOI semiconductor substrates for photonics applications. For example, a package structure includes an integrated circuit (IC) chip, and an optoelectronics device and interposer mounted to the IC chip. The IC chip includes a SOI substrate having a buried oxide layer, an active silicon layer disposed adjacent to the buried oxide layer, and a BEOL structure formed over the active silicon layer. An optical waveguide structure is patterned from the active silicon layer of the IC chip. The optoelectronics device is mounted on the buried oxide layer in alignment with a portion of the optical waveguide structure to enable direct or adiabatic coupling between the optoelectronics device and the optical waveguide structure. The interposer is bonded to the BEOL structure, and includes at least one substrate having conductive vias and wiring to provide electrical connections to the BEOL structure.
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: March 12, 2019
    Assignee: International Business Machines Corporation
    Inventors: Russell A. Budd, Mounir Meghelli, Jason Scott Orcutt, Jean-Olivier Plouchart
  • Patent number: 10217766
    Abstract: A radio frequency fully depleted silicon on insulator (RF-FDSOI) device and method of fabrication are provided. A silicon wafer for digital circuits is constructed using fully depleted silicon on insulator technology having a thin buried oxide layer. Localized areas of the silicon wafer are constructed for radio frequency circuits and/or passive devices. The silicon wafer has a silicon substrate having a resistivity greater than 1 K?·cm. The localized areas of the silicon wafer may include a trap rich layer implanted underneath a thin buried oxide layer. The localized areas of the silicon wafer may include a buried oxide layer that is thicker than the thin buried oxide layer. The thicker oxide layer is between 20 and 2000 nm thick. The localized areas of the silicon wafer may include a trap rich layer implanted underneath the thicker buried oxide layer.
    Type: Grant
    Filed: October 26, 2017
    Date of Patent: February 26, 2019
    Assignee: International Business Machines Corporation
    Inventors: Jin Cai, Jean-Olivier Plouchart
  • Patent number: 10168478
    Abstract: According to an aspect of the present principles, methods are provided for fabricating an integrated structure. A method includes forming a very large scale integration (VLSI) structure including a semiconductor layer at a top of the VLSI structure. The method further includes mounting the VLSI structure to a support structure. The method additionally includes removing at least a portion of the semiconductor layer from the VLSI structure. The method also includes attaching an upper layer to the top of the VLSI structure. The upper layer is primarily composed of a material that has at least one of a higher resistivity or a higher transparency than the semiconductor layer. The upper layer includes at least one hole for at least one of a photonic device or an electronic device. The method further includes releasing said VLSI structure from the support structure.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: January 1, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Aydin Babakhani, Steven A. Cordes, Jean-Olivier Plouchart, Scott K. Reynolds, Peter J. Sorce, Robert E. Trzcinski
  • Patent number: 10168477
    Abstract: According to an aspect of the present principles, methods are provided for fabricating an integrated structure. A method includes forming a very large scale integration (VLSI) structure including a semiconductor layer at a top of the VLSI structure. The method further includes mounting the VLSI structure to a support structure. The method additionally includes removing at least a portion of the semiconductor layer from the VLSI structure. The method also includes attaching an upper layer to the top of the VLSI structure. The upper layer is primarily composed of a material that has at least one of a higher resistivity or a higher transparency than the semiconductor layer. The upper layer includes at least one hole for at least one of a photonic device or an electronic device. The method further includes releasing said VLSI structure from the support structure.
    Type: Grant
    Filed: November 17, 2016
    Date of Patent: January 1, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Aydin Babakhani, Steven A. Cordes, Jean-Olivier Plouchart, Scott K. Reynolds, Peter J. Sorce, Robert E. Trzcinski
  • Patent number: 10168473
    Abstract: An optoelectronic device includes an integrated circuit including electronic devices formed on a front side of a semiconductor substrate. A barrier layer is formed on a back side of the semiconductor substrate. A photonics layer is formed on the barrier layer. The photonics layer includes a core for transmission of light and a cladding layer encapsulating the core and including a different index of refraction than the core. The core is configured to couple light generated from a component of the optoelectronic device.
    Type: Grant
    Filed: November 9, 2016
    Date of Patent: January 1, 2019
    Assignee: International Business Machines Corporation
    Inventors: Russell A. Budd, Effendi Leobandung, Ning Li, Jean-Olivier Plouchart, Devendra K. Sadana
  • Patent number: 10103450
    Abstract: Package structures are provided for integrally packaging antennas with semiconductor RFIC (radio frequency integrated circuit) chips to form compact integrated radio/wireless communications systems that operate in the millimeter-wave and terahertz frequency ranges. For example, a package structure includes an RFIC chip, and an antenna package bonded to the RFIC chip. The antenna package includes a glass substrate, at least one planar antenna element formed on a first surface of the glass substrate, a ground plane formed on a second surface of the glass substrate, opposite the first surface, and an antenna feed line formed through the glass substrate and connected to the at least one planar antenna element. The antenna package is bonded to a surface of the RFIC chip using a layer of adhesive material.
    Type: Grant
    Filed: August 10, 2016
    Date of Patent: October 16, 2018
    Assignee: International Business Machines Corporation
    Inventors: Bing Dang, Duixian Liu, Jean-Olivier Plouchart, Peter Jerome Sorce, Cornelia Kang-I Tsang
  • Patent number: 10090340
    Abstract: A semiconductor structure includes an optoelectronic device located in one region of a substrate. A dielectric material is located adjacent and atop the optoelectronic device. A top contact is located within a region of the dielectric material and contacting a topmost surface of the optoelectronic device. A bottom metal contact is located beneath the optoelectronic device and lining a pair of openings located with other regions of the dielectric material, wherein a portion of the bottom metal contact contacts an entire bottommost surface of the optoelectronic device.
    Type: Grant
    Filed: January 13, 2017
    Date of Patent: October 2, 2018
    Assignee: International Business Machines Corporation
    Inventors: Effendi Leobandung, Ning Li, Tak H. Ning, Jean-Olivier Plouchart, Devendra K. Sadana
  • Patent number: 10090286
    Abstract: Package structures and methods are provided to integrate optoelectronic and CMOS devices using SOI semiconductor substrates for photonics applications. For example, a package structure includes an integrated circuit (IC) chip, and an optoelectronics device and interposer mounted to the IC chip. The IC chip includes a SOI substrate having a buried oxide layer, an active silicon layer disposed adjacent to the buried oxide layer, and a BEOL structure formed over the active silicon layer. An optical waveguide structure is patterned from the active silicon layer of the IC chip. The optoelectronics device is mounted on the buried oxide layer in alignment with a portion of the optical waveguide structure to enable direct or adiabatic coupling between the optoelectronics device and the optical waveguide structure. The interposer is bonded to the BEOL structure, and includes at least one substrate having conductive vias and wiring to provide electrical connections to the BEOL structure.
    Type: Grant
    Filed: October 20, 2017
    Date of Patent: October 2, 2018
    Assignee: International Business Machines Corporation
    Inventors: Russell A. Budd, Mounir Meghelli, Jason Scott Orcutt, Jean-Olivier Plouchart
  • Patent number: 10057093
    Abstract: A commutating circuit includes a single-ended mixer and a passive network. The single-ended mixer includes a differential local oscillator terminal. The passive network includes a plurality of inductors and a capacitor. The plurality of inductors can be coupled to the differential local oscillator terminal. The plurality of inductors can provide an impedance in accordance with a common mode or a differential mode. The commutating circuit can be implemented via a device, a system and/or a method.
    Type: Grant
    Filed: June 29, 2016
    Date of Patent: August 21, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Wooram Lee, Jean-Olivier Plouchart, Alberto Valdes Garcia
  • Patent number: 10056672
    Abstract: Embodiments include package structures having integrated waveguides to enable high data rate communication between package components. For example, a package structure includes a package substrate having an integrated waveguide, and first and second integrated circuit chips mounted to the package substrate. The first integrated circuit chip is coupled to the integrated waveguide using a first transmission line to waveguide transition, and the second integrated circuit chip is coupled to the integrated waveguide using a second transmission line to waveguide transition. The first and second integrated circuit chips are configured to communicate by transmitting signals using the integrated waveguide within the package carrier.
    Type: Grant
    Filed: July 28, 2016
    Date of Patent: August 21, 2018
    Assignee: International Business Machines Corporation
    Inventors: Bing Dang, Duixian Liu, Jean-Olivier Plouchart, Alberto Valdes-Garcia
  • Publication number: 20180217329
    Abstract: An optoelectronic device includes an integrated circuit including electronic devices formed on a front side of a semiconductor substrate. A barrier layer is formed on a back side of the semiconductor substrate. A photonics layer is formed on the barrier layer. The photonics layer includes a core for transmission of light and a cladding layer encapsulating the core and including a different index of refraction than the core. The core is configured to couple light generated from a component of the optoelectronic device.
    Type: Application
    Filed: March 26, 2018
    Publication date: August 2, 2018
    Inventors: Russell A. Budd, Effendi Leobandung, Ning Li, Jean-Olivier Plouchart, Devendra K. Sadana
  • Patent number: 10038232
    Abstract: Embodiments include package structures having integrated waveguides to enable high data rate communication between package components. For example, a package structure includes a package substrate having an integrated waveguide, and first and second integrated circuit chips mounted to the package substrate. The first integrated circuit chip is coupled to the integrated waveguide using a first transmission line to waveguide transition, and the second integrated circuit chip is coupled to the integrated waveguide using a second transmission line to waveguide transition. The first and second integrated circuit chips are configured to communicate by transmitting signals using the integrated waveguide within the package carrier.
    Type: Grant
    Filed: July 28, 2016
    Date of Patent: July 31, 2018
    Assignee: International Business Machines Corporation
    Inventors: Bing Dang, Duixian Liu, Jean-Olivier Plouchart, Alberto Valdes-Garcia
  • Patent number: 10033081
    Abstract: Embodiments include package structures having integrated waveguides to enable high data rate communication between package components. For example, a package structure includes a package substrate having an integrated waveguide, and first and second integrated circuit chips mounted to the package substrate. The first integrated circuit chip is coupled to the integrated waveguide using a first transmission line to waveguide transition, and the second integrated circuit chip is coupled to the integrated waveguide using a second transmission line to waveguide transition. The first and second integrated circuit chips are configured to communicate by transmitting signals using the integrated waveguide within the package carrier.
    Type: Grant
    Filed: July 28, 2016
    Date of Patent: July 24, 2018
    Assignee: International Business Machines Corporation
    Inventors: Bing Dang, Duixian Liu, Jean-Olivier Plouchart, Alberto Valdes-Garcia
  • Patent number: 10026752
    Abstract: An amplifier circuit including a substrate layer and a plurality of lateral bipolar junction transistors positioned entirely above the substrate. The lateral bipolar junction transistors include a plurality of monolithic emitter-collector regions coplanar to each other. Each of the emitter-collector regions is both an emitter region of a first bipolar junction transistor a collector region of a second bipolar junction transistor from the lateral bipolar junction transistors. Accordingly, the lateral bipolar junction transistors are electrically coupled in series circuit at the emitter-collector regions.
    Type: Grant
    Filed: August 28, 2016
    Date of Patent: July 17, 2018
    Assignee: International Business Machines Corporation
    Inventors: Alberto Valdes Garcia, Tak H. Ning, Jean-Olivier Plouchart, Ghavam G. Shahidi, Jeng-Bang Yau
  • Patent number: 10025029
    Abstract: An optoelectronic device includes an integrated circuit including electronic devices formed on a front side of a semiconductor substrate. A barrier layer is formed on a back side of the semiconductor substrate. A photonics layer is formed on the barrier layer. The photonics layer includes a core for transmission of light and a cladding layer encapsulating the core and including a different index of refraction than the core. The core is configured to couple light generated from a component of the optoelectronic device.
    Type: Grant
    Filed: October 28, 2015
    Date of Patent: July 17, 2018
    Assignee: International Business Machines Corporation
    Inventors: Russell A. Budd, Effendi Leobandung, Ning Li, Jean-Olivier Plouchart, Devendra K. Sadana
  • Patent number: 10007057
    Abstract: An optoelectronic device includes an integrated circuit including electronic devices formed on a front side of a semiconductor substrate. A barrier layer is formed on a back side of the semiconductor substrate. A photonics layer is formed on the barrier layer. The photonics layer includes a core for transmission of light and a cladding layer encapsulating the core and including a different index of refraction than the core. The core is configured to couple light generated from a component of the optoelectronic device.
    Type: Grant
    Filed: November 9, 2016
    Date of Patent: June 26, 2018
    Assignee: International Business Machines Corporation
    Inventors: Russell A. Budd, Effendi Leobandung, Ning Li, Jean-Olivier Plouchart, Devendra K. Sadana
  • Patent number: 10001598
    Abstract: An optoelectronic device includes an integrated circuit including electronic devices formed on a front side of a semiconductor substrate. A barrier layer is formed on a back side of the semiconductor substrate. A photonics layer is formed on the barrier layer. The photonics layer includes a core for transmission of light and a cladding layer encapsulating the core and including a different index of refraction than the core. The core is configured to couple light generated from a component of the optoelectronic device.
    Type: Grant
    Filed: November 9, 2016
    Date of Patent: June 19, 2018
    Assignee: International Business Machines Corporation
    Inventors: Russell A. Budd, Effendi Leobandung, Ning Li, Jean-Olivier Plouchart, Devendra K. Sadana
  • Patent number: 9977185
    Abstract: An optoelectronic device includes an integrated circuit including electronic devices formed on a front side of a semiconductor substrate. A barrier layer is formed on a back side of the semiconductor substrate. A photonics layer is formed on the barrier layer. The photonics layer includes a core for transmission of light and a cladding layer encapsulating the core and including a different index of refraction than the core. The core is configured to couple light generated from a component of the optoelectronic device.
    Type: Grant
    Filed: November 9, 2016
    Date of Patent: May 22, 2018
    Assignee: International Business Machines Corporation
    Inventors: Russell A. Budd, Effendi Leobandung, Ning Li, Jean-Olivier Plouchart, Devendra K. Sadana