Abstract: A touch detection module, includes: a plurality of driving electrodes arranged side by side; a plurality of sensing electrodes staggered with respect to the driving electrodes; and a touch driving circuit configured to supply touch driving signals to the plurality of driving electrodes and to detect touch detection signals through the plurality of sensing electrodes to identify touch position coordinates, wherein the touch driving circuit is configured: to vary frequency modulation parameter set values in response to a change in a frequency of reference clocks, and to generate and supply a frequency of the touch driving signals by using the reference clocks and a varied frequency modulation parameter set value.

Abstract: Apparatuses and methods to provide electronic devices having metal films are provided. Some embodiments of the disclosure utilize a metallic tungsten layer as a liner that is filled with a metal film comprising cobalt. The metallic tungsten layer has good adhesion to the cobalt leading to enhanced cobalt gap-fill performance.

Abstract: Provided is an apparatus for automatically classifying an input sound source according to a preset criterion and are an apparatus and method for automatically classifying a sound source according to a set criterion by using deep learning. The apparatus for classifying a sound source includes a processor and a memory connected to the processor and storing a deep learning algorithm and original sound data, wherein the memory stores program instructions executable by the processor to generate n pieces of image data corresponding to the original sound data according to a preset method, generate training image data corresponding to the original sound data by using the n pieces of image data, train the deep learning algorithm by using the training image data, and classify target sound data according to a preset criterion by using the deep learning algorithm, wherein the n is a natural number greater than or equal to 2.

Abstract: A super-steep switching device and an inverter device using the same are disclosed. The super-steep switching device includes a semiconductor channel disposed on a substrate and made of a semiconductor material having impact ionization characteristic; a source electrode and a drain electrode in contact with the semiconductor channel, wherein the source electrode and the drain electrode are disposed on the substrate and are spaced apart from each other; and a gate electrode disposed on the semiconductor channel so as to overlap only a portion of the semiconductor channel, wherein a top surface of the semiconductor channel includes a first area overlapping the gate electrode, and a second area non-overlapping the gate electrode, wherein a ratio of a length of the first area and a length of the second area is in a range of 1:0.1 to 0.4.

Abstract: A semiconductor device includes a substrate. A first channel pattern is disposed on the substrate. The first channel pattern includes a first side and a second side opposite to each other in a first direction. A first gate electrode is disposed on the first side of the first channel pattern. A first source/drain electrode is disposed on the first side of the first channel pattern. A second source/drain electrode is disposed on the second side of the first channel pattern. The first gate electrode overlaps the second source/drain electrode in the first direction.

Abstract: A negative differential resistance device includes a dielectric layer having a first surface and a second surface opposing the first surface, a first semiconductor layer that includes a first degenerated layer that is on the first surface of the dielectric layer and has a first polarity, a second semiconductor layer that includes a second degenerated layer that has a region that overlaps the first semiconductor layer and has a second polarity, a first electrode electrically connected to the first semiconductor layer, a second electrode electrically connected to the second semiconductor layer, and a third electrode on the second surface of the dielectric layer and which has a region overlapping at least one of the first semiconductor layer or the second semiconductor layer.

Abstract: The present disclosure discloses a flat substrate heating apparatus including a module support plate having a plurality of unit module regions placed on an upper surface thereof; a plurality of laser light source modules having a plurality of laser light source devices and seated on unit module regions of the module support plate, respectively; a power supply board placed below the module support plate and configured to supply power to the laser light source module; and an electrode terminal electrically connecting the laser light source module and the power supply board while detachably securing them to upper and lower surfaces of the module support plate.

Abstract: The present disclosure provides substrate heat-treating apparatus including a process chamber in which a flat substrate to be heat treated is placed, the process chamber comprising a beam irradiating plate placed below the flat substrate and an infrared transmitting plate placed above the flat substrate; a beam irradiating module for irradiating a laser beam to a lower surface of the flat substrate through the beam irradiating plate; and a gas circulation cooling module for spraying a cooling gas to an upper surface of the infrared transmitting plate, thereby cooling the infrared transmitting plate.

Abstract: Disclosed is an extended-release lacosamide preparation which can be taken once a day. Also disclosed is a method for treating a subject with epilepsy including administering the extended-release lacosamide preparation once a day.

Abstract: A method of manufacturing a semiconductor device includes forming a channel layer on a substrate, forming a mask on the channel layer, surface-treating an exposed surface of the channel layer exposed from the mask, forming an electrode on the exposed surface of the channel layer, and removing the mask. The channel layer includes a two-dimensional material, and the surface-treating of the exposed surface of the channel layer includes surface-treating the exposed surface of the channel layer with HCl.

Abstract: Organic coating compositions, particularly antireflective coating compositions for use with an overcoated photoresist, are provided that in a first aspect comprise a crosslinker component that comprises a structure of the following Formula (I):

Abstract: Organic coating compositions, particularly antireflective coating compositions for use with an overcoated photoresist, are provided that in a first aspect comprise a crosslinker component that comprises a structure of the following Formula (I):

Abstract: Disclosed are methods of forming PN junction structures, methods of fabricating semiconductor devices using the same, and semiconductor devices fabricated by the same. The method of forming a PN junction structure includes: forming on a substrate a first material layer that includes first transition metal atoms and first chalcogen atoms, loading the first material layer into a process chamber and supplying a gas of second chalcogen atoms, and forming a second material layer by substituting the second chalcogen atoms for the first chalcogen atoms on a selected portion of the first material layer. The first material layer has one of n-type conductivity and p-type conductivity. The second material layer has the other of the n-type conductivity and the p-type conductivity.

Abstract: A negative differential resistance device includes a dielectric layer having a first surface and a second surface opposing the first surface, a first semiconductor layer that includes a first degenerated layer that is on the first surface of the dielectric layer and has a first polarity, a second semiconductor layer that includes a second degenerated layer that has a region that overlaps the first semiconductor layer and has a second polarity, a first electrode electrically connected to the first semiconductor layer, a second electrode electrically connected to the second semiconductor layer, and a third electrode on the second surface of the dielectric layer and which has a region overlapping at least one of the first semiconductor layer or the second semiconductor layer.

Abstract: Tandem solar cell configurations are provided where at least one of the cells is a metal chalcogenide cell. A four-terminal tandem solar cell configuration has two electrically independent solar cells stacked on each other. A two-terminal solar cell configuration has two electrically coupled solar cells (same current through both cells) stacked on each other. Carrier selective contacts can be used to make contact to the metal chalcogenide cell (s) to alleviate the troublesome Fermi level pinning issue. Carrier-selective contacts can also remove the need to provide doping of the metal chalcogenide. Doping of the metal chalcogenide can be provided by charge transfer. These two ideas can be practiced independently or together in any combination.

Abstract: A polymer comprising a first repeating unit including an amino group protected by an alkoxycarbonyl group; a second repeating unit including a nucleophilic group; and a third repeating unit including a crosslinkable group, wherein the first repeating unit, the second repeating unit, and the third repeating unit are different from each other.

Abstract: A photoresist underlayer composition, comprising: a first polymer comprising a crosslinkable group; a second polymer comprising: a first repeating unit comprising a repeating unit comprising a photoacid generator, and a second repeating unit comprising a hydroxy-substituted C1-30 alkyl group, a hydroxy-substituted C3-30 cycloalkyl group, or a hydroxy-substituted C6-30 aryl group; an acid catalyst; and a solvent.

Abstract: A photodetector includes a gate electrode extending in a first direction, a ferroelectric layer on the gate electrode and maintaining a state of polarization formed by a gate voltage applied to the gate electrode, a light absorbing layer on the ferroelectric layer and extending in a second direction intersecting the gate electrode, the light absorbing layer including a two-dimensional (2D) material of a layered structure, a source electrode on the ferroelectric layer and connected to a first end of the light absorbing layer, and a drain electrode on the ferroelectric layer and connected to the a second end of the light absorbing layer.

Abstract: New composition and methods are provided that include antireflective compositions that can exhibit enhanced etch rates in standard plasma etchants. Preferred antireflective coating compositions of the invention have decreased carbon content relative to prior compositions.

Abstract: A three-dimensional semiconductor integrated circuit includes a first CMOS circuit layer including a plurality of first CMOS circuit blocks; an insulating layer disposed on a top of the first CMOS circuit layer; a plurality of atomic switching elements respectively disposed inside via holes extending through the insulating layer, wherein the plurality of atomic switching elements are electrically connected to the plurality of first CMOS circuit blocks, respectively; a driver circuit layer disposed on a top of the insulating layer, and electrically connected with the atomic switching elements, wherein the driver circuit layer include a driver circuit for selectively turning on and off the atomic switching elements; and a second CMOS circuit disposed on a top of the driver circuit layer and connected to the atomic switching elements.