Patents by Inventor John Hyunchul Hong

John Hyunchul Hong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11282760
    Abstract: This disclosure provides devices and methods for 3-D device packaging with backside interconnections. One or more device elements can be hermetically sealed from an ambient environment, such as by vacuum lamination and bonding. One or more via connections provide electrical interconnection from a device element to a back side of a device substrate, and provide electrical interconnection from the device substrate to external circuitry on the back side of the device. The external circuitry can include a printed circuit board or flex circuit. In some implementations, an electrically conductive pad is provided on the back side, which is electrically connected to at least one of the via connections. In some implementations, the one or more via connections are electrically connected to one or more electrical components or interconnections, such as a TFT or a routing line.
    Type: Grant
    Filed: October 22, 2019
    Date of Patent: March 22, 2022
    Assignee: Obsidian Sensors, Inc.
    Inventors: Yaoling Pan, Tallis Young Chang, John Hyunchul Hong
  • Publication number: 20200294878
    Abstract: This disclosure provides devices and methods for 3-D device packaging with backside interconnections. One or more device elements can be hermetically sealed from an ambient environment, such as by vacuum lamination and bonding. One or more via connections provide electrical interconnection from a device element to a back side of a device substrate, and provide electrical interconnection from the device substrate to external circuitry on the back side of the device. The external circuitry can include a printed circuit board or flex circuit. In some implementations, an electrically conductive pad is provided on the back side, which is electrically connected to at least one of the via connections. In some implementations, the one or more via connections are electrically connected to one or more electrical components or interconnections, such as a TFT or a routing line.
    Type: Application
    Filed: October 22, 2019
    Publication date: September 17, 2020
    Applicant: Obsidian Sensors, Inc.
    Inventors: Yaoling PAN, Tallis Young CHANG, John Hyunchul HONG
  • Patent number: 10453766
    Abstract: This disclosure provides devices and methods for 3-D device packaging with backside interconnections. One or more device elements can be hermetically sealed from an ambient environment, such as by vacuum lamination and bonding. One or more via connections provide electrical interconnection from a device element to a back side of a device substrate, and provide electrical interconnection from the device substrate to external circuitry on the back side of the device. The external circuitry can include a printed circuit board or flex circuit. In some implementations, an electrically conductive pad is provided on the back side, which is electrically connected to at least one of the via connections. In some implementations, the one or more via connections are electrically connected to one or more electrical components or interconnections, such as a TFT or a routing line.
    Type: Grant
    Filed: November 14, 2016
    Date of Patent: October 22, 2019
    Assignee: OBSIDIAN SENSORS, INC.
    Inventors: Yaoling Pan, Tallis Young Chang, John Hyunchul Hong
  • Publication number: 20180138102
    Abstract: This disclosure provides devices and methods for 3-D device packaging with backside interconnections. One or more device elements can be hermetically sealed from an ambient environment, such as by vacuum lamination and bonding. One or more via connections provide electrical interconnection from a device element to a back side of a device substrate, and provide electrical interconnection from the device substrate to external circuitry on the back side of the device. The external circuitry can include a printed circuit board or flex circuit. In some implementations, an electrically conductive pad is provided on the back side, which is electrically connected to at least one of the via connections. In some implementations, the one or more via connections are electrically connected to one or more electrical components or interconnections, such as a TFT or a routing line.
    Type: Application
    Filed: November 14, 2016
    Publication date: May 17, 2018
    Applicant: OBSIDIAN SENSORS, INC.
    Inventors: Yaoling Pan, Tallis Young Chang, John Hyunchul Hong
  • Patent number: 9927615
    Abstract: Some implementations of augmented reality glasses disclosed herein include an eyeglass substrate, two or more display elements, image optics configured for coupling light from the display elements into the eyeglass substrate and beam-splitting optics configured for directing light from the eyeglass substrate towards a viewer's eye and for allowing partial light from the real-world scene to arrive at a viewer's eye. The image optics may include one or more image optics lenses formed in the eyeglass substrate and may be positioned out of a line of sight of the viewer's eye when the viewer is wearing the augmented reality glasses. The image optics may be capable of coupling light from the display elements toward the beam-splitting optics along folded light paths caused by internal reflection within the eyeglass substrate.
    Type: Grant
    Filed: July 25, 2016
    Date of Patent: March 27, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Jian Jim Ma, John Hyunchul Hong, Tallis Young Chang
  • Publication number: 20180024366
    Abstract: Some implementations of augmented reality glasses disclosed herein include an eyeglass substrate, two or more display elements, image optics configured for coupling light from the display elements into the eyeglass substrate and beam-splitting optics configured for directing light from the eyeglass substrate towards a viewer's eye and for allowing partial light from the real-world scene to arrive at a viewer's eye. The image optics may include one or more image optics lenses formed in the eyeglass substrate and may be positioned out of a line of sight of the viewer's eye when the viewer is wearing the augmented reality glasses. The image optics may be capable of coupling light from the display elements toward the beam-splitting optics along folded light paths caused by internal reflection within the eyeglass substrate.
    Type: Application
    Filed: July 25, 2016
    Publication date: January 25, 2018
    Inventors: Jian Jim Ma, John Hyunchul Hong, Tallis Young Chang
  • Patent number: 9761732
    Abstract: This disclosure provides thin film transistors (TFTs) including p-n hetero-junction structures. A p-n hetero-junction structure may include a junction between a narrow bandgap material and a wide bandgap material. The narrow bandgap material, which may be an oxide, nitride, selenide, or sulfide, is the active channel material of the TFT and may provide relatively high carrier mobility. The hetero-junction structures facilitate band-to-band tunneling and suppression of TFT off-currents. In various implementations, the TFTs may be formed on flexible substrates and have low temperature processing capabilities.
    Type: Grant
    Filed: February 25, 2015
    Date of Patent: September 12, 2017
    Assignee: SnapTrack Inc.
    Inventors: Kenji Nomura, John Hyunchul Hong
  • Patent number: 9685542
    Abstract: Provided herein are methods of depositing p-type metal oxide thin films by atomic layer deposition (ALD). Also provided are p-type metal oxide thin films and TFTs including p-type metal oxide channels. In some implementations, the p-type metal oxide thin films have a metal and oxygen vacancy defect density of less than 1019/cm3. The p-type metal oxide thin films may be electrically active throughout the entire thicknesses of the thin films.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: June 20, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Kenji Nomura, John Hyunchul Hong
  • Publication number: 20170085096
    Abstract: This disclosure provides methods and apparatus for wireless power transfer using an array of structures. Each of the structures can include a piezoelectric material portion and a magnetic material portion. Each of the magnetic material portions can respond to an alternating magnetic field generated by an external transmitter device, resulting in the structures oscillating and straining the corresponding piezoelectric material portions to generate electrical current.
    Type: Application
    Filed: September 23, 2015
    Publication date: March 23, 2017
    Inventors: John Hyunchul Hong, Bing Wen, Edward Keat Leem Chan, Tallis Young Chang, Zhigang Zhou, Yaoling Pan
  • Publication number: 20170084373
    Abstract: This disclosure provides methods and apparatus for adjusting magnetic orientations of different sets of magnets in an array. In one aspect, a first set of magnets in the array can be heated. A magnetic field with a first orientation can be applied to the array of the magnets, and adjusting the magnetic orientations of the first set of magnets to the first orientation of the magnetic field. A second set of magnets in the array can be heated and the magnetic field can have a second orientation. The magnetic orientations of the second set of magnets can be adjusted to the second orientation.
    Type: Application
    Filed: September 21, 2015
    Publication date: March 23, 2017
    Inventor: John Hyunchul Hong
  • Publication number: 20160349497
    Abstract: This disclosure provides a display device that can achieve a neutral white color by combining a first tinted native white color produced by a first display element of the display device or a portion thereof with a second tinted native white color produced by a second display element of the display device or a portion of the first display element. The tint of the first tinted native white color and the second tinted native white color can be complementary to each other. The first tinted native white color and the second tinted native white color can be combined using spatial and/or temporal dithering.
    Type: Application
    Filed: May 27, 2015
    Publication date: December 1, 2016
    Inventors: Jian Jim Ma, Shen-Ge Wang, Tallis Young Chang, John Hyunchul Hong, Chih-Chun Lee, Sheng-Yi Hsiao, Bor-shiun Lee, Hung-Yi Lin
  • Publication number: 20160349498
    Abstract: This disclosure provides display devices including at least one display element having a tinted native white color. The disclosure provides method of achieving the neutral white color by combining the tinted native white color produced by the at least one display element with a primary color that is complementary to the tint of the native white color using spatial and/or temporal dithering.
    Type: Application
    Filed: May 27, 2015
    Publication date: December 1, 2016
    Inventors: Jian Jim Ma, Shen-Ge Wang, Tallis Young Chang, John Hyunchul Hong
  • Publication number: 20160329020
    Abstract: This disclosure provides systems, methods and apparatus for light-guiding layers including light-turning features with multiple reflective surfaces oriented at different angles to the light-guiding layer. In one aspect, the multiple reflective surfaces may be located on each individual light-turning feature, while in another aspect, the multiple reflective surfaces may be located on separate light-turning features. The use of multiple reflective surfaces oriented at different angles can improve the efficiency and appearance of a frontlight system using such a light-guiding layer.
    Type: Application
    Filed: May 4, 2015
    Publication date: November 10, 2016
    Inventors: Jian Ma, Zheng-wu Li, Chung-Po Huang, John Hyunchul Hong
  • Publication number: 20160313492
    Abstract: This disclosure provides systems, methods and apparatus for increasing the efficiency of frontlight systems using thin waveguides. In one aspect, a narrowing reflective conduit can be used to condense light from a light source which is thicker than the waveguide, and inject it into the waveguide. A phosphor strip at the exit aperture of the narrowing reflective conduit can inject light with a diffuse directional profile independent of the directional profile of light within the narrowing reflective conduit.
    Type: Application
    Filed: April 24, 2015
    Publication date: October 27, 2016
    Inventors: Jian Ma, John Hyunchul Hong, Kebin Li
  • Patent number: 9477076
    Abstract: This disclosure provides apparatus, systems and methods for an electromechanical systems (EMS) device having one or more flexible support posts. In one aspect, the EMS device includes a substrate, a stationary electrode over the substrate, one or more flexible support posts over the substrate, and a movable electrode over the stationary electrode and supported by the one or more flexible support posts. The movable electrode is configured to move across a gap between the movable electrode and the stationary electrode upon electrostatic actuation, where the one or more flexible support posts include a first organic material and can be configured to compress to permit the movable electrode to move across the gap.
    Type: Grant
    Filed: December 9, 2014
    Date of Patent: October 25, 2016
    Assignee: QUALCOMM MEMS Technologies, Inc.
    Inventors: John Hyunchul Hong, Jian Jim Ma, Bing Wen, Tallis Young Chang, Edward Keat Leem Chan, Brandon John Hong, Kristopher Andrew Lavery, Yaoling Pan, Cheonhong Kim
  • Publication number: 20160299332
    Abstract: This disclosure provides systems, methods and apparatus for packaging an array of electromechanical systems (EMS) devices such as interferometric modulators (IMODs). In one aspect, a backplate including an aperture can be sealed to a substrate supporting an array of unreleased EMS devices to form a package. A release etch may be performed through the aperture after sealing the backplate to the substrate. By performing the release etch after sealing the backplate to the substrate, the effect on the array of EMS devices of the formation and outgassing of the sealant material can be reduced.
    Type: Application
    Filed: April 9, 2015
    Publication date: October 13, 2016
    Inventors: Tallis Young Chang, John Hyunchul Hong, Yaoling Pan
  • Publication number: 20160267854
    Abstract: This disclosure provides systems, methods and apparatus for reducing leakage in a driver circuit. In one aspect, the driver circuit may operate in a scanning time and an idle time. The driver circuit may update display elements during the scanning time. During the idle time, inputs to the driver circuit may be configured to be floating to reduce leakage.
    Type: Application
    Filed: March 9, 2015
    Publication date: September 15, 2016
    Inventors: Cheonhong Kim, Heesun Shin, Wilhelmus Johannes Robertus Van Lier, John Hyunchul Hong
  • Patent number: 9431244
    Abstract: This disclosure provides methods and apparatuses for annealing an oxide semiconductor in a thin film transistor (TFT). In one aspect, the method includes providing a substrate with a partially fabricated TFT structure formed on the substrate. The partially fabricated TFT structure can include an oxide semiconductor layer and a dielectric oxide layer on the oxide semiconductor layer. The oxide semiconductor layer is annealed by heating the dielectric oxide layer with an infrared laser under ambient conditions to a temperature below the melting temperature of the oxide semiconductor layer. The infrared laser radiation can be substantially absorbed by the dielectric oxide layer and can remove unwanted defects from the oxide semiconductor layer at an interface in contact with the dielectric oxide layer.
    Type: Grant
    Filed: September 24, 2014
    Date of Patent: August 30, 2016
    Assignee: QUALCOMM MEMS Technologies, Inc.
    Inventors: John Hyunchul Hong, Tze-Ching Fung, Cheonhong Kim, Kenji Nomura
  • Publication number: 20160247927
    Abstract: This disclosure provides thin film transistors (TFTs) including p-n hetero-junction structures. A p-n hetero junction structure may include a junction between a narrow bandgap material and a wide bandgap material. The narrow bandgap material, which may be an oxide, nitride, selenide, or sulfide, is the active channel material of the TFT and may provide relatively high carrier mobility. The hetero junction structures facilitate band-to-band tunneling and suppression of TFT off-currents. In various implementations, the TFTs may be formed on flexible substrates and have low temperature processing capabilities.
    Type: Application
    Filed: February 25, 2015
    Publication date: August 25, 2016
    Inventors: Kenji Nomura, John Hyunchul Hong
  • Publication number: 20160190290
    Abstract: Provided herein are methods of depositing p-type metal oxide thin films by atomic layer deposition (ALD). Also provided are p-type metal oxide thin films and TFTs including p-type metal oxide channels. In some implementations, the p-type metal oxide thin films have a metal and oxygen vacancy defect density of less than 1019/cm3. The p-type metal oxide thin films may be electrically active throughout the entire thicknesses of the thin films.
    Type: Application
    Filed: December 30, 2014
    Publication date: June 30, 2016
    Inventors: Kenji Nomura, John Hyunchul Hong