Abstract: A method of and apparatus for communicating between a host and an agent. The method includes the step of performing a first transaction between a host controller and a hub. The hub is operable to perform a single transaction with an agent based on the first transaction. The method then includes the step of performing a second transaction between the host controller and the hub. The second transaction is based on the single transaction.

Abstract: A method of and apparatus for communicating between a host and an agent. The method includes the step of performing a first transaction between a host controller and a hub. The hub is operable to perform a single transaction with an agent based on the first transaction. The method then includes the step of performing a second transaction between the host controller and the hub. The second transaction is based on the single transaction.

Abstract: A computing system having expansion modules. One of the expansion modules is identified as a master module. The other modules act as slaves to the master module. The central processing unit routes a task to either the master module for portioning out or to all of the expansion modules. The master module then receives completion signals from all of the active slave modules and then provides only one interrupt to the central processing unit for that task.

Abstract: Processor-based systems may use more than one operating system and may have disk drives which are cached. Systems which include a write-back cache and a disk drive may develop incoherent data when operating systems are changed or when disk drives are removed. Scrambling a partition table on a disk drive and storing cache identification information may improve data coherency in a processor-based system.

Abstract: A method of and apparatus for communicating between a host and an agent. According to an embodiment of the invention a method for communicating data between a host and an agent is described. The method includes performing a first transaction at a first time between a host and a hub. The method then includes performing a second transaction between the hub and an agent. The method then includes performing the first transaction at a second time between the host and the hub. The second transaction is based on the first transaction for the second time.

Abstract: Briefly, in accordance with an embodiment of the invention, an apparatus and method to store initialization and configuration information is provided. The method may include storing basic input/output system (BIOS) software in a polymer memory. The method may further include copying a first portion of the BIOS software from the polymer memory to a random access memory (RAM) buffer of a memory controller, wherein the RAM buffer has a storage capacity of at least about two kilobytes (KB).

Abstract: Embodiments of apparatuses, methods for partitioning systems, and partitionable and partitioned systems are disclosed. In one embodiment, a system includes processors and a partition manager. The partition manager is to allocate a subset of the processors to a first partition and another subset of the processors to a second partition. The first partition is to execute first operating system level software and the second partition is to execute second operating system level software. The first operating system level software is to manage the processors in the first partition as resources individually accessible to the first operating system level software, and the second operating system level software is to manage the processors in the second partition as resources individually accessible to the second operating system level software.

Abstract: Briefly, in accordance with an embodiment of the invention, an apparatus and method to store initialization and configuration information is provided. The method may include storing basic input/output system (BIOS) software in a polymer memory. The method may further include copying a first portion of the BIOS software from the polymer memory to a random access memory (RAM) buffer of a memory controller, wherein the RAM buffer has a storage capacity of at least about two kilobytes (KB).

Abstract: A disk cache may include a volatile memory such as a dynamic random access memory and a nonvolatile memory such as a polymer memory. When a cache line needs to be allocated on a write, the polymer memory may be allocated and when a cache line needs to be allocated on a read, the volatile memory may be allocated.

Abstract: Embodiments of apparatuses, methods, and systems for partitioning memory mapped device configuration space are disclosed. In one embodiment, an apparatus includes a configuration space address storage location, an access map storage location, and addressing logic. The configuration space address storage location is to store a pointer to a memory region to which transactions to configure devices in a partition of a partitioned system are addressed. The access map storage location is to store an access map or a pointer to an access map. The addressing logic is to use the access map to determine whether a configuration transaction from a processor to one of the devices is to be allowed.

Abstract: A method includes establishing two partitions, including a first partition and a second partition, in a computer system. The method further includes designating a first memory page in memory space controlled by the first partition, designating a second memory page in memory space controlled by the second partition, storing an address of the first memory page in an address mapping array that is accessible by the first partition and storing an address of the second memory page in an address mapping array that is accessible by the second partition. In addition, the method includes exchanging the address of the first memory page in the address mapping array that is accessible by the first partition with the address of the second memory page in the address mapping array that is accessible by the second partition.

Abstract: In one embodiment of the present invention, a method may include determining whether requested information is part of a streaming access, and directly writing the requested information from a storage device to a memory if the requested information is part of the streaming access. Alternately, if the requested information is not part of the streaming access, it may be written from the storage device to a cache. In various embodiments, the cache may be a non-volatile disk cache.

Abstract: A host controller interface to manage the complexity of accessing mass storage that takes into account the special handling needs of various memory technologies such as polymer memories.

Abstract: In one embodiment, the present invention includes a method for allocating at least one dedicated core and at least one shareable core to a first partition of a system, where the cores are owned by the first partition. During operation, the shareable core(s) may be made dynamically available for use in one or more other partitions of the system, while the first partition retains ownership of the shared core(s). Other embodiments are described and claimed.

Abstract: Processor-based systems may use more than one software routine or method to access a write-back cache. If the methods are inconsistent, the data in the write-back cache may be incoherent with a disk drive that is being cached. A method and apparatus for preserving coherent data in a write-back disk cache may include writing dirty cache lines to a disk drive and monitoring for disk write requests, prior to a disk driver loading.

Abstract: In one embodiment, the present invention includes a method for writing data to a disk if inserting the data into a cache, such as a disk cache associated with the disk, would cause a threshold of dirty data in the cache to be met or exceeded. Further, in certain embodiments, the cache may store data according to a first cache policy and a second cache policy. A determination of whether to store data according to the first or second policies may be dependent upon an amount of dirty data in the cache, in certain embodiments. In certain embodiments, the cache may include at least one portion reserved for clean data.

Abstract: In one embodiment, the present invention includes a method to select a desired configuration parameter for an option read-only memory (ROM) coupled to a system; obtain a code module corresponding to the desired configuration parameter; and provide the code module to the option ROM to dynamically change a portion of code stored in the option ROM. More so, in certain embodiments the present invention permits an option ROM to monitor disk requests in a pre-boot environment.

Abstract: A device is presented including a host controller capable of attaching a quantity of queue heads to a frame list. The quantity of queue heads are attached to the frame list before any transaction descriptors where split-isochronous transaction descriptors are supported.

Abstract: One aspect of the invention provides a novel scheme to preserve the failure state of a memory location. According to one embodiment, the data is read from a memory location in a read-destructive memory device. If the data is found to be valid (uncorrupted) it is written back to the memory location from where it was read in order to preserve it. If the data is found to be invalid (corrupted) then a failure codeword is written in the memory location to indicate a failure of the memory location. The failure codeword may be preselected or dynamically calculated so that it has a mathematical distance greater than all correctable data patterns.

Abstract: Transactions are scheduled over a half duplex link between a first device, such as an IO unit, and a second device, such as a memory controller. Information flowing over the half duplex link is divided into a plurality of service periods, and an isochronous transaction, such as an isochronous memory read or write, is scheduled in a service period N if the isochronous transaction is ready to be serviced before service period N at the first or second device. An asynchronous transaction ready to be serviced at the first or second device, such as an asynchronous memory read or write, is scheduled if no isochronous transaction is ready to be serviced.