Abstract: An I/O peripheral device is equipped with a first collection of circuitry to enable the I/O peripheral device to provide a store-and-forward manner of operation to a segment of a peripheral bus. The first collection of circuitry includes first buffering circuitry to buffer request packets destined for a first bus agent, received from a bus controller in an integrated multi-packet form, in bulk, and at a first communication speed. Furthermore, the first collection includes control circuitry to forward the request packets separately, in a packet-by-packet basis, to the first bus agent, in a second communication speed. In one embodiment, the second communication speed is slower than the first communication speed. The I/O peripheral device further includes second buffer circuitry to buffer response packets to a request from the first bus agent provided separately, and each at the slower second communication speed.

Abstract: Transactions are scheduled over a half duplex link between a first device and a second device. Information flowing over the half duplex link is divided into a plurality of service periods. According to one embodiment of the present invention, the transfer of a read request transaction, from the first device to the second device, is scheduled in one service period. The transfer of a write transaction, from the first device to the second device, is scheduled such that the write transaction will not be transferred across the half duplex link in the same service period as returning memory read data is transferred across the half duplex link. According to another embodiment of the present invention, a first transaction associated with a first agent is scheduled in a first service period according to a global schedule. The global schedule associates the first service period with the first agent.

Abstract: A method includes setting a contention scheme for an asynchronous bus such that the contention delay of isochronous transactions on the asynchronous bus is bounded. A first device is coupled to the asynchronous bus to receive an isochronous transaction from an isochronous device and output the isochronous transaction to the asynchronous bus. A second device is coupled to the asynchronous bus to receive the isochronous transaction from the asynchronous bus and output the isochronous transaction to a third device.

Abstract: A method and system for reducing system bus load due to bandwidth reclamation on a Universal Serial Bus. A device residing on a USB may not be able to accept or provide data at the maximum rate that such data can move over the USB. In such case, for bulk transfers and control transfers, the transactions are likely to be continually retried because reliable data delivery is guaranteed. This causes a drain on the system bus through put for transactions which cannot complete. By throttling the rate at which transfers to such devices occur, a significant reduction in the load on the system through put bus can be achieved.

Abstract: Isochronous information is transferred between an IO device and a first buffer (N) of a plurality of buffers in a system memory. The isochronous information stored in the plurality of buffers is also stored in a memory cache accessible to a system processor. The state of the memory cache is managed according to an isochronous “X-T” contract that is independent of the “X-T” contact with which data are moved between the IO device and system memory. Further, data associated with a given buffer are moved into and out of the memory cache substantially simultaneously with the transfer of isochronous information between the IO device and other buffers in the system memory.

Abstract: A method and system for reducing system bus load due to bandwidth reclamation on a Universal Serial Bus. A device residing on a USB may not be able to accept or provide data at the maximum rate that such data can move over the USB. In such case, for bulk transfers and control transfers, the transactions are likely to be continually retried because reliable data delivery is guaranteed. This causes a drain on the system bus through put for transactions which cannot complete. By throttling the rate at which transfers to such devices occur, a significant reduction in the load on the system through put bus can be achieved.

Abstract: An architecture for the isochronous transfer of information within a computer system in which a first isochronous stream of information is transferred, and asynchronous information is transferred independently from the transfer of the first stream. A translation is performed between the first stream and a second isochronous stream of information, and the second stream transfers information at a rate substantially the same as the rate at which the first stream transfers information. The second stream and the asynchronous information are concurrently transferred. In another embodiment of the present invention, a first isochronous stream of information is transferred, and the first stream is divided into a plurality of first service periods. Each first service period has a first duration and contains a first amount of information. A second isochronous stream of information is transferred independently from the transfer of the first stream.

Abstract: An architecture is provided for isochronous access to memory in a system in which a stream of information may be sent to a memory unit. The stream is divided into a plurality of service periods with a specified maximum amount of information in selected service periods, and selected service periods have a first amount of information associated with asynchronous information and a second amount of information associated with isochronous information. In addition to sending a stream of information, a request for isochronous information from the memory unit may be sent. In this case, a stream of the requested information may be received from a memory unit a predetermined number of service periods after the sending of the request.

Abstract: Device drivers for removable system resources are stored on a mass storage device to provide dynamic device driver configuration for a computer system. By storing device drivers on a mass storage device, the device drivers need not be stored on their associated feature card and they can be easily updated as changes are required. The computer system comprises a processor, a system memory, a mass storage memory and an interface for receiving removable system resources (generally denoted feature cards or cards). Each feature card has a card information structure (CIS) area. The CIS includes one or more card identification fields that each hold a card identifier. The card identifier is the same for every feature card of a particular type, but it is unique for each different type of feature card.

Abstract: A Universal Serial Bus (USB) system is disclosed. The USB system includes a first host controller. A hub is coupled to the first host controller. A second host controller interfaces with the hub as a USB device. In one embodiment of the USB system, the second host controller is a wireless host controller. The second host controller includes a wireless system side module coupled to the hub and a wireless remote module containing host controller circuitry that receives signals from the wireless system side module. A method for interfacing a hub to a USB system is disclosed. A hub is coupled to a first host controller. The first host controller is coupled to a second hub connected to a second host controller that resides inside the computer.

Abstract: An extensible BIOS for a computer system to manage boot-up of an arbitrary number of devices connected over an arbitrary number of buses and bridges of varying type. The extensible BIOS identifies all bridges or buses connected to the system and then initializes each and every bus or bridge. The extensible BIOS identifies boot devices as resident on all initialized bridges and buses, and then detects and initializes drivers on the identified boot devices. According to the selection and priority of boot, boot-up then commences utilizing the boot devices. Between one instance of computer reset or boot-up and the next, the extensible BIOS provides that the hierarchy of buses and bridges and boot devices connected to them may be altered while still recognizing all boot relevant devices, buses and bridges regardless of the nature of the alteration.

Abstract: A program stored within an application memory storage area of a removable system resource has a more than one step and at least one of the steps requires a datum be written to a portion of the application storage area. The program is executed from the removable resource. A page table is built which has one page entry per page of the program. A given page entry maps a physical address for the page corresponding to the page entry to a virtual address for the corresponding page. Each page entry of the page table is marked to indicate that the page corresponding to the page entry has a read-only status. The program is then executed step-by-step. When the step requiring the datum to be written to the application storage area occurs, a faulting page is determined. The faulting page is the page that contains the portion of the application storage area to which the datum is to be written.

Abstract: An apparatus for handling the removal of a memory card from a computer system. The apparatus includes a socket for receiving the memory card having a first section of card detect pins and a second section of single pins. The second section is aligned with the first section during insertion of the card into the socket. The second section slides out with the card during removal of the card from the socket. The apparatus also includes an interrupt handler for transferring control to the interrupt handler upon a break in contact between the card and card detect pins in the socket. The interrupt handler disables signal lines connected to the signal pins before the second section begins pulling out from the card upon removal of the card from the socket.

Abstract: Device drivers for removable system resources are configured dynamically in a computer system having a processor, a system memory and an interface for receiving removable system resources (generally denoted feature cards). A feature card has a card memory area which stores a device driver for controlling the feature card. The feature card device driver is separated into two parts: 1) a full device driver portion, and 2) a stub device driver portion. The full device driver provides all of the device driver functionality necessary to control each and every function of the feature card. The device driver stub is a small compact portion of processing logic for linking the full device driver with operating system software located in the computer system. A fixed amount of system memory RAM is set aside at bootstrap initialization to contain the device driver stubs.

Abstract: Device drivers for removable system resources are configured dynamically in a computer system which has a processor, a system memory and an interface for receiving removable system resources (generally denoted feature cards). A feature card includes a card memory area that stores a device driver for controlling the feature card. The feature card device driver is separated into two parts: 1) a full device driver portion, and 2) a stub device driver portion. The full device driver provides all of the device driver functionality necessary to control each and every function of the feature card. The device driver stub is a small compact portion of processing logic for linking the full device driver with operating system software located in the computer system. There is an upper bound for the size of a device driver stub of a given feature card. Any system will have a known number of card slots.

Abstract: A computer system wherein the processing state of the system may be saved and restored on a mass storage device upon the occurrence of a triggering event. The computer system of the present invention comprises a processor and various memory areas and system resources. Main memory includes several areas including a system management area comprising a segment of isolated random access memory within main memory. The system management area may only be accessed while the processor is in a system management interrupt state. The remaining portions of main memory are freely accessible (i.e. non-isolated) by any interrupt or noninterrupt processing logic.

Abstract: A computer system for dynamically configuring device drivers of removable system resources. The computer system comprises a processor, a system memory and an interface for receiving removable system resources such as feature cards. Each feature card includes a card memory area comprising: 1) a full device driver portion, and 2) a stub device driver portion. Upon insertion of a card into the computer system, the device driver stub code image is read from the card memory area and transferred into an area of computer system memory. The device driver stub code is then executed by the processor of the computer system from computer system random access memory. Conversely, the full device driver code is not transferred to the computer system random access memory; rather, the full device driver is executed while still resident on the card. Upon execution, the device driver stub enables access to the full card resident device driver by allowing memory mapping to the full device driver.