Patents by Inventor Jong Hoon Shin

Jong Hoon Shin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240155212
    Abstract: A camera module includes: a first body including a substrate; an image sensor mounted on the substrate; a second body including a lens module; a ball bearing disposed between the first body and the second body to enable movement of the second body relative to the first body; and a driving member disposed between the first body and the second body to provide driving force to move the second body in at least one direction intersecting an optical axis.
    Type: Application
    Filed: May 16, 2023
    Publication date: May 9, 2024
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Do Hwan KIM, Ju Ho KIM, Sang Hyun JI, Jung Hyun PARK, Nam Keun OH, Doo Seub SHIN, Dong Hoon LEE, Jong Eun PARK, Sangik CHO
  • Patent number: 11978602
    Abstract: A switch apparatus, includes: a base module including a base case, and a moving magnet movably mounted in the base case; and a manipulation module including a manipulation case, and a first magnet fixedly mounted in the manipulation case, wherein the moving magnet moves between a hold position and a releasable position, the hold position refers to a position in which the manipulation module is held onto the base module as an attractive force acts between the moving magnet and the first magnet, and the releasable position refers to a position in which the manipulation module is releasable from the base module as a repulsive force acts between the moving magnet and the first magnet.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: May 7, 2024
    Assignees: Hyundai Motor Company, Kia Corporation, NOVATECH CO., LTD, ALPS ELECTRIC KOREA CO., LTD.
    Inventors: Sang Hoon Shin, Hoo Sang Lee, Jong Hyun Choi, Dae Woo Park, Youn Tak Kim, Nam I Jo, Choon Teak Oh, Hong Jun Choi, Kon Hee Chang, Woo Joo Ahn
  • Publication number: 20240139934
    Abstract: The inventive concept provides a teaching method for teaching a transfer position of a transfer robot. The teaching method includes: searching for an object on which a target object to be transferred by the transfer robot is placed, based on a 3D position information acquired by a first sensor; and acquiring coordinates of a second direction and coordinates of a third direction of the object based on a data acquired from a second sensor which is a different type from the first sensor.
    Type: Application
    Filed: March 8, 2023
    Publication date: May 2, 2024
    Applicant: SEMES CO., LTD.
    Inventors: Jong Min Lee, Kwang Sup Kim, Myeong Jun Lim, Young Ho Park, Yeon Chul Song, Sang Hyun Son, Jun Ho Oh, Ji Hoon Yoo, Joong Chol Shin
  • Patent number: 11967862
    Abstract: In a driving system, first and second inverters are connected to a driving motor, one end of a stator winding through which 3-phase current flows is connected to an output line of the first inverter, and the other end of the stator winding is connected to an output line of the second inverter. A winding pattern of the driving motor includes: coils wound in slots defined in the stator and to which 3-phase current is applied; coils wound on innermost and outermost sides based on a direction toward a rotating shaft of the driving motor in the slots, and being energized by different AC phases; and coils disposed between a first coil located on the outermost side and a second coil located on the innermost side, and being energized by the same AC phases as those of the first and second coils.
    Type: Grant
    Filed: November 16, 2021
    Date of Patent: April 23, 2024
    Assignees: HYUNDAI MOTOR COMPANY, KIA CORPORATION
    Inventors: Woong Chan Chae, Jung Shik Kim, Jong Hoon Lee, Byung Kwan Son, Sang Hoon Moon, Young Jin Shin
  • Publication number: 20240129725
    Abstract: A service identifying and processing method using a wireless terminal message according to an exemplary embodiment of the present invention includes (a) receiving a wireless terminal message by a first entity which is a mobile device; and (b) expressing, by a first agent which is an information processing application program installed on the first entity, entity information of second entity based on the wireless terminal message and service confirmation information related to service provided by the second entity, through an application screen by the first agent.
    Type: Application
    Filed: December 23, 2021
    Publication date: April 18, 2024
    Applicant: ESTORM CO., LTD.
    Inventors: Jong Hyun WOO, Tae Il LEE, Il Jin JUNG, Hee Jun SHIN, Hyung Seok JANG, Min Jae SON, Sang Heon BAEK, Seo Bin PARK, Hyo Sang KWON, Mi Ju KIM, Jung Hoon SONG, Rakhmanov DILSHOD, Dong Hee KIM, Jeon Gjin KIM
  • Publication number: 20240119270
    Abstract: A neural processing unit is reconfigurable to process a fine-grain structured sparsity weight arrangement selected from N:M=1:4, 2:4, 2:8 and 4:8 fine-grain structured weight sparsity arrangements. A weight buffer stores weight values and a weight multiplexer array outputs one or more weight values stored in the weight buffer as first operand values based on a selected fine-grain structured sparsity weight arrangement. An activation buffer stores activation values and an activation multiplexer array outputs one or more activation values stored in the activation buffer as second operand values based on the selected fine-grain structured weight sparsity in which each respective second operand value and a corresponding first operand value forms an operand value pair. A multiplier array outputs a product value for each operand value pair.
    Type: Application
    Filed: November 3, 2022
    Publication date: April 11, 2024
    Inventors: Jong Hoon SHIN, Ardavan PEDRAM, Joseph HASSOUN
  • Publication number: 20240095518
    Abstract: A memory system and a method are disclosed for training a neural network model. A decompressor unit decompresses an activation tensor to a first predetermined sparsity density based on the activation tensor being compressed, and decompresses an weight tensor to a second predetermined sparsity density based on the weight tensor being compressed. A buffer unit receives the activation tensor at the first predetermined sparsity density and the weight tensor at the second predetermined sparsity density. A neural processing unit receives the activation tensor and the weight tensor from the buffer unit and computes a result for the activation tensor and the weight tensor based on first predetermined sparsity density of the activation tensor and based on the second predetermined sparsity density of the weight tensor.
    Type: Application
    Filed: November 16, 2022
    Publication date: March 21, 2024
    Inventors: Ardavan PEDRAM, Jong Hoon SHIN, Joseph H. HASSOUN
  • Publication number: 20240095505
    Abstract: A neural processing unit is disclosed that supports dual-sparsity modes. A weight buffer is configured to store weight values in an arrangement selected from a structured weight sparsity arrangement or a random weight sparsity arrangement. A weight multiplexer array is configured to output one or more weight values stored in the weight buffer as first operand values based on the selected weight sparsity arrangement. An activation buffer is configured to store activation values. An activation multiplexer array includes inputs to the activation multiplexer array that are coupled to the activation buffer, and is configured to output one or more activation values stored in the activation buffer as second operand values in which each respective second operand value and a corresponding first operand value forming an operand value pair. A multiplier array is configured to output a product value for each operand value pair.
    Type: Application
    Filed: November 3, 2022
    Publication date: March 21, 2024
    Inventors: Jong Hoon SHIN, Ardavan PEDRAM, Joseph HASSOUN
  • Publication number: 20240095519
    Abstract: A neural network inference accelerator includes first and second neural processing units (NPUs) and a sparsity management unit. The first NPU receives activation and weight tensors based on an activation sparsity density and a weight sparsity density both being greater than a predetermined sparsity density. The second NPU receives activation and weight tensors based on at least one of the activation sparsity density and the weight sparsity density being less than or equal to the predetermined sparsity density. The sparsity management unit controls transfer of the activation tensor and the weight tensor based on the activation sparsity density and the weight sparsity density with respect to the predetermined sparsity density.
    Type: Application
    Filed: November 17, 2022
    Publication date: March 21, 2024
    Inventors: Ardavan PEDRAM, Ali SHAFIEE ARDESTANI, Jong Hoon SHIN, Joseph H. HASSOUN
  • Patent number: 11932326
    Abstract: An electric power steering device and method are disclosed. An electric power steering device according to an embodiment of the present invention comprises: a steering motor comprising a first winding and a second winding, each of Which receives applied three-phase power; a first control unit for controlling power supplied to the first winding; and a second control unit for controlling power supplied to the second winding, wherein, when one of a phase of the first winding and a phase of the second winding has failed to be opened, the control unit controlling the winding including the phase that has failed to be opened, among the first control unit and the second control unit, performs torque compensation control for additional output of compensation torque.
    Type: Grant
    Filed: July 23, 2020
    Date of Patent: March 19, 2024
    Assignee: HL MANDO CORPORATION
    Inventors: Seong Woo Shin, Jong Hoon Lee
  • Publication number: 20240088751
    Abstract: A motor includes a rotor and a stator, in which the rotor includes: a rotor core including a plurality of core portions disposed on a rotation shaft along an axial direction of the rotor, wherein the rotor core includes a core flow path through which a cooling fluid passes through each core portion; and a cooling plate which is inserted between the two divided core portions so that both surfaces are joined to the two neighboring core portions, and a distribution flow path that distributes the cooling fluid supplied from a cooling flow path of the rotation shaft into the core flow path of the two neighboring core portions is provided between at least one of the two neighboring core portions and the cooling plate.
    Type: Application
    Filed: February 1, 2023
    Publication date: March 14, 2024
    Applicants: Hyundai Motor Company, Kia Corporation
    Inventors: Jung Woo LEE, Young Jin SHIN, Ju Ho LEE, Young Chul KIM, Jong Hoon LEE
  • Publication number: 20240075853
    Abstract: An apparatus of tilting a seat cushion of a vehicle, includes a tilting motor, a pinion gear, a sector gear, and a tilting link which perform the tilting operation of the seat cushion and exert a binding force in a tilted state of the seat cushion and are provided to be connected to both of one side and the other side of a seat cushion frame, and has two sector gears positioned on left and right sides and connected to each other by a connection bar so that, by strengthening a binding force of the front portion of the seat cushion, it is possible to secure the safety of passengers in the event of a collision.
    Type: Application
    Filed: April 13, 2023
    Publication date: March 7, 2024
    Applicants: Hyundai Motor Company, Kia Corporation, DAS CO., LTD, Faurecia Korea, Ltd., Hyundai Transys Inc.
    Inventors: Sang Soo LEE, Mu Young KIM, Sang Hark LEE, Ho Suk JUNG, Sang Do PARK, Chan Ho JUNG, Dong Hoon LEE, Hea Yoon KANG, Deok Soo LIM, Seung Pil JANG, Seon Ho KIM, Jong Seok YUN, Hyo Jin KIM, Dong Gyu SHIN, Jin Ho SEO, Young Jun KIM, Taek Jun NAM
  • Publication number: 20240074065
    Abstract: A reprint apparatus may include: a defect checking unit configured to check a defective portion in a solder resist layer of a circuit board; a material filling unit positioned above the circuit board to fill the defective portion with a filling material; and a curing unit configured to cure the material filled in the defective portion. The defect checking unit may be configured to calculate a volume of the defective portion, and the material filling unit may be configured to calculate a discharge amount of the filling material based on the calculated volume of the defective portion, and then discharge the filling material by the discharge amount.
    Type: Application
    Filed: February 17, 2023
    Publication date: February 29, 2024
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Do Jae YOO, Yong Gil NAMGUNG, Jong Hoon SHIN, Sang Soon CHOI, Young Chul AN
  • Publication number: 20240032201
    Abstract: A printed circuit board (PCB) includes a solder resist layer including at least one of an opening and a depression and a solder resist patch disposed in at least one of the opening and the depression to have an interface with the solder resist layer in at least one of the opening and the depression.
    Type: Application
    Filed: January 27, 2023
    Publication date: January 25, 2024
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Do Jae Yoo, Yong Gil Namgung, Jong Hoon Shin, Won Ju Jang, Yun Hwan Kim
  • Patent number: 11874928
    Abstract: Provided is a security device, an electronic device, a secure boot management system, a method for generating a boot image and a method for executing a boot chain. The security device includes a key deriver configured to receive a root key and a protected boot key included in a boot image and generate a derived key according to a key protection method using the root key and the protected boot key, a key processor configured to perform verification according to the key protection method using the generated derived key to extract a boot key from the protected boot key included in the boot image, a secure booter configured to perform verification on a protected execution image included in the boot image using the extracted boot key, and a processor configured to execute a verified execution image on which the verification has been completed by the secure booter.
    Type: Grant
    Filed: August 24, 2020
    Date of Patent: January 16, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ki Seok Bae, Jong Hoon Shin, Ki Tak Kim, Hye Soo Lee, Jin Su Hyun, Hyo Sun Hwang
  • Publication number: 20220405557
    Abstract: A system and a method is disclosed for processing input feature map (IFM) data of a current layer of a neural network model using an array of reconfigurable neural processing units (NPUs) and storing output feature map (OFM) data of the next layer of the neural network model at a location that does not involve a data transfer between memories of the NPUs according to the subject matter disclosed herein. The reconfigurable NPUs may be used to improve NPU utilization of NPUs of a neural processing system.
    Type: Application
    Filed: August 11, 2021
    Publication date: December 22, 2022
    Inventors: Jong Hoon SHIN, Ali SHAFIEE ARDESTANI, Joseph H. HASSOUN
  • Publication number: 20220405558
    Abstract: A core of neural processing units is configured to efficiently process a depthwise convolution by maximizing spatial feature-map locality using adder trees. Data paths of activations and weights are inverted, and 2-to-1 multiplexers are every 2/9 multipliers along a row of multipliers. During a depthwise convolution operation, the core is operated using a RS×HW dataflow to maximize the locality of feature maps. For a normal convolution operation, the data paths of activations and weights may be configured for a normal convolution configuration and in which multiplexers are idle.
    Type: Application
    Filed: August 12, 2021
    Publication date: December 22, 2022
    Inventors: Jong Hoon SHIN, Ali SHAFIEE ARDESTANI, Joseph H. HASSOUN
  • Patent number: 11392725
    Abstract: Provided are a security processor for performing a remainder operation by using a random number and an operating method of the security processor. The security processor includes a random number generator configured to generate a first random number; a modular calculator configured to generate a first random operand based on first data and the first random number and generate output data through a remainder operation on the first random operand, wherein a result value of the remainder operation on the first input data is identical to a result value of the remainder operation on the first random operand.
    Type: Grant
    Filed: August 9, 2019
    Date of Patent: July 19, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-hyeok Kim, Jong-hoon Shin, Ji-su Kang, Hyun-il Kim, Hye-soo Lee, Hong-mook Choi
  • Publication number: 20220156569
    Abstract: A general matrix-matrix (GEMM) accelerator core includes first and second buffers, and a processing element (PE). The first buffer receives a elements of a matrix A of activation values. The second buffer receives b elements of a matrix B of weight values. The matrix B is preprocessed with a nonzero-valued b element replacing a zero-valued b element in a first row of the second buffer based on the zero-valued b element being in the first row of the second buffer. Metadata is generated that includes movement information of the nonzero-valued b element to replace the zero-valued b element. The PE receives b elements from a first row of the second buffer and a elements from the first buffer from locations in the first buffer that correspond to locations in the second buffer from where the b elements have been received by the PE as indicated by the metadata.
    Type: Application
    Filed: November 8, 2021
    Publication date: May 19, 2022
    Inventors: Jong Hoon SHIN, Ali SHAFIEE ARDESTANI, Joseph H. HASSOUN
  • Publication number: 20220156568
    Abstract: A general matrix-matrix (GEMM) accelerator core includes first and second buffers, a control logic circuit, and a first processing element (PE). The first buffer receives a elements of a first matrix A of activation values. The second buffer receives b elements of a second matrix B of weight values. The control logic circuit replaces a zero-valued a element in a first column of the first buffer with a nonzero-valued a element that is within a maximum borrowing distance of a location of the zero-valued a element in the first column of the first buffer. The PE receives a elements from the first column of the first buffer including the nonzero-valued element a selected to replace the zero-valued a element and receives b elements from locations in the second buffer that correspond to locations in the first buffer from where the a elements have been received by the PE.
    Type: Application
    Filed: November 8, 2021
    Publication date: May 19, 2022
    Inventors: Jong Hoon SHIN, Ali SHAFIEE ARDESTANI, Joseph H. HASSOUN