Abstract: An interposer for interconnection between microelectronic circuit panels has contacts at its surfaces. Each contact extends from a central conductor, and has a peripheral portion adapted to contract radially inwardly toward the central conductor response to a force applied by a contact pad defining a central hole on the engaged circuit panel. Thus, when the circuit panels are compressed with the interposers, the contacts contract radially inwardly and wipe across the pads. The wiping action facilitates bonding of the contacts to the pads, as by friction welding, or by a conductive bonding material carried on the contacts themselves.

Abstract: An interposer for interconnection between microelectronic circuit panels has contacts at its surfaces. Each contact extends from a central conductor, and has a peripheral portion adapted to contract radially inwardly toward the central conductor response to a force applied by a contact pad defining a central hole on the engaged circuit panel. Thus, when the circuit panels are compressed with the interposers, the contacts contract radially inwardly and wipe across the pads. The wiping action facilitates bonding of the contacts to the pads, as by friction welding, or by a conductive bonding material carried on the contacts themselves.

Abstract: A probe card for testing an electrical element such as a semiconductor wafer or a printed wiring board includes a substrate with circuitry thereon, an encapsulant layer overlying the substrate and a multiplicity of leads extending upwardly from the substrate through the encapsulant layer to terminals, the terminals projecting above the encapsulant layer. The probe card can be engaged with the electronic element so that the tips of the leads bear on the contact pads of the electronic element, and so that the leads and encapsulant layer deform to accommodate irregularities in the electronic element or probe card. The card can be made by providing the substrate, a sacrificial layer and leads extending between the sacrificial layer and substrate, moving the substrate and sacrificial layer away from one another to deform the leads and injecting a curable material around the leads to form the encapsulant layer.

Abstract: A method of treating an interposer layer includes disposing an interposer layer between a semiconductor wafer and a substrate so that voids within the interposer layer are sealed and applying pressure to substantially eliminate the voids. A method of creating a substantially void-free interposer layer includes injecting the interposer layer between a wafer and a substrate and applying pressure to substantially remove the voids.

Abstract: In a semiconductor device having a semiconductor die without an ESD circuit and a separate ESD circuit and an external lead, the external lead is first bonded to the separate ESD circuit. Thereafter, the separate ESD circuit is bonded to the semiconductor die. As a result, in the process of bonding the semiconductor die, any ESD disturbance is absorbed by the ESD circuit. In addition, a semiconductor device such as a DDR DRAM memory device, has a chip carrier with a first surface having a plurality of leads and a second surface opposite to it with an aperture between them. A semiconductor die with a mounting surface and a bonding pad faces the second surface with the bonding pad in the aperture. An ESD circuit is mounted on the mounting surface in the aperture. A first electrical connector connects one of a plurality of leads to the ESD circuit and a second electrical connector connects the ESD circuit to the bonding pad.

Abstract: A method of making a semiconductor chip assembly includes the steps of providing a semiconductor chip with contacts and a dielectric substrate wiring layer with terminals, forming a plurality of conductive elastomeric posts such that each post connects one terminal to one contact, and after forming the conductive elastomeric posts, injecting compliant material between the semiconductor chip and the dielectric substrate wiring layer to form a compliant layer.

Abstract: Microelectronic contacts, such as flexible, tab-like, cantilever contacts, are provided with asperities disposed in a regular pattern. Each asperity has a sharp feature at its tip remote from the surface of the contact. As mating microelectronic elements are engaged with the contacts, a wiping action causes the sharp features of the asperities to scrape the mating element, so as to provide effective electrical interconnection and, optionally, effective metallurgical bonding between the contact and the mating element upon activation of a bonding material.

Abstract: A microelectronic package including an optoelectronic element having a front face including contacts and a rear surface; flexible conductive leads having first ends connected to the contacts and second ends connected to conductive pads adjacent the optoelectronic element; and an at least partially transparent encapsulant covering the optoelectronic element, the flexible leads and the conductive pads, the conductive pads being exposed on a bottom surface of the encapsulant, the bottom surface of the encapsulant defining a bottom of the package, wherein the encapsulant at the bottom of the package extends between the conductive pads.

Abstract: A method of encapsulating a microelectronic assembly comprises providing a microelectronic assembly having an element defining exterior surfaces and an array of terminals exposed at the exterior surfaces. The element defines an aperture through the exterior surfaces. A layer of a curable barrier material is screen printed onto a supporting element. The supporting element is assembled with the microelectronic assembly so that the layer of curable barrier material contacts the exterior surfaces and covers said one or more apertures. An encapsulant is applied to the microelectronic assembly.

Abstract: A probe card for testing electronic elements includes a layer of dielectric material provided with a plurality of cavities supported on a substrate. A mass of fusible conductive material having a melting temperature below about 150° C. is disposed in each of said cavities, the dielectric material electrically insulating the masses of fusible conductive material from one another. A probe tip of conductive material having a melting temperature greater than about 150° C. is provided at one common end of each of the masses of fusible conductive material. The probe contacts are separated from an adjacent probe contact by at least one channel formed with the layer of dielectric material.

Abstract: A method of making a microelectronic package includes providing a sacrificial layer having a first surface and providing an optoelectronic element having a front face including one or more contacts and a rear surface and securing the rear surface of the optoelectronic element over the first surface of the sacrificial layer. The one or more contacts are then electrically interconnected with one or more conductive pads on the sacrificial layer and a curable and at least partially transparent encapsulant is provided over the first surface of the sacrificial layer so as to encapsulate the optoelectronic element and the conductive pads. The encapsulant is then cured the sacrificial layer is at least partially removed so as to leave said one or more conductive pads on a bottom surface of the encapsulant, the bottom surface of the encapsulant defining the bottom of the package.

Abstract: A connection component is provided. The connection component includes (1) a first interposer having a first surface to which a microelectronic may be mounted and a second surface opposite from the first surface, (2) a second interposer that is more flexible than the first interposer and that is disposed under the second surface of the rigid interposer, and (3) a plurality of conductive parts that may be positioned in the first and second interposers and that may be exposed at the first surface of the first interposer, a bottom surface of the second interposer, or both the first and bottom surfaces. The electrically conductive parts may include leads. A socket assembly or a microelectronic element such as semiconductor chip may be mounted onto the first surface of the rigid interposer. The connection component may be mounted onto a support substrate.

Abstract: A connection component for a microelectronic device such as a semiconductor chip incorporates a support layer and conductive structures extending across a surface of the support layer. The conductive structures have anchors connecting them to the support layer, and releasable or unanchored portions.

Abstract: A component for mounting semiconductor chips or other microelectronic units includes a compliant, sheet-like body with arrays of sheet-like conductive pads on upper and lower surfaces of the body. Flexible leads extending through the body interconnect conductive pads on the upper and lower surfaces. The leads are desirably formed from wire, such as gold wire, that is bonded to the conductive pads using a conductive epoxy or a eutectic bonding alloy. The component is made using sacrificial base sheets having conductive terminal portions to which the leads are initially bonded. The compliant body is formed by injecting a flowable material between the base sheets, curing the material and removing the base sheets by etching. The flowable material surrounds the leads such that the leads are supported by the cured compliant layer. The component may be used as an interposer or as a test socket.

Abstract: Releasable leads having an elongated fixed portion extend over a surface defined by a dielectric material of a component or by a semiconductor body. A semiconductor element having a conductive structure connected to a set of contacts is also disclosed. A method of making the conductive structure is disclosed.

Abstract: A connection component is made by providing an assembly comprising a base layer of a dielectric material, a metal layer overlying the base layer, and a top layer of a plasma-etchable material overlying the metal layer; forming openings in the top layer to produce a top layer mask; and forming first conductive elements from the metal layer by removing metal from regions of the metal layer aligned with the openings in the top layer mask. This method may be used to form a connection component having vias or bond windows formed therein for connection with other elements of a microelectronic device and conductive elements may be formed on either or both sides of the base layer.

Abstract: A method of encapsulating a microelectronic assembly comprises providing a microelectronic assembly having an element defining exterior surfaces and an array of terminals exposed at the exterior surfaces. The element defines an aperture through the exterior surfaces. A layer of a curable barrier material is screen printed onto a supporting element. The supporting element is assembled with the microelectronic assembly so that the layer of curable barrier material contacts the exterior surfaces and covers said one or more apertures. An encapsulant is applied to the microelectronic assembly.

Abstract: A method of treating an interposer layer includes disposing an interposer layer between a semiconductor wafer and a substrate so that voids within the interposer layer are sealed and applying pressure to substantially eliminate the voids. A method of creating a substantially void-free interposer layer includes injecting the interposer layer between a wafer and a substrate and applying pressure to substantially remove the voids.

Abstract: A probe card for testing an electrical element such as a semiconductor wafer or a printed wiring board includes a substrate with circuitry thereon, an encapsulant layer overlying the substrate and a multiplicity of leads extending upwardly from the substrate through the encapsulant layer to terminals, the terminals projecting above the encapsulant layer. The probe card can be engaged with the electronic element so that the tips of the leads bear on the contact pads of the electronic element, and so that the leads and encapsulant layer deform to accommodate irregularities in the electronic element or probe card. The card can be made by providing the substrate, a sacrificial layer and leads extending between the sacrificial layer and substrate, moving the substrate and sacrificial layer away from one another to deform the leads and injecting a curable material around the leads to form the encapsulant layer.

Abstract: A microelectronic assembly includes a microelectronic element having a first surface including a central region and a peripheral region surrounding the central region, the microelectronic element including a plurality of contacts disposed in the central region. The microelectronic assembly also includes a compliant layer overlying the peripheral region of the first surface, the compliant layer having a bottom surface facing toward the first surface of the microelectronic element, a top surface facing upwardly away from the first surface of the microelectronic element and one or more edge surfaces extending between the top and bottom surfaces of the compliant layer. A plurality of flexible bond ribbons are disposed over the compliant layer so that the bond ribbons extend over the top surface and one or more of the edge surfaces and the bond ribbons electrically connect the contacts to conductive terminals overlying the top surface of the compliant layer.