Patents by Inventor Jun He

Jun He has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230251306
    Abstract: The present disclosure provides a method and a system for testing semiconductor device. The method includes the following operations. A wafer having an IC formed thereon is provided. The IC is energized by raising the voltage of the IC to a first voltage level during a first period. A stress signal is applied to the IC. The stress signal includes a plurality of sequences during a second period subsequent to the first period. Each of the sequence has a ramp-up stage and a ramp-down stage. The stress signal causes the voltage of the IC to fluctuate between a second voltage level and a third voltage level. Whether the IC complies with a test criterion is determined after applying the stress signal.
    Type: Application
    Filed: April 17, 2023
    Publication date: August 10, 2023
    Inventors: JUN HE, YU-TING LIN, WEI-HSUN LIN, YUNG-LIANG KUO, YINLUNG LU
  • Patent number: 11710065
    Abstract: The present disclosure relates to systems, methods, and non-transitory computer readable media for determining send times to provide electronic communications based on predicted response rates by utilizing a Bayesian approach and multi-armed bandit algorithms. For example, the disclosed systems can generate predicted response rates by training and utilizing one or more response rate prediction models to generate a weighted combination of user-specific response information and population-specific response information. The disclosed systems can further utilize a Bayes upper-confidence-bound send time model to determine send times that are more likely to elicit user responses based on the predicted response rates and further based on exploration and exploitation considerations.
    Type: Grant
    Filed: April 1, 2019
    Date of Patent: July 25, 2023
    Assignee: Adobe Inc.
    Inventors: Jun He, Shiyuan Gu, Zhenyu Yan, Wuyang Dai, Yi-Hong Kuo, Abhishek Pani
  • Publication number: 20230231359
    Abstract: A multi-wavelength multi-port laser and router. By arranging a reflective facet at one end of the port-selection semiconductor optical amplifier and a partial reflector at one end of the wavelength-selection semiconductor optical amplifier, and cooperating with the intra-cavity wavelength router to form N×N optical resonant cavities, so that each optical resonant cavity can only emit the wavelength corresponding to the lowest round-trip loss between input and output ports. The extra-cavity wavelength router is mirrored with respect to the intra-cavity wavelength router, so that one or more wavelengths of light excited by any port-selection semiconductor optical amplifier can be transmitted from the corresponding output port of the extra-cavity wavelength router.
    Type: Application
    Filed: March 17, 2023
    Publication date: July 20, 2023
    Inventors: Jiasheng ZHAO, Jia GUO, Jian-jun HE
  • Publication number: 20230225538
    Abstract: A power transfer system to facilitate the transfer of electrical power between tree trunk sections of an artificial tree is disclosed. The power transfer system can advantageously enable neighboring tree trunk sections to be electrically connected without the need to rotationally align the tree trunk sections. Power distribution systems can be disposed within the trunk sections. The power distribution systems can comprise a male end, a female end, or both. The male ends can have prongs and the female ends can have voids. The prongs can be inserted into the voids to electrically connect the power distribution systems of neighboring tree trunk sections. In some embodiments, the prongs and voids are designed so that the prongs of one power distribution system can engage the voids of another power distribution system without the need to rotationally align the tree trunk sections.
    Type: Application
    Filed: March 13, 2023
    Publication date: July 20, 2023
    Inventors: Chi Yin Alan Leung, Chang Jun He, Chi Kin Samuel Kwok
  • Patent number: 11705165
    Abstract: Embodiments of the disclosure, there is provided a method, a system for adjusting the memory, and a semiconductor device. The method for adjusting the memory includes: acquiring a mapping relationship between a temperature of a transistor, an equivalent width-length ratio of a sense amplifier transistor in a sense amplifier and an actual time at which the data is written into the memory; acquiring a current temperature of the transistor; and adjusting the equivalent width-length ratio, based on the current temperature and the mapping relationship, so that the actual time at which the data is written into the memory corresponding to the adjusted equivalent width-length ratio is within a preset writing time.
    Type: Grant
    Filed: October 26, 2021
    Date of Patent: July 18, 2023
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Shu-Liang Ning, Jun He, Zhan Ying, Jie Liu
  • Publication number: 20230219935
    Abstract: The invention discloses a 4-(N-methyl) aminopiperidine myricetin derivative containing dithiocarbamate, and its preparation method and application, whose structural general formula is shown as follows: wherein R is substituted phenyl and substituted aromatic heterocyclic group; n is the number of carbons in the carbon chain, which are 2, 3, 4 and 5 respectively; the substitute phenyl group is an alkyl group containing C1-6, alkoxy group containing C1-6, nitro group, halogen atom or hydrogen atom in ortho-, meta- and para- position on that benzene ring; the aromatic heterocyclic group is thienyl, furyl, pyrrolyl and pyridyl groups; the substituents on the substituted aromatic heterocycle are o-, m-, and p- containing C1-6 alkyl, C1-6 alkoxy, nitro, halogen, and hydrogen atoms. The invention has better inhibitory activity on cancer cells.
    Type: Application
    Filed: December 5, 2019
    Publication date: July 13, 2023
    Inventors: Wei Xue, Shichun Jiang, Ziyou Huai, Xu Tang, Yinjiu Huang, Liwei Liu, Mei Chen, Jun He, Shijun Su
  • Publication number: 20230223326
    Abstract: A chip package structure and a storage system are provided. The chip package structure includes a chipset, a first Re-Distribution Layer (RDL), and a bonding pad region. The chipset includes a plurality of chips distributed horizontally. The first RDL is disposed on a first surface of the chipset. The bonding pad region includes a plurality of bonding pads, the plurality of bonding pads are located on a side surface of the first RDL away from the chipset, and the plurality of bonding pads are connected to the plurality of chips through the first RDL.
    Type: Application
    Filed: June 20, 2022
    Publication date: July 13, 2023
    Inventors: SHU-LIANG NING, Jun HE, Jie LIU, Zhan YING
  • Patent number: 11700322
    Abstract: A service process control method includes selecting, according to an execution policy of at least one service deployed on a network device, M data processors for processing a packet received by the network device, determining a processing sequence for the selected M data processors to process the packet, and invoking the selected M data processors to sequentially process, according to the processing sequence, the packet. An execution sequence for a data processor to process the packet is dynamically generated according to a policy set corresponding to the service.
    Type: Grant
    Filed: December 28, 2021
    Date of Patent: July 11, 2023
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Uri Hasson, Shengjun Tang, Jun He
  • Publication number: 20230187799
    Abstract: A filter structure and a filter device provided by the present application relate to the technical field of electronic devices. The filter structure includes: a shielding component, which includes a first shielding layer and a second shielding layer, which are arranged opposite each other at an interval; at least two resonance components, which are arranged at an interval, wherein each resonance component includes a resonance column and a resonance disk connected to the resonance column, and the resonance column is located between the first shielding layer and the second shielding layer and is connected to the first shielding layer; and a coupling enhancement component, which is respectively arranged at intervals from the first shielding layer and the second shielding layer, and is respectively connected to at least two resonance columns, so as to increase a coupling coefficient between the at least two resonance columns.
    Type: Application
    Filed: April 2, 2021
    Publication date: June 15, 2023
    Inventors: Jian NIU, Chengjie ZUO, Jun HE
  • Publication number: 20230178475
    Abstract: A chip package and a method of fabricating the same are disclosed. The chip package includes a substrate with a first region, a second region surrounding the first region, and a third lane region surrounding the second region, a device layer disposed on the substrate, a via layer disposed on the device layer, an interconnect structure disposed on the via layer, and a stress buffer layer with tapered side profiles disposed on the interconnect structure. First and second portions of the via layer above the first and second regions include first and second set of vias. First, second, and third portions of the interconnect structure above the first, second, and third regions include conductive lines connected to the devices, a first set of dummy metal lines connected to the second set of vias, and a second set of dummy metal lines.
    Type: Application
    Filed: June 3, 2022
    Publication date: June 8, 2023
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jun HE, Li-Hsien Huang, Yao-Chun Chuang, Chih-Lin Wang, Shih-Kang Tien
  • Patent number: 11667604
    Abstract: A phenyl-containing compound, an intermediate thereof, a preparation method therefor and an application thereof. Provided is a compound represented by formula I or a pharmaceutically acceptable salt thereof, where R1, R2, R3, R4 and R5 are independently hydrogen, C1-C6 alkyl, C1-C6 alkoxy or C(?O)OR8; where R8 is C1-C4 alkyl; R6 is (II), (III) or (IV); and R7 is —OH, —NH2, —NHCH3, —N(CH3)2 or C1-4 alkoxy. The compound has a low critical micelle concentration (CMC) and good dilution resistance and is capable of enclosing an insoluble drug to form a small-molecule micelle having a high drug loading capacity and good stability.
    Type: Grant
    Filed: July 14, 2020
    Date of Patent: June 6, 2023
    Assignees: SHANGHAI MODERN PHARMACEUTICAL ENGINEERING RESEARCH CENTER CO., LTD., SHANGHAI INSTITUTE OF PHARMACEUTICAL INDUSTRY
    Inventors: Jun He, Zhefeng Wang, Yuezhu Zhao, Yani Yang, Qinghui Fu, Wei Bian, Yuan Zhao, Chen Ge, Yue Zhang, Bing Yi, Minghao Niu, Jiuhui Zhang
  • Publication number: 20230170869
    Abstract: A resonance circuit and a filtering device, which relate to the technical field of electronic devices. The resonance circuit includes: a connection port, wherein the connection port includes a first port and a second port; and a resonance unit, wherein the resonance unit includes at least one inductor element and at least one capacitor element, and the inductor element is connected to the capacitor element. The first port and the second port are respectively connected to the resonance unit, so as to form at least two branches which are connected in parallel, and at least one of the first port and the second port is not connected to any of the capacitor elements.
    Type: Application
    Filed: March 9, 2021
    Publication date: June 1, 2023
    Inventors: Wei CHENG, Lijie DAI, Chengjie ZUO, Jun HE
  • Publication number: 20230170258
    Abstract: An integrated circuit chip package and a method of fabricating the same are disclosed. The method includes forming a device layer on a substrate with a first die and a second die, forming an interconnect structure on the device layer, depositing an insulating layer on the interconnect structure, forming first and second conductive pads on the interconnect structure, forming first and second conductive vias on the first and second conductive pads, respectively, patterning a polymer layer to form first and second buffer layers with tapered side profiles on the first and second conductive vias, respectively, forming a trench in the substrate and between the first and second buffer layers, and dicing the substrate through the trench to separate the first die from the second die. Portions of the first and second conductive pads extend over the insulating layer.
    Type: Application
    Filed: June 6, 2022
    Publication date: June 1, 2023
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Li-Hsien HUANG, Yao-Chun CHUANG, Hua-Wei TSENG, Yu-Jin HU, Jun HE
  • Patent number: 11648707
    Abstract: An in-situ square sample acquisition device and method for a bond contact test of a surrounding rock and a shotcrete layer are provided, the device includes a supporting shell, a fixing structure, hollow adjusting bolts and two borehole positioning frames, a guide hole is provided in a middle of the supporting shell, the frames are slidably fit in the guide hole, a plurality of positioning holes are provided in side walls of each of the frames, and the positioning holes in different frames are distributed in a staggered manner, four corners of the supporting shell are connected with four hollow adjusting bolts respectively, one end of each of the hollow adjusting bolts is fixedly provided with an adjusting nut, four fixing lugs are provided in four corners of each frame respectively, and the fixing structure includes four connecting bolts and four nuts.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: May 16, 2023
    Assignee: Changjiang River Scientific Research Institute, Changjiang Water Resources Commission
    Inventors: Xiuli Ding, Shuling Huang, Yang Qin, Yuting Zhang, Zhiyang Gao, Dengxue Liu, Jun He
  • Publication number: 20230148251
    Abstract: Disclosed provides a compound nutrient capable of repairing damaged intestinal tract of piglets and application thereof. The compound nutrient comprises the following components in weight percentage: organic acid 30-50%, amino acid 20-30%, enzyme preparation 8-15%, Bacillus subtilis 5-15%, mineral element 4-6%, glucose 5-20%. The enzyme preparation includes amylase, lipase and protease, and the weight ratio of amylase, lipase and protease is 1-2:1:1-2. The compound nutrient can repair the intestinal health of piglets with diarrhea, reduce the rate of diarrhea, and improve the growth performance.
    Type: Application
    Filed: November 18, 2021
    Publication date: May 11, 2023
    Inventors: Ping Zheng, Daiwen Chen, Bing Yu, Jun He, Jie Yu
  • Patent number: 11645542
    Abstract: The present disclosure relates to systems, methods, and non-transitory computer readable media for generating a target distribution schedule for providing electronic communications based on predicted behavior rates by utilizing a genetic algorithm and one or more objective functions. For example, the disclosed systems can generate predicted behavior rates by training and utilizing one or more behavior prediction models. Based on the predicted behavior rates, the disclosed systems can further utilize a genetic algorithm to apply objective functions to generate one or more candidate distribution schedules. In accordance with the genetic algorithm, the disclosed systems can select a target distribution schedule for a particular user/client device. The disclosed systems can thus provide one or more electronic communications to individual users based on respective target distribution schedules.
    Type: Grant
    Filed: April 15, 2019
    Date of Patent: May 9, 2023
    Assignee: Adobe Inc.
    Inventors: Lei Zhang, Jun He, Zhenyu Yan, Wuyang Dai, Abhishek Pani
  • Publication number: 20230135872
    Abstract: To maximize power saving in a radio access network comprising cells, an optimal action amongst actions comprising switching on one or more cells, switching off one or more cells, and doing nothing is determined using a trained model, which maximizes a long term reward on tradeoff between throughput and power, the trained model taking as input a load estimate. The trained model may be updated online using measurement results on load, throughput and power consumption.
    Type: Application
    Filed: October 28, 2022
    Publication date: May 4, 2023
    Inventors: Vaibhav SINGH, Anand BEDEKAR, Jun HE
  • Publication number: 20230131193
    Abstract: The invention discloses a 4-(N-methyl) aminopiperidine myricetin derivatives containing sulfonamide, a preparation method and application, whose structural general formula is shown as follows: Wherein, R is substituted phenyl and substituted aromatic heterocyclic group; n is the number of carbon in the carbon chain and is 2, 3, 4 and 5 respectively. The substituted phenyl group is an alkyl group containing C1-6, an alkoxy group containing C1-6, a nitro group, a halogen atom or a hydrogen atom in ortho, meta and para positions on the benzene ring. The substituted aromatic heterocyclic group is thienyl, furyl, pyrrolyl, pyridyl, etc., and the substituent on the aromatic heterocyclic ring is an alkyl group containing C1-6, alkoxy group of C1-6, nitro group, halogen atom or hydrogen atom in ortho, meta and para positions. The invention has a better control effect on inhibiting plant germs and can be used as an agricultural bactericide.
    Type: Application
    Filed: December 9, 2019
    Publication date: April 27, 2023
    Inventors: Wei Xue, Shichun Jiang, Ying Chen, Shijun Su, Jun He, Mei Chen, Meimei Jin, Ming He, Jun Wang
  • Publication number: 20230126683
    Abstract: A memory is provided. The memory includes: a control chip; and a plurality of storage chips, in which the plurality of storage chips are electrically connected with the control chip via a common communication channel, the plurality of storage chips are configured to perform information interaction with the control chip by adopting different clock edges of a first clock signal, the first clock signal has a first clock cycle, the different clock edges include two consecutive rising edges and/or two consecutive falling edges, the plurality of storage chips are further configured to receive a second clock signal and distinguish the different clock edges based on the second clock signal, and a second clock cycle of the second clock signal is greater than the first clock cycle.
    Type: Application
    Filed: May 9, 2022
    Publication date: April 27, 2023
    Inventors: SHU-LIANG NING, Jun HE, Zhan YING, Jie LIU
  • Patent number: D985668
    Type: Grant
    Filed: April 26, 2022
    Date of Patent: May 9, 2023
    Inventor: Jun He