Patents by Inventor Junji Hirase

Junji Hirase has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230336886
    Abstract: An imaging device includes a charge accumulator, a first transistor, and a first capacitive element. The first transistor has a first source, a first drain, and a first gate electrode electrically connected to one of the first source and the first drain. The first capacitive element holds the charges and has a first terminal. A fixed potential is supplied to the other of the first source and the first drain. One of the first source and the first drain is always electrically connected to the first terminal of the first capacitive element from start to end of an exposure period.
    Type: Application
    Filed: June 26, 2023
    Publication date: October 19, 2023
    Inventors: MASASHI MURAKAMI, MAKOTO SHOUHO, YOSHIHIRO SATO, KAZUKO NISHIMURA, JUNJI HIRASE
  • Publication number: 20230290793
    Abstract: An imaging device includes: a photoelectric converter that generates a signal charge by photoelectric conversion; a semiconductor substrate that includes a first semiconductor layer containing an impurity of a first conductivity type; a charge accumulation region that is an impurity region of a second conductivity type in the first semiconductor layer and that accumulates the signal charge; a transistor that includes, as one of a source and a drain, a first impurity region of the second conductivity type in the first semiconductor layer; and a blocking structure located between the charge accumulation region and the first impurity region. The blocking structure includes a second impurity region of the first conductivity type in the first semiconductor layer and a third impurity region of the first conductivity type in the first semiconductor layer, the third impurity region having an impurity concentration different from that of the second impurity region.
    Type: Application
    Filed: May 15, 2023
    Publication date: September 14, 2023
    Inventors: MORIKAZU TSUNO, JUNJI HIRASE
  • Publication number: 20230262364
    Abstract: An imaging device includes a first photoelectric converter that converts light into a charge, a first charge storage that stores the charge, a first capacitor, an output circuit electrically connected to the first capacitor, and a first interposing transistor including a gate electrode, a source, and a drain. A potential of the first charge storage, a potential of the gate electrode, and a potential of one of the source and the drain are continuously the same during a control cycle period. By turning on the first interposing transistor, the first charge storage and the first capacitor are electrically connected.
    Type: Application
    Filed: April 19, 2023
    Publication date: August 17, 2023
    Inventors: SOGO OTA, JUNJI HIRASE
  • Publication number: 20230253422
    Abstract: An imaging device including a semiconductor substrate; a photoelectric converter that converts incident light into a signal charge, the photoelectric converter being stacked on the semiconductor substrate; a node to which the signal charge is input; a transistor having a source and a drain, one of the source and the drain being connected to the node; and a capacitive element connected between the transistor and a voltage source or a ground. The transistor is configured to switch between a first mode and a second mode, a sensitivity in the first mode being different from a sensitivity in the second mode, and in a cross-sectional view, the capacitive element is located between the semiconductor substrate and the photoelectric converter.
    Type: Application
    Filed: April 21, 2023
    Publication date: August 10, 2023
    Inventors: Masashi MURAKAMI, Kazuko NISHIMURA, Yutaka ABE, Yoshiyuki MATSUNAGA, Yoshihiro SATO, Junji HIRASE
  • Publication number: 20230247320
    Abstract: An imaging device including a semiconductor substrate; pixels; and a signal line located along the pixels, where each of the pixels includes: a photoelectric converter that generates signal charge by photoelectric conversion, a first transistor that outputs a signal to the signal line according to an amount of the signal charge, and a circuit that is coupled to a gate of the first transistor and that includes a capacitive element, and the signal line is located closer to the semiconductor substrate than the capacitive element.
    Type: Application
    Filed: April 5, 2023
    Publication date: August 3, 2023
    Inventors: Yoshihiro SATO, Junji HIRASE
  • Patent number: 11670652
    Abstract: An imaging device including: a photoelectric converter that converts incident light into a signal charge; a node to which the signal charge is input; a transistor having a source and a drain, one of the source and the drain being connected to the node; and a capacitive element. The capacitive element including a first electrode, a second electrode and a dielectric film sandwiched between the first electrode and the second electrode, the first electrode being connected to the other of the source and the drain of the transistor, the second electrode being connected to a voltage source or a ground. The transistor is configured to switch a first mode and a second mode, a sensitivity in the first mode being different from a sensitivity in the second mode.
    Type: Grant
    Filed: April 4, 2022
    Date of Patent: June 6, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Masashi Murakami, Kazuko Nishimura, Yutaka Abe, Yoshiyuki Matsunaga, Yoshihiro Sato, Junji Hirase
  • Publication number: 20230154944
    Abstract: An imaging device including a pixel including: a photoelectric converter including a first electrode, a second electrode, and a photoelectric conversion film between the first electrode and the second electrode, the photoelectric conversion film converting light into a charge; a first transistor having a first source, drain and gate, the first gate connected to the first electrode; and a second transistor having a second source and drain, one of the second source and the second drain connected to the first electrode and being a charge accumulation region that accumulates the charge. The imaging device further including a first voltage supply circuit supplying a first voltage to the second electrode, where the second transistor has a characteristic that when a voltage of the charge accumulation region is equal to or greater than a clipping voltage, the second transistor is turned off, and the clipping voltage is lower than the first voltage.
    Type: Application
    Filed: January 12, 2023
    Publication date: May 18, 2023
    Inventors: Junji HIRASE, Masashi MURAKAMI
  • Patent number: 11653116
    Abstract: An imaging device including: a semiconductor substrate; pixels arranged in a first direction; and a signal line that extends in the first direction. Each of the pixels includes: a photoelectric converter that generates signal charge by photoelectric conversion, a region into which the signal charge is input, a first transistor that outputs a signal to the signal line according to an amount of the signal charge input into the region, and a capacity circuit that is coupled to a gate of the first transistor and that includes a first capacitive element, the first capacitive element including a first electrode, a second electrode and a first insulating layer between the first electrode and the second electrode, at least one of the first electrode and the second electrode containing a metal. Further, the signal line is located closer to the semiconductor substrate than the first capacitive element is.
    Type: Grant
    Filed: December 1, 2021
    Date of Patent: May 16, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Yoshihiro Sato, Junji Hirase
  • Patent number: 11631707
    Abstract: An imaging device including: a photoelectric converter that generates a signal charge by photoelectric conversion of light; a semiconductor substrate; a charge accumulation region that is an impurity region of a first conductivity type in the semiconductor substrate, the charge accumulation region being configured to receive the signal charge; a first transistor that includes, as a source or a drain, a first impurity region of the first conductivity type in the semiconductor substrate; and a blocking structure that is located between the charge accumulation region and the first transistor. The blocking structure includes a second impurity region of a second conductivity type in the semiconductor substrate, the second conductivity type being different from the first conductivity type, and a first electrode that is located above the semiconductor substrate, the first electrode being configured to be applied with a first voltage.
    Type: Grant
    Filed: December 9, 2020
    Date of Patent: April 18, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Yoshihiro Sato, Junji Hirase
  • Patent number: 11532653
    Abstract: An imaging device, including a photoelectric converter that generates a signal charge by photoelectric conversion of light; and a semiconductor substrate. The semiconductor substrate includes: a charge accumulation region that is an impurity region of a first conductivity type, and configured to accumulate the signal charge; a first impurity region of the first conductivity type, the first impurity region being one of a source or a drain of a first transistor and adjacent to the charge accumulation region; and a blocking structure located between the charge accumulation region and the first impurity region. The blocking structure includes a second impurity region of a second conductivity type different from the first conductivity type, a part of the second impurity region located on a surface of the semiconductor substrate, and the second impurity region is not in contact with the first impurity region on the surface of the semiconductor substrate.
    Type: Grant
    Filed: November 3, 2021
    Date of Patent: December 20, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Junji Hirase, Yoshinori Takami, Yoshihiro Sato
  • Publication number: 20220320161
    Abstract: An imaging device including: a photoelectric converter that converts incident light into a signal charge; a node to which the signal charge is input; a transistor having a source and a drain, one of the source and the drain being connected to the node; and a capacitive element. The capacitive element including a first electrode, a second electrode and a dielectric film sandwiched between the first electrode and the second electrode, the first electrode being connected to the other of the source and the drain of the transistor, the second electrode being connected to a voltage source or a ground. The transistor is configured to switch a first mode and a second mode, a sensitivity in the first mode being different from a sensitivity in the second mode.
    Type: Application
    Filed: April 4, 2022
    Publication date: October 6, 2022
    Inventors: Masashi MURAKAMI, Kazuko NISHIMURA, Yutaka ABE, Yoshiyuki MATSUNAGA, Yoshihiro SATO, Junji HIRASE
  • Publication number: 20220310673
    Abstract: An imaging device having a semiconductor substrate including: a semiconductor region including an impurity of a first conductivity type, a first diffusion region that is in contact with the semiconductor region, that includes an impurity of a second conductivity type different from the first conductivity type, and that converts incident light into charges, and a second diffusion region that includes an impurity of the second conductivity type and that directly accumulates at least a part of the charges generated in the first diffusion region. The imaging device further includes a contact plug in contact with the second diffusion region, and a capacitive element electrically connected to the second diffusion region through the contact plug.
    Type: Application
    Filed: June 13, 2022
    Publication date: September 29, 2022
    Inventors: JUNJI HIRASE, YOSHIHIRO SATO, YASUYUKI ENDOH, HIROYUKI AMIKAWA
  • Patent number: 11393858
    Abstract: An imaging device includes a semiconductor substrate including a semiconductor region including an impurity of a first conductivity type, a first diffusion region that is in contact with the semiconductor region, that includes an impurity of a second conductivity type, and that converts incident light into charges, and a second diffusion region that includes an impurity of the second conductivity type and that accumulates at least a part of the charges flowing from the first diffusion region, a first transistor that includes a first gate electrode and that includes the second diffusion region as one of a source and a drain, a contact plug electrically connected to the second diffusion region, a capacitive element one end of which is electrically connected to the contact plug, and a second transistor that includes a second gate electrode, the second gate electrode being electrically connected to the one end of the capacitive element.
    Type: Grant
    Filed: May 20, 2020
    Date of Patent: July 19, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Junji Hirase, Yoshihiro Sato, Yasuyuki Endoh, Hiroyuki Amikawa
  • Publication number: 20220208816
    Abstract: An imaging apparatus comprises a semiconductor substrate, a photoelectric converter, a charge storage region, and an amplification transistor. The photoelectric converter includes a pixel electrode, a counter electrode, and a photoelectric conversion layer. The photoelectric conversion layer is positioned above the semiconductor substrate and is disposed between the pixel electrode and the counter electrode. Charge generated by the photoelectric converter is stored in the charge storage region. The amplification transistor includes a source, a drain, and a gate electrode. The gate electrode is electrically connected to the charge storage region. In a plan view, the width of the drain of the amplification transistor is less than the width of the source of the amplification transistor.
    Type: Application
    Filed: March 15, 2022
    Publication date: June 30, 2022
    Inventors: Junji HIRASE, Masaaki YANAGIDA, Kazuko NISHIMURA, Yoshinori TAKAMI
  • Patent number: 11329079
    Abstract: An imaging device including a semiconductor substrate; a photoelectric converter stacked on the semiconductor substrate, the photoelectric converter being configured to generate a signal through photoelectric conversion of incident light; a multilayer wiring structure located between the semiconductor substrate and the photoelectric converter; and circuitry located in the multilayer wiring structure and the semiconductor substrate, the circuitry being configured to detect the signal. The circuitry includes a first capacitance element and a second capacitance element; and a first transistor including a first source and a first drain in the semiconductor substrate and a first gate.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: May 10, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Masashi Murakami, Kazuko Nishimura, Yutaka Abe, Yoshiyuki Matsunaga, Yoshihiro Sato, Junji Hirase
  • Publication number: 20220094868
    Abstract: An imaging device including: a semiconductor substrate; pixels arranged in a first direction; and a signal line that extends in the first direction. Each of the pixels includes: a photoelectric converter that generates signal charge by photoelectric conversion, a region into which the signal charge is input, a first transistor that outputs a signal to the signal line according to an amount of the signal charge input into the region, and a capacity circuit that is coupled to a gate of the first transistor and that includes a first capacitive element, the first capacitive element including a first electrode, a second electrode and a first insulating layer between the first electrode and the second electrode, at least one of the first electrode and the second electrode containing a metal. Further, the signal line is located closer to the semiconductor substrate than the first capacitive element is.
    Type: Application
    Filed: December 1, 2021
    Publication date: March 24, 2022
    Inventors: Yoshihiro SATO, Junji HIRASE
  • Publication number: 20220059584
    Abstract: An imaging device, including a photoelectric converter that generates a signal charge by photoelectric conversion of light; and a semiconductor substrate. The semiconductor substrate includes: a charge accumulation region that is an impurity region of a first conductivity type, and configured to accumulate the signal charge; a first impurity region of the first conductivity type, the first impurity region being one of a source or a drain of a first transistor and adjacent to the charge accumulation region; and a blocking structure located between the charge accumulation region and the first impurity region. The blocking structure includes a second impurity region of a second conductivity type different from the first conductivity type, a part of the second impurity region located on a surface of the semiconductor substrate, and the second impurity region is not in contact with the first impurity region on the surface of the semiconductor substrate.
    Type: Application
    Filed: November 3, 2021
    Publication date: February 24, 2022
    Inventors: Junji HIRASE, Yoshinori TAKAMI, Yoshihiro SATO
  • Patent number: 11251216
    Abstract: An imaging device includes: a semiconductor layer including a first region of a first conductivity, a second region of a second conductivity opposite to the first conductivity, and a third region of the second conductivity; a photoelectric converter electrically connected to the first region and converting light into charge; a first transistor including a first source, a first drain, and a first gate above the second region, the first region corresponding to the first source or drain; and a second transistor including a second source, a second drain, and a second gate of the second conductivity above the third region, the first region corresponding to the second source or drain, and the second gate being electrically connected to the first region. The concentration of an impurity of the second conductivity in the third region is higher than that of an impurity of the second conductivity in the second region.
    Type: Grant
    Filed: August 8, 2019
    Date of Patent: February 15, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Junji Hirase, Yoshinori Takami, Yoshihiro Sato
  • Patent number: 11223786
    Abstract: An imaging device includes first and second pixels, arranged in a first direction, each of which includes: a photoelectric converter converting incident light into signal charge; an impurity region, in a semiconductor substrate, coupled to the photoelectric converter; a first transistor having a first gate coupled to the impurity region, and first source and drain; and a second transistor having second gate, source and drain. One of the second source and the second drain is the impurity region, and another is coupled to the first source or the first drain. The imaging device further includes a signal line, coupled to the first source or the first drain, and extends along the first direction and overlaps with both of the first and second pixels. The signal line is located on an opposite side from the impurity region across a center line of the first pixel.
    Type: Grant
    Filed: January 9, 2019
    Date of Patent: January 11, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Yoshihiro Sato, Junji Hirase
  • Patent number: 11195865
    Abstract: An imaging device including: a photoelectric converter that generates a signal charge by photoelectric conversion of light; a semiconductor substrate that includes a first semiconductor layer containing an impurity of a first conductivity type and an impurity of a second conductivity type different from the first conductivity type; and a first transistor that includes, as a source or a drain, a first impurity region of the second conductivity type in the first semiconductor layer. The first semiconductor layer includes: a charge accumulation region that is an impurity region of the second conductivity type, the charge accumulation region being configured to accumulate the signal charge; and a blocking structure that is located between the charge accumulation region and the first transistor, and the blocking structure includes a second impurity region of the second conductivity type.
    Type: Grant
    Filed: February 25, 2020
    Date of Patent: December 7, 2021
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Junji Hirase, Yoshinori Takami, Yoshihiro Sato