Patents by Inventor Karthik Janakiraman
Karthik Janakiraman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11961739Abstract: Embodiments of the present technology include semiconductor processing methods to make boron-and-silicon-containing layers that have a changing atomic ratio of boron-to-silicon. The methods may include flowing a silicon-containing precursor into a substrate processing region of a semiconductor processing chamber, and also flowing a boron-containing precursor and molecular hydrogen (H2) into the substrate processing region of the semiconductor processing chamber. The boron-containing precursor and the H2 may be flowed at a boron-to-hydrogen flow rate ratio. The flow rate of the boron-containing precursor and the H2 may be increased while the boron-to-hydrogen flow rate ratio remains constant during the flow rate increase. The boron-and-silicon-containing layer may be deposited on a substrate, and may be characterized by a continuously increasing ratio of boron-to-silicon from a first surface in contact with the substrate to a second surface of the boron-and-silicon-containing layer furthest from the substrate.Type: GrantFiled: October 5, 2020Date of Patent: April 16, 2024Assignee: Applied Materials, Inc.Inventors: Yi Yang, Krishna Nittala, Rui Cheng, Karthik Janakiraman, Diwakar Kedlaya, Zubin Huang, Aykut Aydin
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Patent number: 11939675Abstract: In one aspect, an apparatus includes a chamber body, a blocker plate for delivering process gases into a gas mixing volume, and a face plate having holes through which the mixed gas is distributed to a substrate. In another aspect, the face plate may include a first region with a recess relative to a second region. In another aspect, the blocker plate may include a plurality of regions, each region having different hole patterns/geometries and/or flow profiles. In another aspect, the apparatus may include a radiation shield disposed below a bottom of the substrate support. A shaft or stem of the substrate support includes holes at an upper end thereof near the substrate support.Type: GrantFiled: August 10, 2018Date of Patent: March 26, 2024Assignee: Applied Materials, Inc.Inventors: Rui Cheng, Karthik Janakiraman, Zubin Huang
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Patent number: 11939674Abstract: Exemplary deposition methods may include delivering a silicon-containing precursor and a boron-containing precursor to a processing region of a semiconductor processing chamber. The methods may include providing a hydrogen-containing precursor with the silicon-containing precursor and the boron-containing precursor. A flow rate ratio of the hydrogen-containing precursor to either of the silicon-containing precursor or the boron-containing precursor is greater than or about 1:1. The methods may include forming a plasma of all precursors within the processing region of a semiconductor processing chamber. The methods may include depositing a silicon-and-boron material on a substrate disposed within the processing region of the semiconductor processing chamber.Type: GrantFiled: March 2, 2023Date of Patent: March 26, 2024Assignee: Applied Materials, Inc.Inventors: Yi Yang, Krishna Nittala, Karthik Janakiraman, Aykut Aydin, Diwakar Kedlaya
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Publication number: 20240035195Abstract: Embodiments of the present disclosure generally relate to methods, systems, and apparatus for forming layers having single crystalline structures. In one implementation, a method of processing substrates includes positioning a substrate in a processing volume of a chamber, and heating the substrate to a substrate temperature that is 800 degrees Celsius or less. The method includes maintaining the processing volume at a pressure within a range of 1.0 Torr to 8.0 Torr, and flowing one or more silicon-containing gases and one or more diluent gases into the processing volume. The method includes reacting the one or more silicon-containing gases to form one or more reactants, and depositing the one or more reactants onto an exposed surface of the substrate to form one or more silicon-containing layers on the exposed surface. The one or more silicon-containing layers each having a single crystalline structure.Type: ApplicationFiled: July 25, 2023Publication date: February 1, 2024Inventors: Qinghua ZHAO, Rui CHENG, Dimitrios PAVLOPOULOS, Karthik JANAKIRAMAN
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Publication number: 20240038833Abstract: Memory devices and methods of forming memory devices are described. Methods of forming electronic devices are described where carbon is used as the removable mold material for the formation of a DRAM capacitor. A dense, high-temperature (500° C. or greater) PECVD carbon material is used as the removable mold material, e.g., the core material, instead of oxide. The carbon material can be removed by isotropic etching with exposure to radicals of oxygen (O2), nitrogen (N2), hydrogen (H2), ammonia (NH3), and combinations thereof.Type: ApplicationFiled: July 14, 2023Publication date: February 1, 2024Applicant: Applied Materials, Inc.Inventors: Fredrick Fishburn, Tomohiko Kitajima, Qian Fu, Srinivas Guggilla, Hang Yu, Jun Feng, Shih Chung Chen, Lakmal C. Kalutarage, Jayden Potter, Karthik Janakiraman, Deenesh Padhi, Yifeng Zhou, Yufeng Jiang, Sung-Kwan Kang
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Patent number: 11827514Abstract: Deposition methods may prevent or reduce crystallization of silicon in a deposited amorphous silicon film that may occur after annealing at high temperatures. The crystallization of silicon may be prevented by doping the silicon with an element. The element may be boron, carbon, or phosphorous. Doping above a certain concentration for the element prevents substantial crystallization at high temperatures and for durations at or greater than 30 minutes. Methods and devices are described.Type: GrantFiled: October 27, 2020Date of Patent: November 28, 2023Assignee: Applied Materials, Inc.Inventors: Aykut Aydin, Krishna Nittala, Karthik Janakiraman, Yi Yang, Gautam K. Hemani
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Patent number: 11830706Abstract: Embodiments of the present disclosure generally relate to a pedestal for increasing temperature uniformity in a substrate supported thereon. The pedestal comprises a body having a heater embedded therein. The body comprises a patterned surface that includes a first region having a first plurality of posts extending from a base surface of the body at a first height, and a second region surrounding the central region having a second plurality of posts extending from the base surface at a second height that is greater than the first height, wherein an upper surface of each of the first plurality of posts and the second plurality of posts are substantially coplanar and define a substrate receiving surface.Type: GrantFiled: December 4, 2019Date of Patent: November 28, 2023Assignee: Applied Materials, Inc.Inventors: Venkata Sharat Chandra Parimi, Zubin Huang, Jian Li, Satish Radhakrishnan, Rui Cheng, Diwakar N. Kedlaya, Juan Carlos Rocha-Alvarez, Umesh M. Kelkar, Karthik Janakiraman, Sarah Michelle Bobek, Prashant Kumar Kulshreshtha, Vinay K. Prabhakar, Byung Seok Kwon
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Patent number: 11817320Abstract: Implementations described herein generally relate to a method for forming a metal layer and to a method for forming an oxide layer on the metal layer. In one implementation, the metal layer is formed on a seed layer, and the seed layer helps the metal in the metal layer nucleate with small grain size without affecting the conductivity of the metal layer. The metal layer may be formed using plasma enhanced chemical vapor deposition (PECVD) and nitrogen gas may be flowed into the processing chamber along with the precursor gases. In another implementation, a barrier layer is formed on the metal layer in order to prevent the metal layer from being oxidized during subsequent oxide layer deposition process. In another implementation, the metal layer is treated prior to the deposition of the oxide layer in order to prevent the metal layer from being oxidized.Type: GrantFiled: August 29, 2019Date of Patent: November 14, 2023Assignee: Applied Materials, Inc.Inventors: Susmit Singha Roy, Kelvin Chan, Hien Minh Le, Sanjay Kamath, Abhijit Basu Mallick, Srinivas Gandikota, Karthik Janakiraman
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Patent number: 11798820Abstract: A system may include a main line for delivering a first gas, and a sensor for measuring a concentration of a precursor in the first gas delivered through the main line. The system may further include first and second sublines for providing fluid access to first and second processing chambers, respectively. The first subline may include a first flow controller for controlling the first gas flowed through the first subline. The second subline may include a second flow controller for controlling the first gas flowed through the second subline. A delivery controller may be configured to control the first and second flow controllers based on the measured concentration of the precursor to deliver a first mixture of the first gas and a second gas and a second mixture of the first and second gases into the first and second semiconductor processing chambers, respectively.Type: GrantFiled: November 11, 2020Date of Patent: October 24, 2023Assignee: Applied Materials, Inc.Inventors: Diwakar Kedlaya, Fang Ruan, Zubin Huang, Ganesh Balasubramanian, Kaushik Alayavalli, Martin Seamons, Kwangduk Lee, Rajaram Narayanan, Karthik Janakiraman
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Publication number: 20230335402Abstract: A method of processing a substrate is provided including flowing a deposition gas comprising a hydrocarbon compound and a dopant compound into a process volume having a substrate disposed positioned on a substrate support. The process volume is maintained at a pressure of about 0.5 mTorr to about 10 mTorr. The method includes generating a plasma at the substrate by applying a first RF bias to the substrate support to deposit a doped diamond-like carbon film on the substrate. The doped diamond-like carbon film includes about 5 at. % to about 25 at. % of dopant and a first stress property. The method includes annealing the doped diamond-like carbon film at about 220° C. to about 450° C. to form an annealed film. The annealed film includes a second stress property. The second stress property having an absolute value less than or within 10% the first stress property.Type: ApplicationFiled: April 15, 2022Publication date: October 19, 2023Inventors: Eswaranand Venkatasubramanian, Rajaram Narayanan, Pramit Manna, Abhijit B. Mallick, Karthik Janakiraman, Jialiang Wang
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Patent number: 11791136Abstract: In one embodiment, at least a processing chamber includes a perforated lid, a gas blocker disposed on the perforated lid, and a substrate support disposed below the perforated lid. The gas blocker includes a gas manifold, a central gas channel formed in the gas manifold, a first gas distribution plate comprising an inner and outer trenches surrounding the central gas channel, a first and second gas channels formed in the gas manifold, the first gas channel is in fluid communication with a first gas source and the inner trench, and the second gas channel is in fluid communication with the first gas source and the outer trench, a second gas distribution plate, a third gas distribution plate disposed below the second gas distribution plate, and a plurality of pass-through channels disposed between the second gas distribution plate and the third gas distribution plate.Type: GrantFiled: April 26, 2021Date of Patent: October 17, 2023Assignee: Applied Materials, Inc.Inventors: Sanjeev Baluja, Yi Yang, Truong Nguyen, Nattaworn Boss Nunta, Joseph F. Aubuchon, Tuan Anh Nguyen, Karthik Janakiraman
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Publication number: 20230317463Abstract: Aspects generally relate to methods, systems, and apparatus for processing substrates using one or more amorphous carbon hardmask layers. In one aspect, film stress is altered while facilitating enhanced etch selectivity. In one implementation, a method of processing a substrate includes depositing one or more amorphous carbon hardmask layers onto the substrate, and conducting a rapid thermal anneal operation on the substrate after depositing the one or more amorphous carbon hardmask layers. The rapid thermal anneal operation lasts for an anneal time that is 60 seconds or less. The rapid thermal anneal operation includes heating the substrate to an anneal temperature that is within a range of 600 degrees Celsius to 1,000 degrees Celsius. The method includes etching the substrate after conducting the rapid thermal anneal operation.Type: ApplicationFiled: June 5, 2023Publication date: October 5, 2023Inventors: Krishna NITTALA, Sarah Michelle BOBEK, Kwangduk Douglas LEE, Ratsamee LIMDULPAIBOON, Dimitri KIOUSSIS, Karthik JANAKIRAMAN
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Publication number: 20230309300Abstract: Exemplary semiconductor processing methods may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. Alternating layers of material may be formed on the substrate. One or more recesses may be formed in the alternating layers of material. The methods may include forming a first silicon-containing material. The first silicon-containing material may extend into the one or more recesses formed in the alternating layers of material. The methods may include providing a halogen-containing precursor to the processing region of the semiconductor processing chamber. The methods may include forming a silicon-and-halogen-containing material. The silicon-and-halogen-containing material may overly the first silicon-containing material. The methods may include forming a second silicon-containing material.Type: ApplicationFiled: March 25, 2022Publication date: September 28, 2023Applicant: Applied Materials, Inc.Inventors: Dimitrios Pavlopoulos, Rui Cheng, Qinghua Zhao, Karthik Janakiraman
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Publication number: 20230298892Abstract: Exemplary methods of semiconductor processing may include forming a layer of amorphous silicon on a semiconductor substrate. The layer of amorphous silicon may be characterized by a first amount of hydrogen incorporation. The methods may include performing a beamline ion implantation process or plasma doping process on the layer of amorphous silicon. The methods may include removing hydrogen from the layer of amorphous silicon to a second amount of hydrogen incorporation less than the first amount of hydrogen incorporation.Type: ApplicationFiled: July 21, 2021Publication date: September 21, 2023Applicant: Applied Materials, Inc.Inventors: Rui Cheng, Rajesh Prasad, Karthik Janakiraman, Gautam K. Hemani, Krishna Nittala, Shan Tang, Qi Gao
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Patent number: 11699577Abstract: Exemplary methods of treating a chamber may include delivering a cleaning precursor to a remote plasma unit. The methods may include forming a plasma of the cleaning precursor. The methods may include delivering plasma effluents of the cleaning precursor to a processing region of a semiconductor processing chamber. The processing region may be defined by one or more chamber components. The one or more chamber components may include an oxide coating. The methods may include halting delivery of the plasma effluents. The methods may include treating the oxide coating with a hydrogen-containing material delivered to the processing region subsequent halting delivery of the plasma effluents.Type: GrantFiled: May 25, 2021Date of Patent: July 11, 2023Assignee: Applied Materials, Inc.Inventors: Sarah Michelle Bobek, Ruiyun Huang, Abdul Aziz Khaja, Amit Bansal, Dong Hyung Lee, Ganesh Balasubramanian, Tuan Anh Nguyen, Sungwon Ha, Anjana M. Patel, Ratsamee Limdulpaiboon, Karthik Janakiraman, Kwangduk Douglas Lee
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Patent number: 11699585Abstract: Embodiments of the present disclosure generally relate to methods of forming hardmasks. Embodiments described herein enable, e.g., formation of carbon-containing hardmasks having reduced film stress. In an embodiment, a method of processing a substrate is provided. The method includes positioning a substrate in a processing volume of a processing chamber and depositing a diamond-like carbon (DLC) layer on the substrate. After depositing the DLC layer, the film stress is reduced by performing a plasma treatment, wherein the plasma treatment comprises applying a radio frequency (RF) bias power of about 100 W to about 10,000 W.Type: GrantFiled: October 21, 2020Date of Patent: July 11, 2023Assignee: APPLIED MATERIALS, INC.Inventors: Jui-Yuan Hsu, Pramit Manna, Bhaskar Kumar, Karthik Janakiraman
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Patent number: 11694902Abstract: Aspects generally relate to methods, systems, and apparatus for processing substrates using one or more amorphous carbon hardmask layers. In one aspect, film stress is altered while facilitating enhanced etch selectivity. In one implementation, a method of processing a substrate includes depositing one or more amorphous carbon hardmask layers onto the substrate, and conducting a rapid thermal anneal operation on the substrate after depositing the one or more amorphous carbon hardmask layers. The rapid thermal anneal operation lasts for an anneal time that is 60 seconds or less. The rapid thermal anneal operation includes heating the substrate to an anneal temperature that is within a range of 600 degrees Celsius to 1,000 degrees Celsius. The method includes etching the substrate after conducting the rapid thermal anneal operation.Type: GrantFiled: February 18, 2021Date of Patent: July 4, 2023Assignee: Applied Materials, Inc.Inventors: Krishna Nittala, Sarah Michelle Bobek, Kwangduk Douglas Lee, Ratsamee Limdulpaiboon, Dimitri Kioussis, Karthik Janakiraman
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Publication number: 20230203652Abstract: Exemplary deposition methods may include delivering a silicon-containing precursor and a boron-containing precursor to a processing region of a semiconductor processing chamber. The methods may include providing a hydrogen-containing precursor with the silicon-containing precursor and the boron-containing precursor. A flow rate ratio of the hydrogen-containing precursor to either of the silicon-containing precursor or the boron-containing precursor is greater than or about 1:1. The methods may include forming a plasma of all precursors within the processing region of a semiconductor processing chamber. The methods may include depositing a silicon-and-boron material on a substrate disposed within the processing region of the semiconductor processing chamber.Type: ApplicationFiled: March 2, 2023Publication date: June 29, 2023Applicant: Applied Materials, Inc.Inventors: Yi Yang, Krishna Nittala, Karthik Janakiraman, Aykut Aydin, Diwakar Kedlaya
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Patent number: 11676813Abstract: Exemplary deposition methods may include delivering a silicon-containing precursor and a boron-containing precursor to a processing region of a semiconductor processing chamber. The methods may include delivering a dopant-containing precursor with the silicon-containing precursor and the boron-containing precursor. The dopant-containing precursor may include one or more of carbon, nitrogen, oxygen, or sulfur. The methods may include forming a plasma of all precursors within the processing region of the semiconductor processing chamber. The methods may include depositing a silicon-and-boron material on a substrate disposed within the processing region of the semiconductor processing chamber. The silicon-and-boron material may include greater than or about 1 at. % of a dopant from the dopant-containing precursor.Type: GrantFiled: September 18, 2020Date of Patent: June 13, 2023Assignee: Applied Materials, Inc.Inventors: Aykut Aydin, Rui Cheng, Yi Yang, Krishna Nittala, Karthik Janakiraman, Bo Qi, Abhijit Basu Mallick
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Patent number: 11664226Abstract: Embodiments of the present disclosure generally relate to the fabrication of integrated circuits. More particularly, the embodiments described herein provide methods for producing reduced-stress diamond-like carbon films for patterning applications. In one or more embodiments, a method includes flowing a deposition gas containing a hydrocarbon compound into a processing volume of a process chamber having a substrate positioned on an electrostatic chuck and generating a plasma above the substrate in the processing volume by applying a first RF bias to the electrostatic chuck to deposit a stressed diamond-like carbon film on the substrate. The stressed diamond-like carbon film has a compressive stress of ?500 MPa or greater. The method further includes heating the stressed diamond-like carbon film to produce a reduced-stress diamond-like carbon film during a thermal annealing process. The reduced-stress diamond-like carbon film has a compressive stress of less than ?500 MPa.Type: GrantFiled: September 28, 2020Date of Patent: May 30, 2023Assignee: APPLIED MATERIALS, INC.Inventors: Jui-Yuan Hsu, Pramit Manna, Karthik Janakiraman