Abstract: Embodiments of the present disclosure generally relate to hardmasks and to processes for forming hardmasks by plasma-enhanced chemical vapor deposition (PECVD). In an embodiment, a process for forming a hardmask layer on a substrate is provided. The process includes introducing a substrate to a processing volume of a PECVD chamber, the substrate on a substrate support, the substrate support comprising an electrostatic chuck, and flowing a process gas into the processing volume within the PECVD chamber, the process gas comprising a carbon-containing gas. The process further includes forming, under plasma conditions, an energized process gas from the process gas in the processing volume, electrostatically chucking the substrate to the substrate support, depositing a first carbon-containing layer on the substrate while electrostatically chucking the substrate, and forming the hardmask layer by depositing a second carbon-containing layer on the substrate.

Abstract: Aspects generally relate to methods, systems, and apparatus for processing substrates using one or more amorphous carbon hardmask layers. In one aspect, film stress is altered while facilitating enhanced etch selectivity. In one implementation, a method of processing a substrate includes depositing one or more amorphous carbon hardmask layers onto the substrate, and conducting a rapid thermal anneal operation on the substrate after depositing the one or more amorphous carbon hardmask layers. The rapid thermal anneal operation lasts for an anneal time that is 60 seconds or less. The rapid thermal anneal operation includes heating the substrate to an anneal temperature that is within a range of 600 degrees Celsius to 1,000 degrees Celsius. The method includes etching the substrate after conducting the rapid thermal anneal operation.

Abstract: Methods for gap filling features of a substrate surface are described. Each of the features extends a distance into the substrate from the substrate surface and have a bottom and at least one sidewall. The methods include depositing a non-conformal film in the feature of the substrate surface with a plurality of high-frequency ratio-frequency (HFRF) pulses. The non-conformal film has a greater thickness on the bottom of the features than on the at least one sidewall. The deposited film is substantially etched from the sidewalls of the feature. The deposition and etch processes are repeated to fill the features.

Abstract: Exemplary deposition methods may include flowing a silicon-containing precursor into a processing region of a semiconductor processing chamber. The method may include striking a plasma in the processing region between a faceplate and a pedestal of the semiconductor processing chamber. The pedestal may support a substrate including a patterned photoresist. The method may include maintaining a temperature of the substrate less than or about 200° C. The method may also include depositing a silicon-containing film along the patterned photoresist.

Abstract: Exemplary semiconductor processing systems include a processing chamber defining a processing region. The semiconductor processing systems may include a foreline coupled with the processing chamber. The foreline may define a fluid conduit. The semiconductor processing systems may include a foreline trap coupled with a distal end of the foreline. The semiconductor processing systems may include a removable insert provided within an interior of the foreline trap. The semiconductor processing systems may include a throttle valve coupled with the foreline trap downstream of the removable insert.

Abstract: Methods of conformally doping three dimensional structures are discussed. Some embodiments utilize conformal silicon films deposited on the structures. The silicon films are doped after deposition to comprise halogen atoms. The structures are then annealed to dope the structures with halogen atoms from the doped silicon films.

Abstract: The present disclosure provides forming nanostructures utilizing multiple patterning process with good profile control and feature transfer integrity. In one embodiment, a method for forming features on a substrate includes forming a mandrel layer on a substrate, conformally forming a spacer layer on the mandrel layer, wherein the spacer layer is a doped silicon material, and patterning the spacer layer. In another embodiment, a method for forming features on a substrate includes conformally forming a spacer layer on a mandrel layer on a substrate, wherein the spacer layer is a doped silicon material, selectively removing a portion of the spacer layer using a first gas mixture, and selectively removing the mandrel layer using a second gas mixture different from the first gas mixture.

Abstract: Embodiments of the present disclosure generally relate to methods of forming hardmasks. Embodiments described herein enable, e.g., formation of carbon-containing hardmasks having reduced film stress. In an embodiment, a method of processing a substrate is provided. The method includes positioning a substrate in a processing volume of a processing chamber and depositing a diamond-like carbon (DLC) layer on the substrate. After depositing the DLC layer, the film stress is reduced by performing a plasma treatment, wherein the plasma treatment comprises applying a radio frequency (RF) bias power of about 100 W to about 10,000 W.

Abstract: Embodiments of the present disclosure generally relate to hardmasks and to processes for forming hardmasks by plasma-enhanced chemical vapor deposition (PECVD). In an embodiment, a process for forming a hardmask layer on a substrate is provided. The process includes introducing a substrate to a processing volume of a PECVD chamber, the substrate on a substrate support, the substrate support comprising an electrostatic chuck, and flowing a process gas into the processing volume within the PECVD chamber, the process gas comprising a carbon-containing gas. The process further includes forming, under plasma conditions, an energized process gas from the process gas in the processing volume, electrostatically chucking the substrate to the substrate support, depositing a first carbon-containing layer on the substrate while electrostatically chucking the substrate, and forming the hardmask layer by depositing a second carbon-containing layer on the substrate.

Abstract: Embodiments of the present technology include semiconductor processing methods to make boron-and-silicon-containing layers that have a changing atomic ratio of boron-to-silicon. The methods may include flowing a silicon-containing precursor into a substrate processing region of a semiconductor processing chamber, and also flowing a boron-containing precursor and molecular hydrogen (H2) into the substrate processing region of the semiconductor processing chamber. The boron-containing precursor and the H2 may be flowed at a boron-to-hydrogen flow rate ratio. The flow rate of the boron-containing precursor and the H2 may be increased while the boron-to-hydrogen flow rate ratio remains constant during the flow rate increase. The boron-and-silicon-containing layer may be deposited on a substrate, and may be characterized by a continuously increasing ratio of boron-to-silicon from a first surface in contact with the substrate to a second surface of the boron-and-silicon-containing layer furthest from the substrate.

Abstract: Exemplary semiconductor processing systems may include a chamber body comprising sidewalls and a base. The systems may include a substrate support extending through the base of the chamber body. The substrate support may include a support plate defining a plurality of channels through an interior of the support plate. Each channel of the plurality of channels may include a radial portion extending outward from a central channel through the support plate. Each channel may also include a vertical portion formed at an exterior region of the support plate fluidly coupling the radial portion with a support surface of the support plate. The substrate support may include a shaft coupled with the support plate. The central channel may extend through the shaft. The systems may include a fluid source coupled with the central channel of the substrate support.

Abstract: Exemplary deposition methods may include delivering a silicon-containing precursor and a boron-containing precursor to a processing region of a semiconductor processing chamber. The methods may include delivering a dopant-containing precursor with the silicon-containing precursor and the boron-containing precursor. The dopant-containing precursor may include one or more of carbon, nitrogen, oxygen, or sulfur. The methods may include forming a plasma of all precursors within the processing region of the semiconductor processing chamber. The methods may include depositing a silicon-and-boron material on a substrate disposed within the processing region of the semiconductor processing chamber. The silicon-and-boron material may include greater than or about 1 at. % of a dopant from the dopant-containing precursor.

Abstract: Exemplary semiconductor processing systems include a chamber body having sidewalls and a base. The systems may include a substrate support extending through the base. The substrate support may include a support plate defining lift pin locations and a shaft coupled with the support plate. The systems may include a shield coupled with the shaft and extending below the support plate. The shield may define a central aperture that extends beyond an outer periphery of the shaft. The systems may include a purge baffle coupled with the shield at a position that is beyond the central aperture such that a space between the purge baffle and the shaft is in fluid communication with a space between the shield and the support plate. The purge baffle may extend along at least a portion of the shaft. The systems may include a purge gas source coupled with the purge baffle.

Abstract: Exemplary methods of semiconductor processing may include flowing a silicon-containing precursor into a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region, and the substrate may be maintained at a temperature below or about 450° C. The methods may include striking a plasma of the silicon-containing precursor. The methods may include forming a layer of amorphous silicon on a semiconductor substrate. The layer of amorphous silicon may be characterized by less than or about 3% hydrogen incorporation.

Abstract: Exemplary processing methods may include depositing a boron-containing material or a silicon-and-boron-containing material on a substrate disposed within a processing region of a semiconductor processing chamber. The methods may include etching portions of the boron-containing material or the silicon-and-boron-containing material with a chlorine-containing precursor to form one or more features in the substrate. The methods may also include removing remaining portions of the boron-containing material or the silicon-and-boron-containing material from the substrate with a fluorine-containing precursor.

Abstract: Embodiments of the present disclosure generally relate to the fabrication of integrated circuits. More particularly, the embodiments described herein provide methods for producing reduced-stress diamond-like carbon films for patterning applications. In one or more embodiments, a method includes flowing a deposition gas containing a hydrocarbon compound into a processing volume of a process chamber having a substrate positioned on an electrostatic chuck and generating a plasma above the substrate in the processing volume by applying a first RF bias to the electrostatic chuck to deposit a stressed diamond-like carbon film on the substrate. The stressed diamond-like carbon film has a compressive stress of ?500 MPa or greater. The method further includes heating the stressed diamond-like carbon film to produce a reduced-stress diamond-like carbon film during a thermal annealing process. The reduced-stress diamond-like carbon film has a compressive stress of less than ?500 MPa.

Abstract: Embodiments of the present disclosure generally relate to the fabrication of integrated circuits. More particularly, the embodiments described herein provide techniques for depositing nitrogen-doped diamond-like carbon films for patterning applications. In one or more embodiments, a method for processing a substrate includes flowing a deposition gas containing a hydrocarbon compound and a nitrogen dopant compound into a processing volume of a process chamber having a substrate positioned on an electrostatic chuck, and generating a plasma at or above the substrate by applying a first RF bias to the electrostatic chuck to deposit a nitrogen-doped diamond-like carbon film on the substrate. The nitrogen-doped diamond-like carbon film has a density of greater than 1.5 g/cc and a compressive stress of about ?20 MPa to less than ?600 MPa.

Abstract: Aspects of the disclosure provide a method including depositing an underlayer comprising silicon oxide over a substrate, depositing a polysilicon liner on the underlayer, and depositing an amorphous silicon layer on the polysilicon liner. Aspects of the disclosure provide a device intermediate including a substrate, an underlayer comprising silicon oxide formed over the substrate, a polysilicon liner disposed on the underlayer, and an amorphous silicon layer disposed on the polysilicon liner.

Abstract: Exemplary methods of semiconductor processing may include coupling a fluid conduit within a substrate support in a semiconductor processing chamber to a system foreline. The coupling may vacuum chuck a substrate with the substrate support. The methods may include flowing a gas into the fluid conduit. The methods may include maintaining a pressure between the substrate and the substrate support at a pressure higher than the pressure at the system foreline.

Abstract: In one embodiment, at least a processing chamber includes a perforated lid, a gas blocker disposed on the perforated lid, and a substrate support disposed below the perforated lid. The gas blocker includes a gas manifold, a central gas channel formed in the gas manifold, a first gas distribution plate comprising an inner and outer trenches surrounding the central gas channel, a first and second gas channels formed in the gas manifold, the first gas channel is in fluid communication with a first gas source and the inner trench, and the second gas channel is in fluid communication with the first gas source and the outer trench, a second gas distribution plate, a third gas distribution plate disposed below the second gas distribution plate, and a plurality of pass-through channels disposed between the second gas distribution plate and the third gas distribution plate.