Patents by Inventor Katsuya Okumura

Katsuya Okumura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7435769
    Abstract: A flame-retardant synthetic resin composition characterized by comprising 1-40 parts by weight of at least one type of organic phosphorus compound represented by the following general formula (1): (wherein R1 represents alkyl, aralkyl, etc.) with respect to 100 parts by weight of a synthetic resin.
    Type: Grant
    Filed: March 24, 2004
    Date of Patent: October 14, 2008
    Assignees: Sanko Co., Ltd., Nicca Chemical Co., Ltd.
    Inventors: Daishiro Kishimoto, Toru Makino, Katsuya Okumura, Juji Uchida
  • Publication number: 20080237888
    Abstract: A multichip semiconductor device is disclosed in which chips are stacked each of which comprises a semiconductor substrate formed on top with circuit components and an interlayer insulating film formed on the top of the semiconductor substrate. At least one of the chips has a connect plug of a metal formed in a through hole that passes through the semiconductor substrate and the interlayer insulating film. The chip with the connect plug is electrically connected with another chip by that connect plug.
    Type: Application
    Filed: October 31, 2007
    Publication date: October 2, 2008
    Inventors: Nobuo Hayasaka, Katsuya Okumura, Keiichi Sasaki, Mie Matsuo
  • Patent number: 7387717
    Abstract: A plating method and apparatus for a substrate fills a metal, e.g., copper, into a fine interconnection pattern formed in a semiconductor substrate. The apparatus has a substrate holding portion 36 horizontally holding and rotating a substrate with its surface to be plated facing upward. A seal material 90 contacts a peripheral edge portion of the surface, sealing the portion in a watertight manner. A cathode electrode 88 passes an electric current upon contact with the substrate. A cathode portion 38 rotates integrally with the substrate holding portion 36. An electrode arm portion 30 is above the cathode portion 38 and movable horizontally and vertically and has an anode 98 face-down. Plating liquid is poured into a space between the surface to be plated and the anode 98 brought close to the surface to be plated. Thus, plating treatment and treatments incidental thereto can be performed by a single unit.
    Type: Grant
    Filed: August 1, 2003
    Date of Patent: June 17, 2008
    Assignees: Ebara Corporation, Kabushiki Kaisha Toshiba
    Inventors: Junji Kunisawa, Mitsuko Odagaki, Natsuki Makino, Koji Mishima, Kenji Nakamura, Hiroaki Inoue, Norio Kimura, Tetsuo Matsuda, Hisashi Kaneko, Nobuo Hayasaka, Katsuya Okumura, Manabu Tsujimura, Toshiyuki Morita
  • Patent number: 7383732
    Abstract: Test sound wave is outputted from a speaker. A movable part of a three-axis acceleration sensor, which is a micro structure of a chip to be tested TP, moves due to the arrival of the test sound wave which is compression wave outputted from the speaker, that is, due to air vibrations. A change in the resistance value that changes in accordance with this movement is measured on the basis of an output voltage that is provided via a probe needles. A control part determines the property of the three-axis acceleration sensor on the basis of the measured property values, that is, measured data.
    Type: Grant
    Filed: June 10, 2005
    Date of Patent: June 10, 2008
    Assignees: Octec Inc., Tokyo Electron Limited
    Inventors: Katsuya Okumura, Toshiyuki Matsumoto, Naoki Ikeuchi, Masami Yakabe
  • Publication number: 20080111321
    Abstract: A seal structure in which a sealing member 510 fitted in the seal holding part 120 is elastically deformed to hermetically seal a flow passage joining portion. The seal holding part 120 opening on a flow passage side and including a first retaining surface 121, a second retaining surface 122, and a circumferential surface 123. The sealing member 510 includes a first surface 511 in contact with the first retaining surface 121, a second surface 512 in contact with the retaining surface 122, and an inner surface 513 located inside the seal holding part 510 and tapered to have a diameter becoming smaller from the first surface 511 side to the second surface 512 side. An engagement portion 515 engaged in the seal holding part 120 is formed protruding from an outer surface 514 located on the circumferential surface 123 side and on the first surface 511 side.
    Type: Application
    Filed: March 23, 2005
    Publication date: May 15, 2008
    Applicants: OTEC, INC, CKD CORPPRATION
    Inventors: Katsuya Okumura, Shoichi Kitagawa, Shigenobu Itoh, Kazuhiro Sugata, Kazuhiro Arakawa, Hiroshi Tomita
  • Publication number: 20080090501
    Abstract: A polishing apparatus includes an arrangement of a plurality of units to deal with various operations and a robot having at least one arm. The plurality of units are disposed around the robot and include a loading unit for receiving thereon a, e.g. dry, workpiece to be polished, a polishing system including at least one polishing unit for polishing the workpiece, a washing system and a drying system at least including one washing unit for washing and drying the polished workpiece, and an unloading unit for receiving thereon a resultant clean and dry polished workpiece.
    Type: Application
    Filed: October 31, 2007
    Publication date: April 17, 2008
    Inventors: Katsuya Okumura, Riichirou Aoki, Hiromi Yajima, Seiji Ishikawa, Manabu Tsujimura
  • Publication number: 20080090001
    Abstract: There is disclosed a film forming method comprising continuously discharging a solution adjusted so as to spread over a substrate by a given amount to the substrate through a discharge port disposed in a nozzle, moving the nozzle and substrate with respect to each other, and holding the supplied solution onto the substrate to form a liquid film, wherein a distance h between the discharge port of the nozzle and the substrate is set to be not less than 2 mm and to be in a range less than 5×10?5 q? (mm) given with respect to a surface tension ? (N/m) of the solution, discharge speed q (m/sec) of the solution continuously discharged through the discharge port, and a constant of 5×10?5 (m·sec/N).
    Type: Application
    Filed: December 3, 2007
    Publication date: April 17, 2008
    Inventors: Shinichi Ito, Tatsuhiko Ema, Kei Hayasaki, Rempei Nakata, Nobuhide Yamada, Katsuya Okumura
  • Publication number: 20080089794
    Abstract: An opening 22d of a supply/withdrawal passage 22b is positioned at the center part of the internal wall surface 22c of the operating chamber 26 (concave area 22a), and a pin 24 that protrudes toward the diaphragm 23 is provided in a position that is offset from the center of the wall surface 22c. When the diaphragm 23 is deformed toward the operating chamber 26 by the suction of an operation air into the operating chamber 26 during drawing in the chemical liquid, a part of the diaphragm 23 opposing to the pin 24 rides on the pin 24 and this part becomes a slightly convex shape toward the pump chamber 25. When the operation air is supplied from the opening 22d into the operating chamber 26 during the discharge of the chemical liquid, the deformation begins first from the part of the diaphragm 23 riding on the pin 24.
    Type: Application
    Filed: September 26, 2005
    Publication date: April 17, 2008
    Applicants: OCTEC INC., CKD CORPORATION
    Inventors: Katsuya Okumura, Shigenobu Itoh, Kazuhiro Sugata, Kazuhiro Arakawa
  • Patent number: 7351131
    Abstract: In manufacturing a semiconductor device, a part of an element is formed on the surface of a substrate, and at least a periphery of the substrate is polished using a polishing member stretched around the periphery of the substrate so that a polishing face of the polishing member is slid on a polishing target surface of the periphery.
    Type: Grant
    Filed: July 12, 2005
    Date of Patent: April 1, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenro Nakamura, Naoto Miyashita, Takashi Yoda, Katsuya Okumura
  • Patent number: 7335517
    Abstract: A multichip semiconductor device is disclosed in which chips are stacked each of which comprises a semiconductor substrate formed on top with circuit components and an interlayer insulating film formed on the top of the semiconductor substrate. At least one of the chips has a connect plug of a metal formed in a through hole that passes through the semiconductor substrate and the interlayer insulating film. The chip with the connect plug is electrically connected with another chip by that connect plug.
    Type: Grant
    Filed: July 30, 2004
    Date of Patent: February 26, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobuo Hayasaka, Katsuya Okumura, Keiichi Sasaki, Mie Matsuo
  • Publication number: 20080036479
    Abstract: In accordance with an increase in speed, a wiring structure has rapidly become more microscopic and thinner and a wiring layer has become extremely thin, and therefore, giving a contact load to a probe for the inspection as has been conventionally done causes damage to a wiring layer and an insulation layer because the probe penetrates not only the oxide film but also the wiring layer or because of a concentration stress from the probe. On the other hand, decreasing the contact load causes unstable continuity between the probe and an electrode pad. It is an object of the present invention to surely and stably inspect an object to be inspected by breaking an oxide film with a low stylus pressure.
    Type: Application
    Filed: March 3, 2005
    Publication date: February 14, 2008
    Inventors: Katsuya Okumura, Toshihiro Yonezawa
  • Publication number: 20070297927
    Abstract: An opening 22d of a supply/withdrawal passage 22b is positioned at the center part of the internal wall surface 22c of the operating chamber 26 (concave area 22a), and a cross-shaped venting groove 22e extending from the opening 22d of the passage 22b to the periphery of the wall surface 22c is formed in the wall surface 22c. Thus, an operating air in the chamber 26 is discharged (sucked) through the passage 22b during drawing in the chemical liquid.
    Type: Application
    Filed: July 29, 2005
    Publication date: December 27, 2007
    Applicants: Octec Inc., CKD Corporation
    Inventors: Katsuya Okumura, Shigenobu Itoh, Kazuhiro Sugata, Kazuhiro Arakawa
  • Publication number: 20070295401
    Abstract: The invention has an object to provide a flow path block capable of reducing pressure loss, providing an extremely long flow path and a complex flow path, and achieving weight reduction, and a manufacturing method thereof. A flow path block (1) comprises a block body (11) formed with through holes (21) and a groove (22) communicating with the through holes (21) and a lid member (12) which covers the groove (22). The groove (22) can be formed with any depth and width by a cutting tool to reduce pressure loss. The groove (22) can also be formed in a long shape by the cutting tool, so that a very long flow path can be provided when the groove (22) is covered with the lid member (12). The groove (22) can be made freely by the cutting tool to provide a complex flow path. Further, the thickness of the block body (11) can be reduced to achieve weight reduction.
    Type: Application
    Filed: September 5, 2005
    Publication date: December 27, 2007
    Applicants: CKD COROPORATION, OCTEC, INC.
    Inventors: Katsuya Okumura, Hiroshi Itafuji, Hiroki Doi, Yasunori Nishimura
  • Patent number: 7312018
    Abstract: There is disclosed a film forming method comprising continuously discharging a solution adjusted so as to spread over a substrate by a given amount to the substrate through a discharge port disposed in a nozzle, moving the nozzle and substrate with respect to each other, and holding the supplied solution onto the substrate to form a liquid film, wherein a distance h between the discharge port of the nozzle and the substrate is set to be not less than 2 mm and to be in a range less than 5×10?5 q? (mm) given with respect to a surface tension ? (N/m) of the solution, discharge speed q (m/sec) of the solution continuously discharged through the discharge port, and a constant of 5×10?5 (m·sec/N)
    Type: Grant
    Filed: August 27, 2004
    Date of Patent: December 25, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shinichi Ito, Tatsuhiko Ema, Kei Hayasaki, Rempei Nakata, Nobuhide Yamada, Katsuya Okumura
  • Publication number: 20070275178
    Abstract: A substrate heating apparatus for heating a substrate coated with a film of chemically amplified resist within a period after exposure and before development, having a mounting table to mount the substrate substantially horizontal with the resist-coated film faced up, a fluid supply mechanism for supplying glycerin to the substrate, and a heating mechanism for heating the substrate on a mounting table, in a state that glycerin contacts a resist-coated film, wherein the substrate on a mounting table is heated, in a state that glycerin contacts the resist-coated film.
    Type: Application
    Filed: July 13, 2005
    Publication date: November 29, 2007
    Inventors: Takanori Nishi, Takahiro Kitano, Katsuya Okumura
  • Publication number: 20070267065
    Abstract: A chemical liquid supply system that prevents the generation of heat during operation in a pump and allows downsizing the discharge pump for instilling a chemical liquid from a tip nozzle. Compressed air is supplied to an upper space of a resist bottle and the chemical liquid is conferred positive pressure and sent out to a pump chamber of a discharge pump, thereby the pump chamber is filled with a resist liquid. This eliminates the need of a conventional construction where a spring or others are used to drive a flexible membrane of the discharge pump to the operation chamber side to take in the resist liquid. As a result, no electric motor is used, so there is obviously no risk of heat damage to a semiconductor wafer and the discharge pump itself can be further downsized.
    Type: Application
    Filed: July 29, 2005
    Publication date: November 22, 2007
    Applicants: Octec Inc., Tokyo Electron Limited
    Inventors: Katsuya Okumura, Shibenobu Itoh, Tetsuya Toyoda, Kazuhiro Sugata
  • Publication number: 20070258837
    Abstract: A pump unit for supplying chemical liquids capable of reducing the trapping of air bubbles and chemical liquids inside the chemical liquid passage of the unit while reducing the size by forming the pump and open/close valves in the vicinity of the pump into a single unit. The pump unit 10 is formed by integrally mounting a suction-side passage member 17 with which a suction-side shutoff valve 13 is assembled together and a discharge-side passage member 18 with which a discharge side shutoff valve 14 is assembled together on the pump 11 (pump housings 21, 22). Suction passages 17a and 21b and discharge passages 18a and 21c communicating with a pump chamber 25 are disposed on the same line L1.
    Type: Application
    Filed: July 29, 2005
    Publication date: November 8, 2007
    Inventors: Katsuya Okumura, Kazuhiro Arakawa, Shigenobu Itoh
  • Patent number: 7291057
    Abstract: A method of polishing substrates enables the size of a polishing table to be reduced. A surface of a substrate to be polished is brought into contact with a polishing surface of a polishing table in such a manner that a portion of the surface of the substrate extends outwardly from an outer periphery of the polishing surface. The substrate is rotated about its center axis while keeping its surface in contact with the polishing surface of the polishing table. The attitude of the substrate carrier is controlled so that the surface of the substrate is kept parallel with the polishing surface of the polishing table during a polishing operation.
    Type: Grant
    Filed: June 24, 2003
    Date of Patent: November 6, 2007
    Assignees: Ebara Corporation, Kabushiki Kaisha Toshiba
    Inventors: Norio Kimura, Yu Ishii, Hirokuni Hiyama, Katsuya Okumura, Hiroyuki Yano
  • Publication number: 20070181928
    Abstract: A capacitor having a high quality and a manufacturing method of the same are provided. A capacitor has a lower electrode formed on an oxide film, a dielectric layer formed on the lower electrode, an upper electrode formed so as to face the lower electrode with the dielectric layer between, and an upper electrode formed so as to cover the upper electrode, an opening portion of the upper electrode and an opening portion of the dielectric layer. By forming the upper electrode on the dielectric layer, it is possible to pattern the dielectric layer by using the upper electrode as a mask, and provide a capacitor having a high-quality dielectric layer by preventing impurity diffusion into the dielectric layer. By forming the upper electrode on the dielectric layer, it is possible to prevent the dielectric layer from being exposed to etching liquid, liquid developer, etc.
    Type: Application
    Filed: August 23, 2006
    Publication date: August 9, 2007
    Inventors: Yoshiki Yamanishi, Muneo Harada, Takahiro Kitano, Tatsuzo Kawaguchi, Yoshihiro Hirota, Kinji Yamada, Tomotaka Shinoda, Katsuya Okumura, Shuichi Kawano
  • Publication number: 20070181556
    Abstract: Atmosphere in processing apparatus is adjusted to, for example, oxygen atmosphere, by gas supply source and the like. Interior of thermal processing apparatus is set to oxygen atmosphere and raised to predetermined temperature. A wafer boat containing wafer W having dielectric precursor layer formed is loaded into thermal processing apparatus at speed at which no defects are produced in wafer W. Thereafter, reaction tube of thermal processing apparatus has its internal temperature raised to baking temperature, to perform baking for predetermined time. The wafer W is cooled to predetermined temperature in thermal processing apparatus and then to room temperature in processing apparatus, and carried out from processing apparatus.
    Type: Application
    Filed: August 23, 2006
    Publication date: August 9, 2007
    Inventors: Yoshiki Yamanishi, Muneo Harada, Takahiro Kitano, Tatsuzo Kawaguchi, Yoshihiro Hirota, Kenji Matsuda, Kinji Yamada, Tomotaka Shinoda, Daohai Wang, Katsuya Okumura