Patents by Inventor Katsuyuki Sakuma
Katsuyuki Sakuma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11973058Abstract: A semiconductor die package that has a substrate with one or more substrate layers with one or more substrate connections. A substrate layer can include one or more redistribution layers (RDLs). One or more dies (e.g., multiple dies) are disposed on a top substrate layer. The dies have one or more die external connections. Some of the die external connections are electrically connected to one or more substrate connections. One or more metallic dam stiffeners form into a dam enclosure that is disposed on and physically connected to the top substrate layer. The dam enclosure encloses one or more of the dies. The metallic dam enclosure has one or more electrically connected regions where the metallic dam enclosure is electrically connected to one or more of the substrate horizontal connections and one or more electrically insulated regions where the metallic dam enclosure is electrically insulated from one or more of the substrate horizontal connections and the substrate via connections.Type: GrantFiled: November 25, 2021Date of Patent: April 30, 2024Assignee: International Business Machines CorporationInventors: Katsuyuki Sakuma, Mukta Ghate Farooq, John Knickerbocker
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Publication number: 20240114302Abstract: Method and system for a cochlear implant that includes receiving, by a processor, an electric audio signal; processing, by the processor, the electric audio signal, thereby providing a processed electric audio signal; receiving, by a transducer driver, the processed electric audio signal; transmitting, by the transducer driver, the processed electric audio signal to electro-acoustic transducer elements that are at least arranged within a cochlea; and vibrating at least one electro-acoustic transducer element of the electro-acoustic transducer elements in response to the at least one electro-acoustic transducer element receiving the processed electric audio signal, thereby providing a vibrating stimulus based on the processed electric audio signal.Type: ApplicationFiled: October 3, 2022Publication date: April 4, 2024Inventors: Sarbajit K. RAKSHIT, Katsuyuki SAKUMA, Amos CAHAN
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Publication number: 20240113055Abstract: A hybrid bonded semiconductor structure includes a first substrate and a second substrate each having an interface joined in a hybrid bond. Each substrate has a die portion and a crackstop structure adjacent the die portion. One or more voids in the first substrate and the second substrate are formed in or about a portion of a periphery of each crackstop structure. At least some of the one or more voids in the first substrate and the second substrate are substantially aligned to form a unified void with airgaps across the hybrid bond interface.Type: ApplicationFiled: September 30, 2022Publication date: April 4, 2024Inventors: Nicholas Alexander Polomoff, Eric Perfecto, Katsuyuki Sakuma, Mukta Ghate Farooq, Spyridon Skordas, Sathyanarayanan Raghavan, Michael P. Belyansky
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Publication number: 20240063171Abstract: An exemplary method includes at a bonding temperature, bonding a semiconductor chip to an organic laminate substrate using solder; without cooldown from the bonding temperature to room temperature, at an underfill dispense temperature, dispensing underfill between the semiconductor chip and the organic laminate substrate; and curing the underfill within a range of temperatures above the underfill dispense temperature. Another exemplary method includes depositing a first solder on pads of an organic laminate substrate; contacting a second solder on pillars of a semiconductor chip to the first solder on the pads of the organic laminate substrate; and solder bonding the semiconductor chip to the organic laminate substrate.Type: ApplicationFiled: October 30, 2023Publication date: February 22, 2024Inventors: Katsuyuki Sakuma, Mukta Ghate Farooq, Paul S. Andry, Russell Kastberg
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Patent number: 11903734Abstract: Systems, computer-implemented methods and/or computer program products that facilitate wearable multiplatform sensing are provided. In one embodiment, a computer-implemented method comprises: measuring, by a system operatively coupled to a processor, wirelessly on a nail plate, physiological data of an entity; integrating and synchronizing, by the system, the physiological data with other physiological data from one or more devices to form integrated physiological data; and analyzing, by the system, the integrated physiological data to detect one or more disorders.Type: GrantFiled: January 2, 2019Date of Patent: February 20, 2024Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Rajeev Narayanan, Katsuyuki Sakuma, John Knickerbocker, Bucknell C. Webb
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Publication number: 20240050039Abstract: A method, a computer program product, and a computer system for a modular sensing unit is provided. The method includes mounting a sensor module of the modular sensing unit to a surface. Data of the surface is measured via a sensor component. The data is transmitted from the sensor module to a component module of the modular sensing unit via a power cable ribbon, and a metric is determined by the component module based on the data.Type: ApplicationFiled: October 27, 2023Publication date: February 15, 2024Inventors: RAJEEV NARAYANAN, Bing Dang, Katsuyuki Sakuma
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Patent number: 11887908Abstract: An electronic structure includes offset three-dimensional stacked chips; and a two-piece lid structure configured to extract heat from the bottom and top of the stacked chips.Type: GrantFiled: December 21, 2021Date of Patent: January 30, 2024Assignee: International Business Machines CorporationInventors: Kamal K. Sikka, Katsuyuki Sakuma, Hilton T. Toy, Shidong Li, Ravi K Bonam
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Patent number: 11887956Abstract: A semiconductor device and formation thereof. The semiconductor device includes a first semiconductor structure, a second semiconductor structure, and a plurality of pillars interconnecting the first semiconductor structure and the second semiconductor structure. The plurality of pillars include a first solder layer and a second solder layer, wherein the first solder layer has a higher melting point than the second solder layer.Type: GrantFiled: December 20, 2021Date of Patent: January 30, 2024Assignee: International Business Machines CorporationInventors: Katsuyuki Sakuma, Mukta Ghate Farooq
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Patent number: 11850068Abstract: A method, a structure, and a computer system for a modular sensing unit. The structure comprises a sensor module, a power cable ribbon, and a component module, wherein the component module is in communication with and detachable from the sensor module via the power cable ribbon.Type: GrantFiled: November 27, 2019Date of Patent: December 26, 2023Assignee: International Business Machines CorporationInventors: Rajeev Narayanan, Bing Dang, Katsuyuki Sakuma
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Patent number: 11824037Abstract: An exemplary method includes at a bonding temperature, bonding a semiconductor chip to an organic laminate substrate using solder; without cooldown from the bonding temperature to room temperature, at an underfill dispense temperature, dispensing underfill between the semiconductor chip and the organic laminate substrate; and curing the underfill within a range of temperatures above the underfill dispense temperature. Another exemplary method includes depositing a first solder on pads of an organic laminate substrate; contacting a second solder on pillars of a semiconductor chip to the first solder on the pads of the organic laminate substrate; and solder bonding the semiconductor chip to the organic laminate substrate.Type: GrantFiled: December 31, 2020Date of Patent: November 21, 2023Assignee: International Business Machines CorporationInventors: Katsuyuki Sakuma, Mukta Ghate Farooq, Paul S. Andry, Russell Kastberg
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Patent number: 11817394Abstract: The present invention discloses embodiments of a semiconductor chip with one or more bottom external (power or ground) connections, a front side power network layer, a device layer, and a grind side power network layer. The device layer has a plurality of devices. One or more of the devices has one or more device power connections and one or more device ground connections and the device layer has a front side and a back grind side. The front side power network layer has power, ground, signal, and other connections that connect to respective device power and device ground connections from/through the top front side layer. In like manner, power, ground, signal, and other connections connect to respective device power and device ground connections from/through the bottom of grind side power network layer. (Alternative, e.g., external conduit connections are disclosed.Type: GrantFiled: October 11, 2021Date of Patent: November 14, 2023Assignee: International Business Machines CorporationInventors: Mukta Ghate Farooq, Katsuyuki Sakuma
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Patent number: 11784160Abstract: An integrated circuit package substrate (ICPS) system includes a die including a first array of connectors and a substrate including a second array of connectors that is configured to be thermocompression bonded to the first array of connectors at a bonding temperature that is above a solder melting temperature. The first die is bonded to the substrate such that the first die is asymmetric with respect to a substrate center, and the second array of connectors is adjusted, at an alignment temperature that is below the solder melting temperature, for thermal expansion to the bonding temperature with respect to a reference point that is not a first die center.Type: GrantFiled: September 23, 2020Date of Patent: October 10, 2023Assignee: International Business Machines CorporationInventors: Katsuyuki Sakuma, Krishna R. Tunga, Shidong Li, Griselda Bonilla
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Publication number: 20230230947Abstract: An approach for transferring solder to a laminate structure in IC (integrated circuit) packaging is disclosed. The approach comprises of a device and method of applying the device. The device comprises of a substrate, a laser ablation layer and solder layer. The device is made by depositing a laser ablation layer onto a glass/silicon substrate and plenty of solder powder/solder pillar is further deposited onto the laser ablation layer. The laminate packaging substrate includes pads with a pad surface finishing layer made from gold. The solder layer of the device is bonded to the laminate packaging substrate. Once bonded, using laser to irradiate the laser ablation layer, the substrate is removed from the laminate.Type: ApplicationFiled: March 7, 2023Publication date: July 20, 2023Inventor: Katsuyuki Sakuma
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Publication number: 20230197552Abstract: An electronic structure includes offset three-dimensional stacked chips; and a two-piece lid structure configured to extract heat from the bottom and top of the stacked chips.Type: ApplicationFiled: December 21, 2021Publication date: June 22, 2023Inventors: Kamal K. Sikka, Katsuyuki Sakuma, Hilton T. Toy, Shidong Li, Ravi K. Bonam
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Publication number: 20230197595Abstract: A packaged device that carries multiple component devices uses a back-mounted structure to reduce the area of the substrates in the package. The package includes a first organic laminate substrate and a second organic laminate substrate. The first organic laminate substrate is the base substrate of the packaged device. The second organic laminate substrate has higher wiring density than the first organic laminate substrate. The second organic laminate substrate is joined to a top surface (or module mounting side) of the first organic laminate substrate. A first component device is mounted on a top surface of the second organic laminate substrate. A second component device is mounted on a bottom surface of the second organic laminate substrate. The second component device recesses into a cavity at the top surface of the first organic laminate substrate.Type: ApplicationFiled: December 19, 2021Publication date: June 22, 2023Inventors: Katsuyuki Sakuma, Mukta Ghate Farooq, Ramachandra Divakaruni
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Publication number: 20230197657Abstract: A semiconductor device and formation thereof. The semiconductor device includes a first semiconductor structure, a second semiconductor structure, and a plurality of pillars interconnecting the first semiconductor structure and the second semiconductor structure. The plurality of pillars include a first solder layer and a second solder layer, wherein the first solder layer has a higher melting point than the second solder layer.Type: ApplicationFiled: December 20, 2021Publication date: June 22, 2023Inventors: Katsuyuki Sakuma, Mukta Ghate Farooq
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Publication number: 20230186375Abstract: A computer implemented method for providing virtual reality shopping provides generating, by a virtual reality (VR) engine, a VR user interface (UI) and a VR session within a VR device. A list of discounted items being discounted based on proximity to an expiration or best by use date is received from the computing device of an institution item source. A VR image of virtual items on virtual shelves in the VR UI is displayed. The virtual items are dynamically displayed in different positions between a first VR session and a second VR session. Virtual representations of the discounted items being discounted are displayed in positions of priority on the virtual shelves, relative to other virtual items on the virtual shelves.Type: ApplicationFiled: December 14, 2021Publication date: June 15, 2023Inventors: Katsuyuki Sakuma, Sarbajit K. Rakshit
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Publication number: 20230186374Abstract: A computer implemented method for providing an online purchase includes displaying an electronic image of a plurality of items. A signal of a user drawn loop, drawn around one or more of the plurality of items in the electronic image is received through a network connection. The one or more items in the user drawn loop are identified. A cost for the items identified in the user drawn loop is determined. The cost is displayed.Type: ApplicationFiled: December 10, 2021Publication date: June 15, 2023Inventors: Katsuyuki Sakuma, Sarbajit K. Rakshit, Chandrasekhar Narayanaswami
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Publication number: 20230168877Abstract: Embodiments are provided for upgrading operating application in a multi-device ecosystem in a computing environment. Various types of computing devices are determined to be connected to a multi-device computing network. A collaboration plan is generated between the computing devices to execute an operating application operation event on each of the computing devices without interrupting user activities executing on each of the computing devices. Operating applications on each of the computing devices are upgraded according to the collaboration plan without interrupting each of the f user activities on each of the computing devices.Type: ApplicationFiled: November 29, 2021Publication date: June 1, 2023Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Katsuyuki SAKUMA, Sarbajit K RAKSHIT
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Patent number: 11631650Abstract: An approach for transferring solder to a laminate structure in IC (integrated circuit) packaging is disclosed. The approach comprises of a device and method of applying the device. The device comprises of a substrate, a laser ablation layer and solder layer. The device is made by depositing a laser ablation layer onto a glass/silicon substrate and plenty of solder powder/solder pillar is further deposited onto the laser ablation layer. The laminate packaging substrate includes pads with a pad surface finishing layer made from gold. The solder layer of the device is bonded to the laminate packaging substrate. Once bonded, using laser to irradiate the laser ablation layer, the substrate is removed from the laminate.Type: GrantFiled: June 15, 2021Date of Patent: April 18, 2023Assignee: International Business Machines CorporationInventor: Katsuyuki Sakuma