Abstract: An approach for transferring solder to a laminate structure in IC (integrated circuit) packaging is disclosed. The approach comprises of a device and method of applying the device. The device comprises of a substrate, a laser ablation layer and solder layer. The device is made by depositing a laser ablation layer onto a glass/silicon substrate and plenty of solder powder/solder pillar is further deposited onto the laser ablation layer. The laminate packaging substrate includes pads with a pad surface finishing layer made from gold. The solder layer of the device is bonded to the laminate packaging substrate. Once bonded, using laser to irradiate the laser ablation layer, the substrate is removed from the laminate.

Abstract: The present invention discloses embodiments of a semiconductor chip with one or more bottom external (power or ground) connections, a front side power network layer, a device layer, and a grind side power network layer. The device layer has a plurality of devices. One or more of the devices has one or more device power connections and one or more device ground connections and the device layer has a front side and a back grind side. The front side power network layer has power, ground, signal, and other connections that connect to respective device power and device ground connections from/through the top front side layer. In like manner, power, ground, signal, and other connections connect to respective device power and device ground connections from/through the bottom of grind side power network layer. (Alternative, e.g., external conduit connections are disclosed.

Abstract: An interconnect for a semiconductor device includes a laminate substrate; a first plurality of electrical devices in or on a surface of the laminate substrate; a redistribution layer having a surface disposed on the surface of the laminate substrate; a second plurality of electrical devices in or on the surface of the redistribution layer; and a plurality of transmission lines between the first plurality of electrical devices and the second plurality of electrical devices. The surface of the laminate substrate and the surface of the redistribution layer are parallel to each other to form a dielectric structure and a conductor structure.

Abstract: A lidded chip package apparatus has reduced latent thermal stress in an under-chip high-CTE layer of the chip package because the lid of the package was adhered to a substrate of the package and cured during a same thermal excursion as when underfill was dispensed and cured under a chip of the package, and the chip package was cooled from the combined underfill and lidding process to room temperature with the lid adhered to the chip and the substrate, thereby reducing latent thermal stress in the under-chip high-CTE layer of the chip package.

Abstract: Embodiments of the present invention are directed to a two-layer adhesive and methods of using the same to secure an electronic device to an organism. In a non-limiting embodiment of the invention, a surface of the organism is coated with a first adhesive layer (bottom layer). The first adhesive layer is cured and a surface of the cured first adhesive layer is coated with a second adhesive layer (top layer). An electronic device is positioned on the second adhesive layer prior to curing the second adhesive layer. The second adhesive layer is then cured, thereby embedding the electronic device within the second adhesive layer. The bottom layer and the top layer are selected such that the bottom layer releases upon exposure to a first solvent after a first duration and the top layer releases upon exposure to a second solvent after a second duration more than the first duration.

Abstract: An approach for transferring solder to a laminate structure in IC (integrated circuit) packaging is disclosed. The approach comprises of a device and method of applying the device. The device comprises of a substrate, a laser ablation layer and solder layer. The device is made by depositing a laser ablation layer onto a glass/silicon substrate and plenty of solder powder/solder pillar is further deposited onto the laser ablation layer. The laminate packaging substrate includes pads with a pad surface finishing layer made from gold. The solder layer of the device is bonded to the laminate packaging substrate. Once bonded, using laser to irradiate the laser ablation layer, the substrate is removed from the laminate.

Abstract: In some examples, an electronic package and methods for forming the electronic package are described. The electronic package can be formed by disposing an interposer on a surface of a substrate having a first pitch wiring density. The interposer can have a second pitch wiring density different from the first pitch wiring density. A layer of non-conductive film can be situated between the interposer and the surface of the substrate. A planarization process can be performed on a surface of the substrate. A solder resist patterning can be performed on the planarized surface the substrate. A solder reflow and coining process can be performed to form a layer of solder bumps on top of the planarized surface of the substrate. The interposer can provide bridge connection between at least two die disposed above the substrate. Solder bumps under the interposer electrically connect the substrate and the interposer.

Abstract: Identifying physical objects needing sanitization is provided. An object touched by a user is identified by means of a mobile device corresponding to the user. It is determined that the user currently has infectious agent based on retrieved information. The object touched by the user is indicated as needing sanitization.

Abstract: Embodiments of the present invention are directed to a two-layer adhesive and methods of using the same to secure an electronic device to an organism. In a non-limiting embodiment of the invention, a surface of the organism is coated with a first adhesive layer (bottom layer). The first adhesive layer is cured and a surface of the cured first adhesive layer is coated with a second adhesive layer (top layer). An electronic device is positioned on the second adhesive layer prior to curing the second adhesive layer. The second adhesive layer is then cured, thereby embedding the electronic device within the second adhesive layer. The bottom layer and the top layer are selected such that the bottom layer releases upon exposure to a first solvent after a first duration and the top layer releases upon exposure to a second solvent after a second duration more than the first duration.

Abstract: An approach to provide a method of joining a semiconductor chip to a semiconductor substrate, the approach includes depositing a nanoparticle paste and aligning each of one or more solder contacts on a semiconductor chip to a substrate bond pad. The approach includes sintering, in a reducing gaseous environment, the nanoparticle paste to connect the semiconductor chip to a semiconductor substrate bond pad.

Abstract: A method for fabricating a bridge chip assembly for interconnecting two or more IC dies is provided. Each of the IC dies has a first region including first connections having a first pitch and has a second region including second connections or connection pads having a second pitch, the first pitch being greater than the second pitch. The method includes: attaching a non-conductive underfill film on an upper surface of at least the second region of each of the IC dies; bonding the second connections/connection pads of a first IC die to corresponding first connection pads/connections of a bridge chip; and bonding the second connections/connection pads of a second IC die to the bridge chip. The bridge chip assembly includes the bridge chip bonded with the first and second IC dies, and the non-conductive underfill film disposed between the bridge chip and the IC dies.

Abstract: Maintaining a smart contact lens power level by receiving smart contact lens power level data, determining a smart contact lens power level need according to the power level data, and instigating relative motion between a smart contact lens induction coil and a static magnetic field to meet the smart contact lens power level need.

Abstract: Maintaining a smart contact lens power level by receiving smart contact lens power level data, determining a smart contact lens power level need according to the power level data, and instigating relative motion between a smart contact lens induction coil and a static magnetic field to meet the smart contact lens power level need.

Abstract: A lidded chip package apparatus has reduced latent thermal stress in an under-chip high-CTE layer of the chip package because the lid of the package was adhered to a substrate of the package and cured during a same thermal excursion as when underfill was dispensed and cured under a chip of the package, and the chip package was cooled from the combined underfill and lidding process to room temperature with the lid adhered to the chip and the substrate, thereby reducing latent thermal stress in the under-chip high-CTE layer of the chip package.

Abstract: An exemplary method includes at a bonding temperature, bonding a semiconductor chip to an organic laminate substrate using solder; without cooldown from the bonding temperature to room temperature, at an underfill dispense temperature, dispensing underfill between the semiconductor chip and the organic laminate substrate; and curing the underfill within a range of temperatures above the underfill dispense temperature. Another exemplary method includes depositing a first solder on pads of an organic laminate substrate; contacting a second solder on pillars of a semiconductor chip to the first solder on the pads of the organic laminate substrate; and solder bonding the semiconductor chip to the organic laminate substrate.

Abstract: An item storage system includes a shelving portion and a replenishment portion. The shelving portion includes: a first shelf having a toroidal shape with a center axis; and a second shelf having a toroidal shape that is spaced apart from the first shelf along the center axis. The replenishment portion includes: an elevator portion configured to deliver items to the first shelf and the second shelf, wherein at least part of the elevator portion is positioned in the center of the shelving portion and is surrounded by the shelving portion; and a storing portion configured to load items into the elevator portion, wherein the storing portion is positioned above or below the shelving portion.

Abstract: An approach to harvesting electrical energy from a user blinking is disclosed. The approach uses an apparatus that includes a piezoelectric film attaching to a user's eyelid, a wire connecting the piezoelectric film to an electronic component; and an antenna surrounding an eye of the user connecting to the electronic component. The approach includes harvesting electrical energy from a user blinking with the piezoelectric film and the antenna wirelessly transmitting the electrical energy to smart contact lens worn by the user.

Abstract: A method for fabricating a bridge chip assembly for interconnecting two or more IC dies is provided. Each of the IC dies has a first region including first connections having a first pitch and has a second region including second connections or connection pads having a second pitch, the first pitch being greater than the second pitch. The method includes: attaching a non-conductive underfill film on an upper surface of at least the second region of each of the IC dies; bonding the second connections/connection pads of a first IC die to corresponding first connection pads/connections of a bridge chip; and bonding the second connections/connection pads of a second IC die to the bridge chip. The bridge chip assembly includes the bridge chip bonded with the first and second IC dies, and the non-conductive underfill film disposed between the bridge chip and the IC dies.

Abstract: A method of fabricating ultra-thin chips is provided. The method includes patterning circuit elements onto a substrate such that sections of the substrate are exposed and etching trenches into the sections of the substrate to define pedestals respectively associated with a corresponding circuit element. The method further includes depositing stressor layer material onto the circuit elements and applying handling tape to the stressor layer material. In addition, the method includes at least one of weakening the substrate in a plane defined by base corners of the pedestals and initiating substrate cracking at the base corners of the pedestals to encourage spalling of the pedestals off the substrate.

Abstract: An integrated circuit package substrate (ICPS) system includes a die including a first array of connectors and a substrate including a second array of connectors that is configured to be thermocompression bonded to the first array of connectors at a bonding temperature that is above a solder melting temperature. The first die is bonded to the substrate such that the first die is asymmetric with respect to a substrate center, and the second array of connectors is adjusted, at an alignment temperature that is below the solder melting temperature, for thermal expansion to the bonding temperature with respect to a reference point that is not a first die center.