Patents by Inventor Keiji Wada

Keiji Wada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210166941
    Abstract: A first main surface is a (000-1) plane or a plane inclined by an angle of less than or equal to 8° relative to the (000-1) plane. A substrate placement surface has an area of more than or equal to 697 cm2 and less than or equal to 1161 cm2. When an X axis indicates a first value and a Y axis indicates a second value, the first value and the second value fall within a hexagonal region surrounded by first coordinates, second coordinates, third coordinates, fourth coordinates, fifth coordinates and sixth coordinates in XY plane coordinates, where the first coordinates are (0.038, 0.0019), the second coordinates are (0.069, 0.0028), the third coordinates are (0.177, 0.0032), the fourth coordinates are (0.038, 0.0573), the fifth coordinates are (0.069, 0.0849), and the sixth coordinates are (0.177, 0.0964).
    Type: Application
    Filed: June 3, 2019
    Publication date: June 3, 2021
    Inventors: Takaya MIYASE, Keiji WADA
  • Patent number: 11011489
    Abstract: A semiconductor device includes an insulating layer, a barrier electrode layer formed on the insulating layer, a Cu electrode layer that includes a metal composed mainly of copper and that is formed on a principal surface of the barrier electrode layer, and an outer-surface insulating film that includes copper oxide, that coats an outer surface of the Cu electrode layer, and that is in contact with the principal surface of the barrier electrode layer.
    Type: Grant
    Filed: April 7, 2020
    Date of Patent: May 18, 2021
    Assignee: ROHM CO., LTD.
    Inventors: Bungo Tanaka, Keiji Wada, Satoshi Kageyama
  • Patent number: 11004941
    Abstract: A silicon carbide epitaxial substrate has a silicon carbide single-crystal substrate and a silicon carbide layer. An average value of carrier concentration in the silicon carbide layer is not less than 1×1015 cm?3 and not more than 5×1016 cm?3. In-plane uniformity of the carrier concentration is not more than 2%. The second main surface has: a groove 80 extending in one direction along the second main surface, a width of the groove in the one direction being twice or more as large as a width thereof in a direction perpendicular to the one direction, and a maximum depth of the groove from the second main surface being not more than 10 nm; and a carrot defect. A value obtained by dividing a number of the carrot defects by a number of the grooves is not more than 1/500.
    Type: Grant
    Filed: August 6, 2020
    Date of Patent: May 11, 2021
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keiji Wada, Hironori Itoh, Taro Nishiguchi
  • Publication number: 20200365693
    Abstract: A silicon carbide epitaxial substrate has a silicon carbide single-crystal substrate and a silicon carbide layer. An average value of carrier concentration in the silicon carbide layer is not less than 1×1015 cm?3 and not more than 5×1016 cm?3. In-plane uniformity of the carrier concentration is not more than 2%. The second main surface has: a groove 80 extending in one direction along the second main surface, a width of the groove in the one direction being twice or more as large as a width thereof in a direction perpendicular to the one direction, and a maximum depth of the groove from the second main surface being not more than 10 nm; and a carrot defect. A value obtained by dividing a number of the carrot defects by a number of the grooves is not more than 1/500.
    Type: Application
    Filed: August 6, 2020
    Publication date: November 19, 2020
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Keiji Wada, Hironori ltoh, Taro Nishiguchi
  • Patent number: 10825903
    Abstract: Assuming that one or more defects satisfying relations of Formula 1 and Formula 2 are first defects, and one or more defects satisfying relations of Formula 3 and Formula 2 are second defects, where an off angle is ?°, the thickness of a silicon carbide layer in a direction perpendicular to a second main surface is W ?m, the width of each of the one or more defects in a direction obtained by projecting a direction parallel to an off direction onto the second main surface is L ?m, and the width of each of the one or more defects in a direction perpendicular to the off direction and parallel to the second main surface is Y ?m, a value obtained by dividing the number of the second defects by the sum of the number of the first defects and the number of the second defects is greater than 0.5.
    Type: Grant
    Filed: October 3, 2017
    Date of Patent: November 3, 2020
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keiji Wada, Tsutomu Hori, Hironori Itoh
  • Patent number: 10811500
    Abstract: It is assumed that a defect satisfying relations of Formula 1 and Formula 2 is a first defect, where an off angle is ?. It is assumed that a defect having an elongated shape when viewed in a direction perpendicular to the second main surface, and satisfying relations of Formula 3 and Formula 4 is a second defect. A value obtained by dividing the number of the second defect by the sum of the number of the first defect and the number of the second defect is greater than 0.5.
    Type: Grant
    Filed: December 1, 2017
    Date of Patent: October 20, 2020
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hironori Itoh, Keiji Wada, Tsutomu Hori
  • Patent number: 10770550
    Abstract: A silicon carbide epitaxial substrate has a silicon carbide single-crystal substrate and a silicon carbide layer. An average value of carrier concentration in the silicon carbide layer is not less than 1×1015 cm?3 and not more than 5×1016 cm?3. In-plane uniformity of the carrier concentration is not more than 2%. The second main surface has: a groove 80 extending in one direction along the second main surface, a width of the groove in the one direction being twice or more as large as a width thereof in a direction perpendicular to the one direction, and a maximum depth of the groove from the second main surface being not more than 10 nm; and a carrot defect. A value obtained by dividing a number of the carrot defects by a number of the grooves is not more than 1/500.
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: September 8, 2020
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keiji Wada, Hironori Itoh, Taro Nishiguchi
  • Patent number: 10741683
    Abstract: A semiconductor device has a semiconductor layer and a substrate. The semiconductor layer constitutes at least a part of a current path, and is made of silicon carbide. The substrate has a first surface supporting the semiconductor layer, and a second surface opposite to the first surface. Further, the substrate is made of silicon carbide having a 4H type single-crystal structure. Further, the substrate has a physical property in which a ratio of a peak strength in a wavelength of around 500 nm to a peak strength in a wavelength of around 390 nm is 0.1 or smaller in photoluminescence measurement. In this way, the semiconductor device is obtained to have a low on-resistance.
    Type: Grant
    Filed: March 12, 2018
    Date of Patent: August 11, 2020
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Shin Harada, Makoto Sasaki, Taro Nishiguchi, Kyoko Okita, Keiji Wada, Tomihito Miyazaki
  • Publication number: 20200235064
    Abstract: A semiconductor device includes an insulating layer, a barrier electrode layer formed on the insulating layer, a Cu electrode layer that includes a metal composed mainly of copper and that is formed on a principal surface of the barrier electrode layer, and an outer-surface insulating film that includes copper oxide, that coats an outer surface of the Cu electrode layer, and that is in contact with the principal surface of the barrier electrode layer.
    Type: Application
    Filed: April 7, 2020
    Publication date: July 23, 2020
    Inventors: Bungo TANAKA, Keiji WADA, Satoshi KAGEYAMA
  • Patent number: 10697086
    Abstract: In forming of a silicon carbide layer, when an X axis indicates a first value representing, in percentage, a value obtained by dividing a flow rate of silane by a flow rate of hydrogen and a Y axis indicates a second value representing a flow rate of ammonia in sccm, the first value and the second value fall within a quadrangular region surrounded by first coordinates, second coordinates, third coordinates, and fourth coordinates in XY plane coordinates. The first coordinates are (0.05, 6.5×10?4). The second coordinates are (0.05, 4.5×10?3). The third coordinates are (0.22, 1.2×10?2). The fourth coordinates are (0.22, 1.3×10?1). After the forming of the silicon carbide layer, an average value of carrier concentration of the silicon carbide layer is more than or equal to 1×1015 cm?3 and less than or equal to 2×1016 cm?3.
    Type: Grant
    Filed: August 2, 2016
    Date of Patent: June 30, 2020
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keiji Wada, Hideyuki Doi, Hironori Itoh
  • Patent number: 10651144
    Abstract: A semiconductor device includes an insulating layer, a barrier electrode layer formed on the insulating layer, a Cu electrode layer that includes a metal composed mainly of copper and that is formed on a principal surface of the barrier electrode layer, and an outer-surface insulating film that includes copper oxide, that coats an outer surface of the Cu electrode layer, and that is in contact with the principal surface of the barrier electrode layer.
    Type: Grant
    Filed: September 5, 2019
    Date of Patent: May 12, 2020
    Assignee: ROHM CO., LTD.
    Inventors: Bungo Tanaka, Keiji Wada, Satoshi Kageyama
  • Publication number: 20200052074
    Abstract: A silicon carbide epitaxial substrate has a silicon carbide single-crystal substrate and a silicon carbide layer. An average value of carrier concentration in the silicon carbide layer is not less than 1×1015 cm?3 and not more than 5×1016 cm?3. In-plane uniformity of the carrier concentration is not more than 2%. The second main surface has: a groove 80 extending in one direction along the second main surface, a width of the groove in the one direction being twice or more as large as a width thereof in a direction perpendicular to the one direction, and a maximum depth of the groove from the second main surface being not more than 10 nm; and a carrot defect. A value obtained by dividing a number of the carrot defects by a number of the grooves is not more than 1/500.
    Type: Application
    Filed: October 23, 2019
    Publication date: February 13, 2020
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Keiji Wada, Hironori Itoh, Taro Nishiguchi
  • Publication number: 20200043725
    Abstract: A method for manufacturing a silicon carbide epitaxial substrate includes a process of loading a plurality of silicon carbide single crystal substrates on a substrate holder, and a process of depositing a silicon carbide epitaxial layer on the plurality of silicon carbide single crystal substrates at the same time by rotating the substrate holder about an axis perpendicular to a principal surface of the silicon carbide single crystal substrates while supplying a gas containing carbon, a gas containing silicon, nitrogen gas and ammonia gas. A flow rate of the ammonia gas to a flow rate of the nitrogen gas is not more than 0.0089.
    Type: Application
    Filed: June 8, 2017
    Publication date: February 6, 2020
    Inventor: Keiji WADA
  • Publication number: 20200013858
    Abstract: It is assumed that a defect satisfying relations of Formula 1 and Formula 2 is a first defect, where an off angle is ?. It is assumed that a defect having an elongated shape when viewed in a direction perpendicular to the second main surface, and satisfying relations of Formula 3 and Formula 4 is a second defect. A value obtained by dividing the number of the second defect by the sum of the number of the first defect and the number of the second defect is greater than 0.5.
    Type: Application
    Filed: December 1, 2017
    Publication date: January 9, 2020
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Hironori ITOH, Keiji WADA, Tsutomu HORI
  • Publication number: 20190393177
    Abstract: A semiconductor device includes an insulating layer, a barrier electrode layer formed on the insulating layer, a Cu electrode layer that includes a metal composed mainly of copper and that is formed on a principal surface of the barrier electrode layer, and an outer-surface insulating film that includes copper oxide, that coats an outer surface of the Cu electrode layer, and that is in contact with the principal surface of the barrier electrode layer.
    Type: Application
    Filed: September 5, 2019
    Publication date: December 26, 2019
    Inventors: Bungo TANAKA, Keiji WADA, Satoshi KAGEYAMA
  • Patent number: 10504996
    Abstract: A silicon carbide semiconductor device includes a silicon carbide substrate and a gate insulating film. The silicon carbide substrate has a first main surface and a second main surface opposite to the first main surface. The gate insulating film is provided on the first main surface. The silicon carbide substrate includes a first body region having p type, a second body region having p type, and a JFET region provided between the first body region and the second body region and having n type. The JFET region has both a first impurity capable of providing the p type and a second impurity capable of providing the n type. A concentration of the second impurity is higher than a concentration of the first impurity. The silicon carbide semiconductor device capable of suppressing dielectric breakdown of the gate insulating film is provided.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: December 10, 2019
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Kosuke Uchida, Toru Hiyoshi, Keiji Wada
  • Patent number: 10490634
    Abstract: A silicon carbide epitaxial substrate has a silicon carbide single-crystal substrate and a silicon carbide layer. An average value of carrier concentration in the silicon carbide layer is not less than 1×1015 cm?3 and not more than 5×10 cm?3. In-plane uniformity of the carrier concentration is not more than 2%. The second main surface has: a groove 80 extending in one direction along the second main surface, a width of the groove in the one direction being twice or more as large as a width thereof in a direction perpendicular to the one direction, and a maximum depth of the groove from the second main surface being not more than 10 nm; and a carrot defect. A value obtained by dividing a number of the carrot defects by a number of the grooves is not more than 1/500.
    Type: Grant
    Filed: August 23, 2016
    Date of Patent: November 26, 2019
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keiji Wada, Hironori Itoh, Taro Nishiguchi
  • Publication number: 20190355820
    Abstract: Assuming that one or more defects satisfying relations of Formula 1 and Formula 2 are first defects, and one or more defects satisfying relations of Formula 3 and Formula 2 are second defects, where an off angle is ?°, the thickness of a silicon carbide layer in a direction perpendicular to a second main surface is W ?m, the width of each of the one or more defects in a direction obtained by projecting a direction parallel to an off direction onto the second main surface is L ?m, and the width of each of the one or more defects in a direction perpendicular to the off direction and parallel to the second main surface is Y ?m, a value obtained by dividing the number of the second defects by the sum of the number of the first defects and the number of the second defects is greater than 0.5.
    Type: Application
    Filed: October 3, 2017
    Publication date: November 21, 2019
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Keiji WADA, Tsutomu HORI, Hironori ITOH
  • Patent number: 10453816
    Abstract: A semiconductor device includes an insulating layer, a barrier electrode layer formed on the insulating layer, a Cu electrode layer that includes a metal composed mainly of copper and that is formed on a principal surface of the barrier electrode layer, and an outer-surface insulating film that includes copper oxide, that coats an outer surface of the Cu electrode layer, and that is in contact with the principal surface of the barrier electrode layer.
    Type: Grant
    Filed: September 27, 2017
    Date of Patent: October 22, 2019
    Assignee: ROHM CO., LTD.
    Inventors: Bungo Tanaka, Keiji Wada, Satoshi Kageyama
  • Patent number: 10396163
    Abstract: A silicon carbide epitaxial substrate includes a silicon carbide single crystal substrate and a silicon carbide layer. The silicon carbide single crystal substrate has a first main surface. The silicon carbide layer is on the first main surface. The silicon carbide layer includes a second main surface opposite to a surface thereof in contact with the silicon carbide single crystal substrate. The second main surface has a maximum diameter of more than or equal to 100 mm. The second main surface includes an outer peripheral region which is within 3 mm from an outer edge of the second main surface, and a central region surrounded by the outer peripheral region. The central region has a haze of less than or equal to 75 ppm.
    Type: Grant
    Filed: August 4, 2016
    Date of Patent: August 27, 2019
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keiji Wada, Hironori Itoh, Takemi Terao, Kenji Kanbara, Taro Nishiguchi