Patents by Inventor Keiji Wada

Keiji Wada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160300943
    Abstract: There is provided a silicon carbide semiconductor device allowing for increased switching speed with a simpler configuration. A silicon carbide semiconductor device includes: a gate electrode provided on a gate insulating film; and a gate pad. The gate electrode includes a first comb-tooth shaped electrode portion extending from outside of the gate pad toward a circumferential edge portion of the gate pad and overlapping with the gate pad at the circumferential 1edge portion of the gate pad when viewed in a plan view. A p+ region includes: a central portion overlapping with the gate pad when viewed in the plan view; and a peripheral portion extending from the central portion toward the outside of the gate pad, the peripheral portion being provided to face the first comb-tooth shaped electrode portion of the gate electrode with a space interposed therebetween.
    Type: Application
    Filed: August 11, 2014
    Publication date: October 13, 2016
    Inventors: Toru Hiyoshi, Takeyoshi Masuda, Keiji Wada
  • Publication number: 20160293690
    Abstract: A silicon carbide film has first and second main surfaces. The second main surface has an element formation surface and a termination surface. The silicon carbide film has a first range that constitutes a first main surface and an intermediate surface opposite to the first main surface, and a second range that is provided on the intermediate surface and constitutes the element formation surface. The first range includes: a first breakdown voltage holding layer, and a guard ring region partially provided at the intermediate surface in the termination portion. The second range has a second breakdown voltage holding layer. The second range has one of a structure only having the second breakdown voltage holding layer in the termination portion and a structure disposed only in the element portion of the element portion and the termination portion.
    Type: Application
    Filed: November 27, 2013
    Publication date: October 6, 2016
    Inventors: Takeyoshi MASUDA, Keiji WADA
  • Patent number: 9443960
    Abstract: An MOSFET includes a silicon carbide substrate, an active layer, a gate oxide film, and a gate electrode. The active layer includes a body region where an inversion layer is formed at a region in contact with the gate oxide film by application of voltage to the gate electrode. The body region includes a low concentration region arranged at a region where an inversion layer is formed, and containing impurities of low concentration, and a high concentration region adjacent to the low concentration region in the carrier mobile direction in the inversion layer, arranged in a region where the inversion layer is formed, and containing impurities higher in concentration than in the low concentration region.
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: September 13, 2016
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takeyoshi Masuda, Keiji Wada, Toru Hiyoshi
  • Publication number: 20160247911
    Abstract: A silicon carbide semiconductor device includes: a silicon carbide semiconductor layer having a main surface, the main surface being provided with a trench which has a bottom portion and a sidewall inclined with respect to the main surface; a gate insulating film covering each of the bottom portion and the sidewall; a gate electrode provided at least on the gate insulating film; and an upper insulating film provided on the main surface and having a part which protrudes into the trench.
    Type: Application
    Filed: September 8, 2014
    Publication date: August 25, 2016
    Inventors: Toru Hiyoshi, Keiji Wada, Takeyoshi Masuda, Yu Saitoh
  • Publication number: 20160225855
    Abstract: There is provided a silicon carbide semiconductor device allowing for integration of a transistor element and a Schottky barrier diode while avoiding reduction of an active region and decrease of a breakdown voltage. A silicon carbide semiconductor device includes a silicon carbide layer. The silicon carbide layer includes: a first region defining an outer circumference portion of an element region in which a transistor element is provided; and a JTE region provided external to the first region in a drift layer and electrically connected to the first region. The first region is provided with at least one opening through which the drift layer is exposed. The silicon carbide semiconductor device further includes a Schottky electrode provided in the opening and forming a Schottky junction with the drift layer.
    Type: Application
    Filed: July 28, 2014
    Publication date: August 4, 2016
    Inventors: Toru Hiyoshi, Keiji Wada, Takeyoshi Masuda
  • Publication number: 20160225891
    Abstract: Provided is a silicon carbide semiconductor device that enables integration of a transistor element and a Schottky barrier diode while avoiding the reduction of an active region. A silicon carbide semiconductor device includes a silicon carbide layer, a gate insulating film, a Schottky electrode being Schottky functioned to a drift layer via a first contact hole and an opening, a gate electrode being arranged on the gate insulating film, an insulating layer being arranged so as to cover the gate insulating film, the gate electrode, and the Schottky electrode and having a second contact hole for exposing the gate electrode, and a gate pad electrode being arranged on the insulating layer so as to overlap the Schottky electrode in a plan view and being electrically connected to the gate electrode via the second contact hole.
    Type: Application
    Filed: July 28, 2014
    Publication date: August 4, 2016
    Inventors: Toru Hiyoshi, Keiji Wada, Takeyoshi Masuda
  • Publication number: 20160225854
    Abstract: A silicon carbide semiconductor device includes a silicon carbide substrate, a gate electrode, and a drain electrode. A trench is formed in a second main surface of the silicon carbide substrate. The silicon carbide substrate includes a first conductivity type region, a body region, a source region, and a first second conductivity type region surrounded by the first conductivity type region. The trench is formed of a side wall surface and a bottom portion. An impurity concentration of the first second conductivity type region is lower than an impurity concentration of the first conductivity type region. The first second conductivity type region is provided so as to face a region between a first contact point and a second contact point and be separated apart from a first main surface.
    Type: Application
    Filed: August 1, 2014
    Publication date: August 4, 2016
    Inventors: Keiji Wada, Toru Hiyoshi
  • Publication number: 20160218176
    Abstract: An SiC semiconductor device includes an SiC layer including a drift region forming a surface and a body region forming a part of a surface and being in contact with the drift region, a drain electrode electrically connected to a region on a side of the surface in the drift region, and a source electrode electrically connected to the body region. Main carriers which pass through the drift region and migrate between the drain electrode and the source electrode are only electrons. Z1/2 center is introduced into the drift region at a concentration not lower than 1×1013 cm?3 and not higher than 1×1015 cm?3.
    Type: Application
    Filed: July 16, 2014
    Publication date: July 28, 2016
    Inventors: Toru Hiyoshi, Keiji Wada
  • Patent number: 9397155
    Abstract: A silicon carbide semiconductor device includes a silicon carbide layer, an element region including a semiconductor element portion formed in the silicon carbide layer, a JTE region (first electric field relaxing region), an insulating film disposed on a first main surface and covering the JTE region, and a pad electrode electrically connected to the JTE region. The pad electrode includes an extension portion extending from an end of the JTE region close to the element region in a peripheral direction from the element region toward the JTE region, the extension portion being disposed on the insulating film. The extension portion overlies at least a portion of the JTE region.
    Type: Grant
    Filed: November 19, 2015
    Date of Patent: July 19, 2016
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keiji Wada, Toru Hiyoshi, Masaki Furumai, Mitsuhiko Sakai, Kosuke Uchida
  • Publication number: 20160204220
    Abstract: A method for manufacturing a silicon carbide semiconductor device includes steps of preparing a silicon carbide substrate having a first main surface and a second main surface opposite to the first main surface, forming a groove portion in the first main surface of the silicon carbide substrate, and cutting the silicon carbide substrate at the groove portion. The step of forming the groove portion includes a step of thermally etching the silicon carbide substrate using chlorine. Thereby, a method for manufacturing a silicon carbide semiconductor device capable of suppressing damage to a chip is provided.
    Type: Application
    Filed: July 9, 2014
    Publication date: July 14, 2016
    Inventors: Keiji Wada, Takeyoshi Masuda, Mitsuhiko Sakai
  • Patent number: 9384981
    Abstract: A method of manufacturing a silicon carbide semiconductor device includes the steps of preparing a silicon carbide substrate, forming a first electrode on the silicon carbide substrate, establishing ohmic contact between the silicon carbide substrate and the first electrode by irradiating the first electrode with laser beams, and forming a second electrode on the first electrode. In the step of establishing ohmic contact, a surface of the first electrode is irradiated with laser beams such that arithmetic mean roughness of a surface of the second electrode is not greater than 0.2 ?m.
    Type: Grant
    Filed: July 8, 2015
    Date of Patent: July 5, 2016
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hideto Tamaso, Hiroyuki Kitabayashi, Keiji Wada
  • Publication number: 20160181374
    Abstract: A silicon carbide semiconductor device includes a silicon carbide substrate and a gate electrode. The silicon carbide substrate includes a first source region and a second source region, a first body region, a second body region, a first drift region, a second drift region, a third drift region, and a first connection region. The first connection region is provided to include a first intersection and a second intersection, the first intersection being an intersection of a straight line along a first straight-line portion and a straight line along a second straight-line portion, the second intersection being an intersection of a straight line along a third straight-line portion and a straight line along a fourth straight-line portion, and the first connection region has a second conductivity type.
    Type: Application
    Filed: June 25, 2014
    Publication date: June 23, 2016
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Toru HIYOSHI, Keiji WADA
  • Publication number: 20160181372
    Abstract: A silicon carbide layer includes a drift region, a body region and a source region. The drift region constitutes a first main surface and has a first conductivity type. The body region is provided on the drift region, and has a second conductivity type. It is provided on the body region to be separated from the drift region, constitutes a second main surface, and has the first conductivity type. The silicon carbide layer is provided with a trench including a first side wall portion and a first bottom portion. The silicon carbide layer is embedded in the drift region to face the first bottom portion, and includes a second conductivity type region having the second conductivity type. The second conductivity type region is electrically connected to the source region.
    Type: Application
    Filed: June 10, 2014
    Publication date: June 23, 2016
    Inventors: Keiji Wada, Takeyoshi Masuda, Hideto Tamaso, Yu Saitoh, Toru Hiyoshi, Mitsuhiko Sakai
  • Publication number: 20160163853
    Abstract: A silicon carbide semiconductor device includes a silicon carbide layer having a first main surface and a second main surface opposite to the first main surface. In the second main surface of the silicon carbide layer, a trench having a depth in a direction from the second main surface toward the first main surface is provided, and the trench has a sidewall portion where a second layer and a third layer are exposed and a bottom portion, where a first layer is exposed. A position of the bottom portion of the trench in a direction of depth of the trench is located on a side of the second main surface relative to a site located closest to the first main surface in a region where the second layer and the first layer are in contact with each other, or located as deep as the site in the direction of depth.
    Type: Application
    Filed: June 17, 2014
    Publication date: June 9, 2016
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Toru Hiyoshi, Takeyoshi Masuda, Keiji Wada
  • Publication number: 20160126347
    Abstract: A trench reaches a first layer of a first conductivity type from a second main surface through a third layer of the first conductivity type and a second layer of a second conductivity type. A contact region extends from the second main surface through the third layer and the second layer to a position deeper than an interface between the first layer and the second layer, and comes in contact with an embedded region. The contact region is higher in impurity concentration than the second layer. The embedded region has a first portion lying between the contact region and a first main surface in a direction of thickness and a second portion extending from the first portion toward the trench.
    Type: Application
    Filed: May 8, 2014
    Publication date: May 5, 2016
    Inventors: Keiji WADA, Takeyoshi MASUDA
  • Publication number: 20160093749
    Abstract: A silicon carbide semiconductor device includes a silicon carbide layer, an insulating layer, a Schottky electrode, and a reaction region. The silicon carbide layer includes a p type region in contact with a first main surface and an n type region in contact with the p type region and the first main surface. The insulating layer has a third main surface, a fourth main surface, and a side wall surface connecting the third main surface and the fourth main surface, and is in contact with the first main surface at the fourth main surface. The Schottky electrode is in contact with the first main surface and the side wall surface. The reaction region is in contact with the insulating layer, the Schottky electrode, and the p type region. The reaction region contains an element constituting the Schottky electrode, an element constituting the insulating layer, silicon, and carbon.
    Type: Application
    Filed: April 2, 2014
    Publication date: March 31, 2016
    Inventors: Keiji Wada, Kenji Kanbara
  • Patent number: 9299790
    Abstract: First and second ranges of a silicon carbide film have an interface. The first range includes: a first breakdown voltage holding layer having a first conductivity type; and an outer edge embedded region provided at an interface in the outer edge portion and having a second conductivity type. The second range includes a second breakdown voltage holding layer having the first conductivity type. A semiconductor element is formed in the second range. The first range includes: a central section facing the semiconductor element in the central portion in a thickness direction; and an outer edge section facing the semiconductor element in the outer edge portion in the thickness direction. At the interface, the outer edge section includes a portion having an impurity concentration different from the impurity concentration of the central section.
    Type: Grant
    Filed: November 27, 2013
    Date of Patent: March 29, 2016
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takeyoshi Masuda, Keiji Wada
  • Publication number: 20160087065
    Abstract: A gate insulating film is provided on a trench. The gate insulating film has a trench insulating film and a bottom insulating film. The trench insulating film covers each of a side wall and a bottom portion. The bottom insulating film is provided on the bottom portion with a trench insulating film being interposed therebetween. The bottom insulating film has a carbon atom concentration lower than that of the trench insulating film. The gate electrode is in contact with a portion of the trench insulating film on the side wall. Accordingly, a low threshold voltage and a large breakdown voltage can be attained.
    Type: Application
    Filed: December 2, 2015
    Publication date: March 24, 2016
    Inventors: Takeyoshi Masuda, Yu Saitoh, Hideki Hayashi, Toru Hiyoshi, Keiji Wada
  • Publication number: 20160079349
    Abstract: A silicon carbide semiconductor device includes a silicon carbide layer, an element region including a semiconductor element portion formed in the silicon carbide layer, a JTE region (first electric field relaxing region), an insulating film disposed on a first main surface and covering the JTE region, and a pad electrode electrically connected to the JTE region. The pad electrode includes an extension portion extending from an end of the JTE region close to the element region in a peripheral direction from the element region toward the JTE region, the extension portion being disposed on the insulating film. The extension portion overlies at least a portion of the JTE region.
    Type: Application
    Filed: November 19, 2015
    Publication date: March 17, 2016
    Inventors: Keiji Wada, Toru Hiyoshi, Masaki Furumai, Mitsuhiko Sakai, Kosuke Uchida
  • Patent number: 9276106
    Abstract: A silicon carbide film includes a first range having a first breakdown voltage holding layer, a charge compensation region, a first junction terminal region, and a first guard ring region. The silicon carbide film includes a second range having a second breakdown voltage holding layer, a channel forming region, and a source region. The first and second breakdown voltage holding layers constitutes a breakdown voltage holding region having a thickness in an element portion. When voltage is applied to attain a maximum electric field strength of 0.4 MV/cm or more in the breakdown voltage holding region during an OFF state, a maximum electric field strength in the second range within the element portion is configured to be less than ? of a maximum electric field strength in the first range.
    Type: Grant
    Filed: December 4, 2013
    Date of Patent: March 1, 2016
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keiji Wada, Takeyoshi Masuda, Toru Hiyoshi