Abstract: Described herein are methods and apparatuses for packaging an ultrasound-on-a-chip. An ultrasound-on-a-chip may be coupled to a redistribution layer and to an interposer layer. Encapsulation may encapsulate the ultrasound-on-a-chip device and first metal pillars may extend through the encapsulation and electrically couple to the redistribution layer. Second metal pillars may extend through the interposer layer. The interposer layer may include aluminum nitride. The first metal pillars may be electrically coupled to the second metal pillars. A printed circuit board may be coupled to the interposer layer.

Abstract: A variable current trans-impedance amplifier (TIA) for an ultrasound device is described. The TIA may be coupled to an ultrasonic transducer to amplify an output signal of the ultrasonic transducer representing an ultrasound signal received by the ultrasonic transducer. During acquisition of the ultrasound signal by the ultrasonic transducer, one or more current sources in the TIA may be varied.

Abstract: An integrated circuit includes a photodetection region configured to receive incident photons. The photodetection region is configured to produce a plurality of charge carriers in response to the incident photons. The integrated circuit includes at least one charge carrier storage region. The integrated circuit also includes a charge carrier segregation structure configured to selectively direct charge carriers of the plurality of charge carriers directly into the at least one charge carrier storage region based upon times at which the charge carriers are produced.

Abstract: Apparatus and techniques for electrokinetic loading of samples of interest into sub-micron-scale reaction chambers are described. Embodiments include an integrated device and related apparatus for analyzing samples in parallel. The integrated device may include at least one reaction chamber formed through a surface of the integrated device and configured to receive a sample of interest, such as a molecule of nucleic acid. The integrated device may further include electrodes patterned adjacent to the reaction chamber that produce one or more electric fields that assist loading the sample into the reaction chamber. The apparatus may further include a sample reservoir having a fluid seal with the surface of the integrated device and configured to hold a suspension containing the samples.

Abstract: Circuitry for ultrasound devices is described. A multilevel pulser is described, which can provide bipolar pulses of multiple levels. The multilevel pulser includes a pulsing circuit and pulser and feedback circuit. Symmetric switches are also described. The symmetric switches can be positioned as inputs to ultrasound receiving circuitry to block signals from the receiving circuitry.

Abstract: Ultrasound devices and methods are described, including a repeatable ultrasound transducer probe having ultrasonic transducers and corresponding circuitry. The repeatable ultrasound transducer probe may be used individually or coupled with other instances of the repeatable ultrasound transducer probe to create a desired ultrasound device. The ultrasound devices may optionally be connected to various types of external devices to provide additional processing and image rendering functionality.

Abstract: Aspects of the technology described herein relate to ultrasound circuits that employ a differential ultrasonic transducer element, such as a differential micromachined ultrasonic transducer (MUT) element. The differential ultrasonic transducer element may be coupled to an integrated circuit that is configured to operate the differential ultrasonic transducer element in one or more modes of operation, such as a differential receive mode, a differential transmit mode, a single-ended receive mode, and a single-ended transmit mode.

Abstract: Described herein are methods and apparatuses for packaging an ultrasound-on-a-chip. An ultrasound-on-a-chip may be coupled to a redistribution layer and to an interposer layer. Encapsulation may encapsulate the ultrasound-on-a-chip device and first metal pillars may extend through the encapsulation and electrically couple to the redistribution layer. Second metal pillars may extend through the interposer layer. The interposer layer may include aluminum nitride. The first metal pillars may be electrically coupled to the second metal pillars. A printed circuit board may be coupled to the interposer layer.

Abstract: System and methods for analyzing single molecules and performing nucleic acid sequencing. An integrated device may include multiple pixels with sample wells configured to receive a sample, which when excited, emits radiation. The integrated device includes a surface having a trench region recessed from a portion of the surface and an array of sample wells, disposed in the trench region. The integrated device also includes a waveguide configured to couple excitation energy to at least one sample well in the array and positioned at a first distance from a surface of the trench region and at a second distance from the surface in a region separate from the trench region. The first distance is smaller than the second distance. The system also includes an instrument that interfaces with the integrated device. The instrument may include an excitation energy source for providing excitation energy to the integrated device by coupling to an excitation energy coupling region of the integrated device.

Abstract: In one embodiment, a device is described. The device includes a material defining a reaction region. The device also includes a plurality of chemically-sensitive field effect transistors have a common floating gate in communication with the reaction region. The device also includes a circuit to obtain respective output signals from the chemically-sensitive field effect transistors indicating an analyte within the reaction region.

Abstract: CMOS Ultrasonic Transducers and processes for making such devices are described. The processes may include forming cavities on a first wafer and bonding the first wafer to a second wafer. The second wafer may be processed to form a membrane for the cavities. Electrical access to the cavities may be provided.

Abstract: Vertical packaging configurations for ultrasound chips are described. Vertical packaging may involve use of integrated interconnects other than wires for wire bonding. Examples of such integrated interconnects include edge-contact vias, through silicon vias and conductive pillars. Edge-contact vias are vias defined in a trench formed in the ultrasound chip. Multiple vias may be provided for each trench, thus increasing the density of vias. Such vias enable electric access to the ultrasound transducers. Through silicon vias are formed through the silicon handle and provide access from the bottom surface of the ultrasound chip. Conductive pillars, including copper pillars, are disposed around the perimeter of an ultrasound chip and provide access to the ultrasound transducers from the top surface of the chip. Use of these types of packaging techniques can enable a substantial reduction in the dimensions of an ultrasound device.

Abstract: Ultrasound devices and methods are described, including a repeatable ultrasound transducer probe having ultrasonic transducers and corresponding circuitry. The repeatable ultrasound transducer probe may be used individually or coupled with other instances of the repeatable ultrasound transducer probe to create a desired ultrasound device. The ultrasound devices may optionally be connected to various types of external devices to provide additional processing and image rendering functionality.

Abstract: An ultrasonic transducer includes a membrane, a bottom electrode, and a plurality of cavities disposed between the membrane and the bottom electrode, each of the plurality of cavities corresponding to an individual transducer cell. Portions of the bottom electrode corresponding to each individual transducer cell are electrically isolated from one another. Each portion of the bottom electrode corresponds to each individual transducer that cell further includes a first bottom electrode portion and a second bottom electrode portion, the first and second bottom electrode portions electrically isolated from one another.

Abstract: Aspects of the technology described herein relate to ultrasound circuits that employ a differential ultrasonic transducer element, such as a differential micromachined ultrasonic transducer (MUT) element. The differential ultrasonic transducer element may be coupled to an integrated circuit that is configured to operate the differential ultrasonic transducer element in one or more modes of operation, such as a differential receive mode, a differential transmit mode, a single-ended receive mode, and a single-ended transmit mode.

Abstract: Circuitry for an ultrasound device is described. The ultrasound device may include a symmetric switch positioned between a pulser and an ultrasound transducer. The pulser may produce bipolar pulses. The symmetric switch may selectively isolate a receiver from the pulser and the ultrasound transducer during a transmit mode of the device, when the bipolar pulses are provided by the pulser to the ultrasound transducer for transmission, and may selectively permit the receiver to receive signals from the ultrasound transducer during a receive mode. The symmetric switch may be provided with a well switch to remove well capacitances in a signal path of the device.

Abstract: An integrated circuit includes a photodetection region configured to receive incident photons. The photodetection region is configured to produce a plurality of charge carriers in response to the incident photons. The integrated circuit includes at least one charge carrier storage region. The integrated circuit also includes a charge carrier segregation structure configured to selectively direct charge carriers of the plurality of charge carriers directly into the at least one charge carrier storage region based upon times at which the charge carriers are produced.

Abstract: Aspects of the technology described herein relate to control circuitry configured to turn on and off the ADC driver. In some embodiments, the control circuitry is configured to turn on and off the ADC driver in synchronization with sampling activity of an ADC, in particular based on when an ADC is sampling. The control circuitry may be configured to turn on the ADC driver during the hold phase of the ADC a time period before the track phase and to turn off the ADC driver during the hold phase a time period after the track phase. In some embodiments, the control circuitry is configured to control a duty cycle of the ADC driver turning on and off. In some embodiments, the control circuitry is configured to control a ratio between an off current and an on current in the ADC driver.

Abstract: An integrated circuit includes a photodetection region configured to receive incident photons. The photodetection region is configured to produce a plurality of charge carriers in response to the incident photons. The integrated circuit also includes at least one charge carrier storage region. The integrated circuit also includes a charge carrier segregation structure configured to selectively direct charge carriers of the plurality of charge carriers into the at least one charge carrier storage region based upon times at which the charge carriers are produced.

Abstract: Described herein are techniques to reduce or remove the impact of secondary path photons and/or charge carriers on storage bins of an integrated device to improve noise performance, and thus, sample analysis. Some embodiments relate to optical rejection techniques such as including an optical barrier positioned to block at least some photons from reaching the storage bins. Some embodiments relate to electrical rejection techniques such as including an electrical barrier configured to block at least some charge carriers from reaching the storage bins along at least one secondary path. Some embodiments relate to an integrated device in which at least one storage bin is shaped and/or positioned relative to the photodetector to facilitate receipt of some charge carriers (e.g., fluorescent emission charge carriers) and/or photons and to impede receipt of other charge carriers (e.g., noise charge carriers) and/or photons.