Patents by Inventor Kishio Yokouchi

Kishio Yokouchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8186053
    Abstract: A circuit board has plated through holes which are laid out with a fine pitch and meets requirements relating to characteristics such as strength and thermal expansion coefficient. A method of manufacturing a circuit board includes: a step of forming a core portion by thermal compression bonding prepregs formed by disposing carbon fibers so as to produce openings at positions where plated through holes will pass through and impregnating the carbon fibers with resin; a step of forming through holes that pass inside the openings at positions of the openings in the core portion; and a step of forming a conductive layer on inner surfaces of the through holes to form plated through holes at positions that do not interfere with the carbon fibers and thereby produce a core substrate.
    Type: Grant
    Filed: November 14, 2008
    Date of Patent: May 29, 2012
    Assignees: Fujitsu Limited, Shinko Electric Industries Co., Ltd.
    Inventors: Kishio Yokouchi, Hideaki Yoshimura, Katsuya Fukase
  • Patent number: 8161636
    Abstract: A circuit board has plated through holes which are laid out with a fine pitch and meets requirements relating to characteristics such as the thermal expansion coefficient of the circuit board. A method of manufacturing a circuit board includes: a step of forming a core portion by thermal compression bonding prepregs which include first fibers that conduct electricity and second fibers that do not conduct electricity, which have the second fibers disposed at positions where plated through holes will pass through, and which are impregnated with resin; a step of forming through holes at positions in the core portion where the second fibers are disposed; and a step of forming a conductive layer on inner surfaces of the through holes to form plated through holes at positions that do not interfere with the first fibers and thereby produce a core substrate.
    Type: Grant
    Filed: November 17, 2008
    Date of Patent: April 24, 2012
    Assignees: Fujitsu Limited, Shinko Electric Industries Co., Ltd.
    Inventors: Kishio Yokouchi, Hideaki Yoshimura, Katsuya Fukase
  • Patent number: 7999193
    Abstract: There is provided a wiring substrate. The wiring substrate includes: a core substrate formed of a conductive material and having a through hole therein; an insulating layer formed on first and second surfaces of the core substrate; wiring patterns formed on the first and second surfaces via the insulating layer; and a via formed in the through hole and electrically connected to the wiring patterns. The via includes: a conductor ball and a conductor portion. The conductor ball has a conductive surface and an insulating member covering the conductive surface. A portion of the conductive surface is exposed from the insulating member. The conductor portion is electrically connected to the exposed conductive surface and the wiring patterns. At least one of the insulating member and the insulating layer is interposed between the via and the core substrate.
    Type: Grant
    Filed: October 8, 2008
    Date of Patent: August 16, 2011
    Assignees: Shinko Electric Industries, Co., Ltd., Fujitsu Limited
    Inventors: Katsuya Fukase, Kishio Yokouchi, Hideaki Yoshimura
  • Publication number: 20100122843
    Abstract: A circuit board has plated through holes which are laid out with a fine pitch and meets requirements relating to characteristics such as strength and thermal expansion coefficient. A method of manufacturing a circuit board includes: a step of forming a core portion by thermal compression bonding prepregs formed by disposing carbon fibers so as to produce openings at positions where plated through holes will pass through and impregnating the carbon fibers with resin; a step of forming through holes that pass inside the openings at positions of the openings in the core portion; and a step of forming a conductive layer on inner surfaces of the through holes to form plated through holes at positions that do not interfere with the carbon fibers and thereby produce a core substrate.
    Type: Application
    Filed: November 14, 2008
    Publication date: May 20, 2010
    Applicants: FUJITSU LIMITED, SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Kishio YOKOUCHI, Hideaki YOSHIMURA, Katsuya FUKASE
  • Publication number: 20100051323
    Abstract: A printed wiring board with an insulating layer formed of an insulating material and a conductive wiring layer formed on a front surface of the insulating layer. The conductive wiring layer has a conductor and a filler. The filler is embedded in the conductor. The filler has a coefficient of thermal expansion smaller than the conductor.
    Type: Application
    Filed: June 19, 2009
    Publication date: March 4, 2010
    Applicant: FUJITSU LIMITED
    Inventor: Kishio Yokouchi
  • Publication number: 20090151985
    Abstract: When package circuit boards are formed by dicing a circuit board sheet with a core substrate that conducts electricity, conductive material is not exposed from the outer side surfaces of the package circuit boards, thereby preventing electrical shorting of the package circuit boards. A method of dicing a circuit board sheet includes: a step of forming a circuit board sheet by forming a core portion that includes a conductive material and providing a wiring layer on the surface of the core portion; a step of forming concave channels in a thickness direction of the circuit board sheet from one surface of the circuit board sheet so as to pass through at least the core portion; a step of forming an insulating cover layer on a surface of the wiring layer and inside the concave channels; and a step of dicing the circuit board sheet within widths of the concave channels with positions of the concave channels as dicing positions.
    Type: Application
    Filed: August 11, 2008
    Publication date: June 18, 2009
    Applicant: FUJITSU LIMITED
    Inventor: Kishio YOKOUCHI
  • Publication number: 20090146112
    Abstract: The composite material, which comprises carbon materials and resin, is capable of giving original characteristics of the carbon materials, e.g., carbon fibers, in case of, for example, being used in a circuit board having a core section including carbon fibers. The composite material of the present invention comprises: the carbon materials, which are composed of graphite or materials having graphite structures; and resin. Surfaces of the carbon materials are modified. The resin and the carbon materials are chemically or physically bonded.
    Type: Application
    Filed: July 31, 2008
    Publication date: June 11, 2009
    Applicant: FUJITSU LIMITED
    Inventor: Kishio YOKOUCHI
  • Publication number: 20090095521
    Abstract: A circuit board has plated through holes which are laid out with a fine pitch and meets requirements relating to characteristics such as the thermal expansion coefficient of the circuit board. A method of manufacturing a circuit board includes: a step of forming a core portion by thermal compression bonding prepregs which include first fibers that conduct electricity and second fibers that do not conduct electricity, which have the second fibers disposed at positions where plated through holes will pass through, and which are impregnated with resin; a step of forming through holes at positions in the core portion where the second fibers are disposed; and a step of forming a conductive layer on inner surfaces of the through holes to form plated through holes at positions that do not interfere with the first fibers and thereby produce a core substrate.
    Type: Application
    Filed: November 17, 2008
    Publication date: April 16, 2009
    Applicants: FUJITSU LIMITED, SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Kishio YOKOUCHI, Hideaki YOSHIMURA, Katsuya FUKASE
  • Publication number: 20090095520
    Abstract: There is provided a wiring substrate. The wiring substrate includes: a core substrate formed of a conductive material and having a through hole therein; an insulating layer formed on first and second surfaces of the core substrate; wiring patterns formed on the first and second surfaces via the insulating layer; and a via formed in the through hole and electrically connected to the wiring patterns. The via includes: a conductor ball and a conductor portion. The conductor ball has a conductive surface and an insulating member covering the conductive surface. A portion of the conductive surface is exposed from the insulating member. The conductor portion is electrically connected to the exposed conductive surface and the wiring patterns. At least one of the insulating member and the insulating layer is interposed between the via and the core substrate.
    Type: Application
    Filed: October 8, 2008
    Publication date: April 16, 2009
    Applicants: SHINKO ELECTRIC INDUSTRIES CO., LTD., FUJITSU LIMITED
    Inventors: Katsuya Fukase, Kishio Yokouchi, Hideaki Yoshimura
  • Patent number: 7504014
    Abstract: The present invention generally relates to circuits on the nanotechnology scale. Specifically, it is directed to methods of fabricating carbon nanotube-based (i.e., CNT-based) circuits. The method involves providing a mixture of carbon nanotubes that is substantially disaggregated and patterning carbon nanotubes through the use of electrostatic forces. Carbon nanotubes in the mixture are typically disaggregated through the introduction of positive charge on the individual nanotubes. The patterning of the carbon nanotubes is typically accomplished using electrostatic attraction between pre-formed metal lines and the charged carbon nanotubes.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: March 17, 2009
    Assignee: Fujitsu Limited
    Inventors: Michael G. Lee, Kishio Yokouchi
  • Patent number: 7489842
    Abstract: Optical couplers having attachment features are disclosed. A typical coupler according to the present invention couples an optical signal from an optical fiber to a channel waveguide by overlapping the cores of the optical fiber and channel waveguide along a portion of their waveguide lengths, with a spacing distance between the cores of not more than 20 microns for single-mode light coupling, and not more than 100 microns for multi-mode light coupling. This is in contrast to a prior art coupler, which seeks to position the ends of the two cores in a facing relationship. In embodiments according to the present invention, attachment films may be disposed in the overlapping regions to provide advantageous coupling arrangements and new types of opto-electric devices.
    Type: Grant
    Filed: August 10, 2007
    Date of Patent: February 10, 2009
    Assignee: Fujitsu Limited
    Inventor: Kishio Yokouchi
  • Patent number: 7453058
    Abstract: The present invention is directed to an apparatus and related methods related to an optical bump for optically coupling devices. An exemplary apparatus includes a first device, a second device, and at least one optical bump. The first device has a first surface including at least one first optically active area. The second device has a second surface including at least one second optically active area positioned in an opposed and spaced-apart relationship with respect to the at least one first optically active area. The first surface is separated from the second surface by a distance. The at least one optical bump is coupled to the first surface between the at least one first optically active area and the at least one second optically active area. The at least one optical bump has a height that is less than the distance between the first surface and the second surface.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: November 18, 2008
    Assignee: Fujitsu Limited
    Inventors: Michael G. Lee, Kishio Yokouchi
  • Patent number: 7418165
    Abstract: A flexible optical connector suitable for use in an optical backplane for interconnecting optical circuit boards, and methods of making the optical connector, are disclosed. The flexible optical connector comprises a plurality of waveguides on two or more levels providing a plurality of light paths that allow light communication between optical circuit boards. The optical connector can be manufactured separately from the backplane and thereafter mounted on the backplane. The backplane of the present invention may also have a mounting structure for removably retaining and positioning optical circuit board and may, optionally, include electrical traces for providing electrical interconnections between the circuit boards.
    Type: Grant
    Filed: November 15, 2005
    Date of Patent: August 26, 2008
    Assignee: Fujitsu Limited
    Inventors: Alexei Glebov, Kishio Yokouchi
  • Patent number: 7376295
    Abstract: Disclosed are reconfigurable optical interconnections for opto-electronic processors in general, and for scalable computer architectures and scalable network servers in particular. The optical-signal interconnects are adaptable, or reconfigurable, during the normal operation of the processor. A large number of optical-signal interconnects may be provided among the components of the processor while using a small number of light transmitters and/or light receivers.
    Type: Grant
    Filed: September 20, 2004
    Date of Patent: May 20, 2008
    Assignee: Fujitsu Limited
    Inventors: Michael G. Lee, Kishio Yokouchi
  • Patent number: 7329481
    Abstract: Substrate optical waveguides having curved major surfaces and methods for making the same are disclosed. In one exemplary embodiment, a photosensitive cladding layer is pattern exposed to actinic radiation through a first gray-scale mask and subsequently developed to define a groove therein having a curved major bottom surface. A layer of photosensitive core material is thereafter formed over the groove, pattern exposed to actinic radiation through a second gray-scale mask, and subsequently developed to define a core element. The core element is disposed within the groove and has a curved major bottom surface and a curved major top surface.
    Type: Grant
    Filed: January 23, 2004
    Date of Patent: February 12, 2008
    Assignee: Fujitsu Limited
    Inventor: Kishio Yokouchi
  • Publication number: 20070274638
    Abstract: Optical couplers having attachment features are disclosed. A typical coupler according to the present invention couples an optical signal from an optical fiber to a channel waveguide by overlapping the cores of the optical fiber and channel waveguide along a portion of their waveguide lengths, with a spacing distance between the cores of not more than 20 microns for single-mode light coupling, and not more than 100 microns for multi-mode light coupling. This is in contrast to a prior art coupler, which seeks to position the ends of the two cores in a facing relationship. In embodiments according to the present invention, attachment films may be disposed in the overlapping regions to provide advantageous coupling arrangements and new types of opto-electric devices.
    Type: Application
    Filed: August 10, 2007
    Publication date: November 29, 2007
    Applicant: Fujitsu Limited
    Inventor: Kishio Yokouchi
  • Patent number: 7283220
    Abstract: Methods and apparatuses for measuring the optical properties of solids, gels, and liquids are disclosed. The apparatuses may be constructed on miniature substrates using conventional semiconductor wafer and packaging processes. The substrates may be mass-produced on wafers, which are then diced to provide individual miniature substrates. High measurement precision, low-manufacturing costs, and other benefits are provided by the present inventions.
    Type: Grant
    Filed: March 24, 2004
    Date of Patent: October 16, 2007
    Assignee: Fujitsu Limited
    Inventors: Lidu Huang, Alexei Glebov, Shigenori Aoki, Michael G. Lee, Kishio Yokouchi
  • Patent number: 7277611
    Abstract: The present invention provides an optical interconnection platform, comprising a substrate, a plurality of integrated circuits attached to a surface of the substrate wherein each integrated circuit having an array of transmitters and an array of receivers, an optical integrated circuit module attached to an opposing surface of the substrate wherein the optical integrated circuit module comprising a highly transparent photosensitive material having an input microlens that collimate the light beams before entering the optical integrated circuit module and an output microlens that focuses the light beams into the array of receivers, and input and output Bragg diffractive gratings that are formed inside of the optical integrated circuit module.
    Type: Grant
    Filed: August 30, 2006
    Date of Patent: October 2, 2007
    Assignee: Fujitsu, Limited
    Inventors: Alexei Glebov, Kishio Yokouchi, Leonid Glebov, Vadim Smirnov
  • Patent number: 7257295
    Abstract: Optical couplers having attachment features are disclosed. A typical coupler according to the present invention couples an optical signal from an optical fiber to a channel waveguide by overlapping the cores of the optical fiber and channel waveguide along a portion of their waveguide lengths, with a spacing distance between the cores of not more than 20 microns for single-mode light coupling, and not more than 100 microns for multi-mode light coupling. This is in contrast to a prior art coupler, which seeks to position the ends of the two cores in a facing relationship. In embodiments according to the present invention, attachment films may be disposed in the overlapping regions to provide advantageous coupling arrangements and new types of opto-electric devices.
    Type: Grant
    Filed: September 20, 2004
    Date of Patent: August 14, 2007
    Assignee: Fujitsu Limited
    Inventor: Kishio Yokouchi
  • Patent number: 7229219
    Abstract: Disclosed are apparatuses and methods for fast and reliable integration of opto-electric components onto optical routing substrates. Accurate alignment of optical signals to and from the opto-electric components, and short electrical interconnect paths to the components to reduce signal delays to the devices on the components are enabled. In an exemplary embodiment, an attachment area is set out on the optical routing substrate to receive each component. One or more optical waveguides for coupling optical signals with the component are located adjacent to the attachment area. A plurality of conductive pads are located within the attachment area, and are for interconnecting to the component by way of bodies of solder, conductive adhesive, or the like. Interspersed between the conductive pads are a plurality of spacers that set a spacing distance between the attachment area and the opposing surface of the component, resulting in accurate alignment of optical signals.
    Type: Grant
    Filed: September 17, 2004
    Date of Patent: June 12, 2007
    Assignee: Fujitsu Limited
    Inventors: Michael G. Lee, Kishio Yokouchi