Abstract: A line beam is irradiated such that edge lines of the beam extend in a direction at an angle of 45° with respect to the vertical direction or the horizontal direction. As a result, a laser defective crystallization region R′ where the grain size has not become sufficiently large due to unevenness in intensity of the line beam passes at 45° across the carrier path connecting source and drain regions S and D to each other. The defective crystallization region R′ thus does not completely divide between the contact region CT, i.e., the carrier path between the source and drain regions. Therefore, a carrier path CP can be securely maintained without passing through the defective crystallization region R′, so that the ON-current is prevented from being reduced. Deterioration or unevenness in transistor characteristics caused by unevenness in intensity of laser irradiation can thus be prevented.

Abstract: Reflectance of a p-Si film crystallized by laser annealing is measured, a wave length dependency of the reflectance is found, and a first order rate of change is calculated to determine a minimum value near a wave length of 500 nm. The value is to be an inherent optical value under the laser power and relates to a grain size measured by Secco etching or the like. A number of correspondence between the optical value and the grain size are recorded and linearly plotted. By calculating the optical value from the reflectance in the p-Si film at in-line, the grain size is correspondingly determined. Thus, the semiconductor film can be in-line monitored, thereby improving a yield and saving a cost in producing a semiconductor device.

Abstract: In a bottom gate-type thin-film transistor manufacturing method, after ion doping, an ion stopper (55) is removed. The ion stopper (55) does not remain in the interlayer insulating film (8) lying immediately above the gate electrode. The thin-film transistor has such a structure that no ion stopper (55), and the interlayer insulating layer is in direct contact with at least the channel region of the semiconductor layer (4). The impurity concentration in the vicinity of the interface between the interlayer insulating film and the semiconductor layer 4 is 1018 atoms/cc or less. This structure can prevent the back channel phenomenon and reduce variations in characteristic resulting from variations in manufacturing.

Abstract: Upon formation of a layer such as an emissive layer of an organic EL element by attaching an emissive material onto a substrate (10), an evaporation mask (100) including an opening (110) corresponding to the layer formed to have a plurality of individual patterns and having an area, for example, smaller than the substrate is disposed between the substrate (10) and a material source (200). A relative position between the mask (100) and the material source (200), and the substrate (10) is slid by a predetermined pitch corresponding to the size of a pixel of the substrate (10), thereby forming a material layer (such as the emissive layer 64) in a predetermined region of the substrate. As a result, the material layer can be formed on the substrate through, for example, evaporation with a high accuracy.

Abstract: In a fabrication process of a semiconductor device for use in a TFT liquid crystal display system, before the start of crystallizing amorphous silicon (a-Si), dehydrogenation annealing is carried out to not only decrease the density of hydrogen in the p-Si film (13) to 5×1020 atoms/cm3 at most but also to prevent crystallization of the a-Si film (13) being obstructed due to possible excessive hydrogen remaining in the film. With the p-Si film (13) covered with an interlayer insulation film (15) in the form of a plasma nitride film, annealing is then carried out in nitrogen atmosphere at a temperature of 350° C. to 400° C. for one to three hours, more preferably 400° C. for two hours. The result is that hydrogen atoms in the p-Si film (13) efficiently terminate dangling bonds of the film and hence do not become excessive, thus improving the electrical characteristics of the semiconductor device.

Abstract: On a substrate, there is disposed a gate electrode having a section of a trapezoidal configuration expanded toward the substrate. The gate electrode is covered with a silicon nitride film having a thickness T1 of 400 Å, and a silicon oxide film having a thickness T2 of 1200 Åis formed on the silicon nitride film. A polycrystalline silicon film constructing an active region is formed on a gate insulating film constituted of the silicon nitride film and the silicon oxide film. By forming the silicon oxide film in a sufficient thickness of 1200 Åor more, and further forming the silicon nitride film 23 of 400 Åor more, a thin-film transistor cannot easily be influenced by a stepped portion formed by the Ls gate electrode, and withstanding voltage of the gate insulating film of the thin-film transistor can be enhanced.

Abstract: A color display apparatus comprises a substrate; thin film transistors formed on the substrate, each of the thin film transistors having a source electrode and a drain electrode; electroluminescence elements respectively formed over the thin film transistors and driven by the thin film transistors, each of the electroluminescence elements having a cathode connected to a source electrode or drain electrode of a thin film transistor, a luminous element layer, and an anode electrode sequentially disposed thereover. A color filter or fluorescent color conversion layer acting as a color element is formed on the side of the anode electrode of an electroluminescence element. The same luminous layer material is used for each display pixel to display a color image.

Abstract: In the display device having the retaining circuit for holding the digital image data at the pixel element, the power voltage supplied to the retaining circuit 110 is set up to be at the minimum level for the retaining circuit to hold the data during the data writing period, but the voltage supplied to the retaining circuit is raised by the voltage booster 95 upon the completion of the data writing. The retaining circuit 110 takes in the digital image signal fed from the drain signal line 61 in response to the signal fed from the gate signal line 51 and holds the digital image signal. Then, the display is carried out according to the signal held by the retaining circuit 110. By this, the erroneous writing of the data to the retaining circuit is prevented. The reduction of the electric power consumption and the high density integration of the pixel elements are also possible.

Abstract: A color display apparatus comprises a substrate; thin film transistors formed on the substrate, each of the thin film transistors having a source electrode and a drain electrode; electroluminescence elements respectively formed over the thin film transistors and driven by the thin film transistors, each of the electroluminescence elements having a cathode connected to a source electrode or drain electrode of a thin film transistor, a luminous element layer, and an anode electrode sequentially disposed thereover. A color filter or fluorescent color conversion layer acting as a color element is formed on the side of the anode electrode of an electroluminescence element. The same luminous layer material is used for each display pixel to display a color image.

Abstract: The display device of this invention, in which the retaining circuit for retaining the image signal is provided for each of the pixel elements, is capable of operating under two operation modes, a normal operation mode and a memory mode. Since the placement of the retaining circuit 110, which requires relatively large area, is confined to the area for the pixel element electrode 17 not in between the neighboring pixel element electrodes 17, the required area for one pixel element is minimized, resulting in the size reduction of the liquid crystal display device. By placing at least a portion of the retaining circuit in the area of the pixel element electrode 17 of the neighboring pixel element, the detour of the wiring can be omitted, resulting in the efficient use of the space. By this, the area required for the retaining circuit is minimized, directly resulting in the reduction of the size of the liquid crystal display device.

Abstract: A pixel electrode for driving liquid crystal is formed on a planarization insulator film covering a thin film transistor, and a vertical alignment film without rubbing treatment is formed on the pixel electrode. An alignment control window that has electrode-free portion is formed in a common electrode, and a vertical alignment film is formed on the common electrode without rubbing treatment. The liquid crystal having negative dielectric constant anisotropy is controlled in an initial direction of the substantially normal direction without pretilt. Upon applying a voltage, the tilt of the alignment is controlled in the direction of a slanting electric field at the edge of the pixel electrode and the edge of the alignment control window, so that pixel division is performed. Since rubbing treatment is not performed, electrostatic breakdown of the thin film transistor is prevented and, because a black matrix is eliminated, aperture ratio is improved.

Abstract: A vertically aligned type liquid crystal display includes a liquid crystal layer disposed between a plurality of pixel electrodes and a common electrode and containing vertically aligned liquid crystal molecules, the orientation of the liquid crystal molecules being controlled by electric field. An orientation control window is formed in the common electrode. A distance Wp between adjacent pixel electrodes and/or a width Ws of the orientation control window is selected so as to satisfy Wp≧d/2 and/or Ws≧d/2, where d is a distance (or a cell gap) between the pixel electrodes and the common electrode. Viewing angle is widened and a viewing angle characteristic is improved, and abnormal orientation or grittiness of an image is eliminated.

Abstract: An a-Si film (12) formed on an insulating substrate (10) is irradiated with a laser so that the a-Si film (12) is fused and recrystallized to form a p-Si film (13). Projections (100) generated on the p-Si film (13) at this stage are eliminated by irradiation of ion beams at the incident angle of 60° to 90° using an ion milling method to planarize the surface of the p-Si film (13), thereby creating sufficient insulation between the p-Si film (13) and gate electrodes (15).

Abstract: A line beam is irradiated such that edge lines of the beam extend in a direction at an angle of 45° with respect to the vertical direction or the horizontal direction. As a result, a laser defective crystallization region R′ where the grain size has not become sufficiently large due to unevenness in intensity of the line beam passes at 45° across the carrier path connecting source and drain regions S and D to each other. The defective crystallization region R′ thus does not completely divide between the contact region CT, i.e., the carrier path between the source and drain regions. Therefore, a carrier path CP can be securely maintained without passing through the defective crystallization region R′, so that the ON-current is prevented from being reduced. Deterioration or unevenness in transistor characteristics caused by unevenness in intensity of laser irradiation can thus be prevented.

Abstract: In a driver built-in type p-Si TFT LCD, a channel width direction of a sampling TFT (6) constituting a part of a driver and having a large channel width is formed in a direction non-parallel with sides of a substrate or sides of pulse laser beams radiated for poly-crystallization of a-Si. For example, the channel width direction of the sampling TFT (6) is formed to have an angle of 45° relative to the substrate sides. Therefore, even when a dispersion in energy intensity is generated in an irradiated plane of pulse laser beams radiated to a-Si in a poly-crystallization process and a defective crystallized region [R] is formed on a p-Si film (13) in a direction corresponding to the dispersion, the defective crystallized region [R] extends across a part of each TFT (6). Formation of only a specified TFT (6) in the defective crystallized region [R] and occurrence of a difference in characteristics between the specified TFT and another TFT (6) are prevented.

Abstract: A display apparatus includes display pixels each having a thin film transistor and an EL element formed successively forming over a substrate. The EL element has a cathode electrode connected to the source of the thin film transistor and an anode electrode, and is driven by the thin film transistor. The EL element externally emits light from the reverse side of the substrate. For example, when the cathode electrode is formed the comblike, meshlike, or gridlike pattern on the luminous layer, the light is emitted through the slits of the cathode pattern. The display apparatus is provided that can improve the aperture ratio of a display pixel and can increase the degree of freedom in deciding the size and the drive capability of a TFT element which drives an EL element.

Abstract: A color display apparatus comprises a substrate; thin film transistors formed on the substrate, each of the thin film transistors having a source electrode and a drain electrode; electroluminescence elements respectively formed over the thin film transistors and driven by the thin film transistors, each of the electroluminescence elements having a cathode connected to a source electrode or drain electrode of a thin film transistor, a luminous element layer, and an anode electrode sequentially disposed thereover. A color filter or fluorescent color conversion layer acting as a color element is formed on the side of the anode electrode of an electroluminescence element. The same luminous layer material is used for each display pixel to display a color image.

Abstract: On a TFT substrate, a TFT using a low-temperature poly silicon thin film as an active layer is formed and a plurality of pixel electrodes are formed over the TFT and its electrode wiring, with an interlayer insulating layer between. In a common electrode formed on an opposite substrate opposite the TFT substrate with a liquid crystal layer between, an alignment controlling window for the liquid crystal is formed at a predetermined position opposite each of the pixel electrodes. A wide viewing angle is achieved by dividing an alignment area of liquid crystal molecules in one pixel area. The liquid crystal layer is vertically aligned and can be operated at a low driving voltage obtained by a poly silicon TFT by including fluorine liquid crystal molecules having negative dielectric anisotropy and fluorine side chains in the liquid crystal.

Abstract: A method of fabricating a thin film transistor by setting the temperature of a heat treatment for crystallizing an active layer which is formed on a substrate at a level not deforming the substrate and activating an impurity layer in a heat treatment method different from that employed for the heat treatment, and a semiconductor device prepared by forming a heat absorption film, a semiconductor film, a gate insulating film, and a gate electrode on a substrate, the heat absorption film being provided within a region substantially corresponding to the semiconductor film.

Abstract: A single crystal or polycrystalline silicon substrate (100) is formed as a semiconductor substrate. Using a resist (103), an SiO2 film (101) is formed as a first coating on at least part of the outer periphery of the substrate (100). While using this SiO2 film (101) as a mask, the substrate (100) is etched from the first surface side using KOH or the like. The thickness of the substrate is thus decreased to thereby form an opening forming region M, whereas a region of the substrate covered with the first coating is not etched to thereby form a thick portion 140. Then, on a second surface of the substrate (100), a second coating is formed by applying a resist (104) at a region of the substrate other than where opening are to be formed in the region M. The substrate is then etched using the second coating as a mask to form holes, as openings (110), at regions not covered by the second coating.