Patents by Inventor Kohei Oikawa
Kohei Oikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240094940Abstract: A memory system includes a non-volatile memory and a controller. The controller is configured to perform a write operation of a first data cluster and a first partial overwrite operation of the first data cluster with first overwrite data. The write operation includes compressing and then encrypting the first data cluster, and writing the compressed and encrypted first data cluster into a first physical location of the non-volatile memory. The first partial overwrite operation includes encrypting the first overwrite data without performing compression, reading the compressed and encrypted first data cluster from the first physical location of the non-volatile memory, generating a first composite data cluster with the compressed and encrypted first data cluster read from the first physical location and the encrypted first overwrite data that is not compressed, and writing the first composite data cluster into a second physical location of the non-volatile memory.Type: ApplicationFiled: September 1, 2023Publication date: March 21, 2024Inventors: Kensaku YAMAGUCHI, Kiyotaka IWASAKI, Takashi TAKEMOTO, Kohei OIKAWA
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Patent number: 11899934Abstract: A compression device includes an analyzer circuit, a control circuit, a compressor circuit, and a selector circuit. The analyzer circuit is configured to analyze first data that is input thereto and generate one or more parameter values regarding data compression and/or decompression. The control circuit is configured to generate at least one compression mode information indicating whether or not compression is to be performed, based on the one or more parameter values. The compressor circuit is configured to compress the first data into second data according to the compression mode information. The selector circuit is configured to output the first data if not compressed or the second data if the first data is compressed, together with the compression mode information.Type: GrantFiled: March 3, 2022Date of Patent: February 13, 2024Assignee: Kioxia CorporationInventors: Youhei Fukazawa, Sho Kodama, Keiri Nakanishi, Kohei Oikawa, Takashi Miura, Daisuke Yashima, Masato Sumiyoshi, Zheye Wang
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Publication number: 20240031588Abstract: According to one embodiment, a memory system includes a frequency value update unit, a first intra-group rearranging unit, a second intra-group rearranging unit, and a routing unit. The frequency value update unit adds a first value to each of one or more first frequency values that are associated with one or more first symbols, respectively, in one or more entries in a table. The first intra-group rearranging unit rearranges first entries, which belong to a first group, using frequency values in the first entries. The second intra-group rearranging unit rearranges second entries, which belong to a second group lower than the first group, using frequency values. The routing unit rearranges at least one of the first entries and at least one of the second entries.Type: ApplicationFiled: October 2, 2023Publication date: January 25, 2024Applicant: KIOXIA CORPORATIONInventors: Daisuke YASHIMA, Masato SUMIYOSHI, Keiri NAKANISHI, Takashi MIURA, Kohei OIKAWA, Sho KODAMA, Youhei FUKAZAWA, Zheye WANG
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Patent number: 11868615Abstract: According to one embodiment, a compression device includes a first storage unit, a second storage unit, a calculation unit, and a comparison unit. The first storage unit stores addresses associated with hash values, respectively. The second storage unit includes storage areas specified by the addresses, respectively. The calculation unit determines a hash function to be used for first data in accordance with at least a part of the first data, and calculates a hash value using the hash function and at least a part of second data included in the first data. The comparison unit acquires third data from a storage area in the second storage unit specified by a first address, and compares the second data with the third data. The first address is stored in the first storage unit and is associated with the hash value.Type: GrantFiled: September 9, 2021Date of Patent: January 9, 2024Assignee: Kioxia CorporationInventors: Youhei Fukazawa, Kohei Oikawa, Sho Kodama, Keiri Nakanishi, Takashi Miura, Daisuke Yashima, Masato Sumiyoshi, Zheye Wang
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Publication number: 20240004549Abstract: A memory system includes a non-volatile memory, a buffer memory, and a controller configured to write data to the non-volatile memory in write units of a predefined size, each write unit including a plurality of data items and log data and to temporarily store the data items and the log data of each write unit in the buffer memory prior to writing the write unit to the non-volatile memory. In response to a write command, the controller calculates a total data size of the data items of the write unit and write data specified in the write command, and a total log size of the log data and log information associated with the write data, and in response to determining that the total data size or the total log size is greater than their respective thresholds, write the write unit stored in the buffer memory to the non-volatile memory.Type: ApplicationFiled: March 3, 2023Publication date: January 4, 2024Inventor: Kohei OIKAWA
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Patent number: 11824566Abstract: According to one embodiment, a data decompression device includes: a detection circuit configured to detect a boundary between a header and a payload in a compressed stream, based on boundary information in the header; a separation circuit configured to separate the header and the payload; a first decompression circuit configured to decompress a compressed coding table in the header; and a second decompression circuit configured to decompress the payload, based on an output of the first decompression circuit.Type: GrantFiled: March 16, 2022Date of Patent: November 21, 2023Assignee: Kioxia CorporationInventors: Zheye Wang, Keiri Nakanishi, Kohei Oikawa, Masato Sumiyoshi, Sho Kodama, Youhei Fukazawa, Daisuke Yashima, Takashi Miura
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Patent number: 11818376Abstract: According to one embodiment, a memory system includes a frequency value update unit, a first intra-group rearranging unit, a second intra-group rearranging unit, and a routing unit. The frequency value update unit adds a first value to each of one or more first frequency values that are associated with one or more first symbols, respectively, in one or more entries in a table. The first intra-group rearranging unit rearranges first entries, which belong to a first group, using frequency values in the first entries. The second intra-group rearranging unit rearranges second entries, which belong to a second group lower than the first group, using frequency values. The routing unit rearranges at least one of the first entries and at least one of the second entries.Type: GrantFiled: July 19, 2022Date of Patent: November 14, 2023Assignee: Kioxia CorporationInventors: Daisuke Yashima, Masato Sumiyoshi, Keiri Nakanishi, Takashi Miura, Kohei Oikawa, Sho Kodama, Youhei Fukazawa, Zheye Wang
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Patent number: 11777518Abstract: According to one embodiment, a data compression device includes a dictionary match determination unit, an extended matching generator, a match selector and a match connector. The dictionary match determination unit searches for first past input data matching first new input data. The extended matching generator compares second past input data subsequent to the first past input data with second new input data subsequent to the first new input data. The match selector generates compressed data by replacing a part of the input data with match information output from the dictionary match determination unit or the extended matching generator. The match connector replaces a plurality of match information in the compressed data with single match information.Type: GrantFiled: March 4, 2022Date of Patent: October 3, 2023Assignee: Kioxia CorporationInventors: Daisuke Yashima, Youhei Fukazawa, Sho Kodama, Keiri Nakanishi, Masato Sumiyoshi, Kohei Oikawa, Zheye Wang, Takashi Miura
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Publication number: 20230289293Abstract: According to one embodiment, a dictionary buffer stores dictionary data including a first substring and data before the first substring. A substring generator generates, from second input data, second substrings. A transformer transforms each of the second substrings into a hash value. A read processor reads the dictionary data, using a hash value transformed from a third substring among the second substrings. An acquisition unit compares a data string including the third substring and data before the third substring with the read dictionary data, and acquire first and second match lengths of the third and fourth substrings. A coded data generator generates coded data based on the acquired first and second match lengths.Type: ApplicationFiled: September 8, 2022Publication date: September 14, 2023Inventors: Daisuke Yashima, Sho Kodama, Keiri Nakanishi, Masato Sumiyoshi, Youhei Fukazawa,, Zheye Wang, Kohei Oikawa, Takashi Miura
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Patent number: 11742876Abstract: According to one embodiment, an interleaving unit divides a symbol string into first and second symbols. A first coding unit converts the first symbols to first codewords. A first packet generating unit generates first packets including the first codewords. A first request generating unit generates first packet requests including sizes of variable length packets. A second coding unit converts the second symbols to second codewords. A second packet generating unit generates second packets including the second codewords. A second request generating unit generates second packet requests including sizes of variable length packets. A multiplexer outputs a compressed stream including the first and second variable length packets cut out from the first and second packets.Type: GrantFiled: March 7, 2022Date of Patent: August 29, 2023Assignee: Kioxia CorporationInventors: Masato Sumiyoshi, Keiri Nakanishi, Kohei Oikawa, Sho Kodama
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Patent number: 11714552Abstract: According to one embodiment, a memory system includes a compressor configured to output second data obtained by compressing input first data and a non-volatile memory to which third data based on the second data output from the compressor is written. The compressor includes a dictionary coding unit configured to perform dictionary coding on the first data, an entropy coding unit configured to perform entropy coding on the result of the dictionary coding, a first calculation unit configured to calculate compression efficiencies of the dictionary coding and the entropy coding, and a first control unit configured to control an operation of at least one of the dictionary coding unit and the entropy coding unit based on the compression efficiencies and a power reduction level.Type: GrantFiled: June 14, 2021Date of Patent: August 1, 2023Assignee: Kioxia CorporationInventors: Sho Kodama, Keiri Nakanishi, Masato Sumiyoshi, Zheye Wang, Kohei Oikawa, Youhei Fukazawa, Daisuke Yashima, Takashi Miura
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Patent number: 11651833Abstract: A memory system includes a non-volatile memory and a controller. The controller is configured to, during a writing operation, generate a first error-detecting code from data that is input, perform a predetermined conversion on the data into first conversion data, generate a second error-detecting code from the first conversion data, and store the data, the first error-detecting code, and the second-error detecting code in the non-volatile memory. The controller is configured to during a read operation, read the data, the first error-detecting code, and the second error-detecting code from the non-volatile memory, perform a first error detection on the data using the first error-detecting code, perform the predetermined conversion on the data into second conversion data, perform a second error detection on the second conversion data using the second error-detecting code, and output the second conversion data based on results of the first and second error detections.Type: GrantFiled: February 24, 2022Date of Patent: May 16, 2023Assignee: Kioxia CorporationInventors: Kohei Oikawa, Keiri Nakanishi, Sho Kodama, Masato Sumiyoshi, Daisuke Yashima, Youhei Fukazawa, Zheye Wang, Takashi Miura
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Publication number: 20230087517Abstract: A memory system includes a non-volatile memory and a controller. The controller is configured to, during a writing operation, generate a first error-detecting code from data that is input, perform a predetermined conversion on the data into first conversion data, generate a second error-detecting code from the first conversion data, and store the data, the first error-detecting code, and the second-error detecting code in the non-volatile memory. The controller is configured to during a read operation, read the data, the first error-detecting code, and the second error-detecting code from the non-volatile memory, perform a first error detection on the data using the first error-detecting code, perform the predetermined conversion on the data into second conversion data, perform a second error detection on the second conversion data using the second error-detecting code, and output the second conversion data based on results of the first and second error detections.Type: ApplicationFiled: February 24, 2022Publication date: March 23, 2023Inventors: Kohei OIKAWA, Keiri NAKANISHI, Sho KODAMA, Masato SUMIYOSHI, Daisuke YASHIMA, Youhei FUKAZAWA, Zheye WANG, Takashi MIURA
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Publication number: 20230086658Abstract: According to one embodiment, a data decompression device includes: a detection circuit configured to detect a boundary between a header and a payload in a compressed stream, based on boundary information in the header; a separation circuit configured to separate the header and the payload; a first decompression circuit configured to decompress a compressed coding table in the header; and a second decompression circuit configured to decompress the payload, based on an output of the first decompression circuit.Type: ApplicationFiled: March 16, 2022Publication date: March 23, 2023Applicant: Kioxia CorporationInventors: Zheye Wang, Keiri Nakanishi, Kohei Oikawa, Masato Sumiyoshi, Sho Kodama, Youhei Fukazawa, Daisuke Yashima, Takashi Miura
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Patent number: 11609844Abstract: A memory system includes a first memory that is nonvolatile, a second memory that is volatile, and a memory controller. The memory controller is configured to store first information in the second memory. The first information includes management information. The memory controller is further configured to compress the first information. The compressed first information is second information. The memory controller is configured to store the second information in the first memory.Type: GrantFiled: March 2, 2020Date of Patent: March 21, 2023Assignee: KIOXIA CORPORATIONInventors: Keiri Nakanishi, Konosuke Watanabe, Kohei Oikawa, Daisuke Iwai
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Publication number: 20230070623Abstract: According to one embodiment, a data compression device includes a dictionary match determination unit, an extended matching generator, a match selector and a match connector. The dictionary match determination unit searches for first past input data matching first new input data. The extended matching generator compares second past input data subsequent to the first past input data with second new input data subsequent to the first new input data. The match selector generates compressed data by replacing a part of the input data with match information output from the dictionary match determination unit or the extended matching generator. The match connector replaces a plurality of match information in the compressed data with single match information.Type: ApplicationFiled: March 4, 2022Publication date: March 9, 2023Applicant: Kioxia CorporationInventors: Daisuke YASHIMA, Youhei FUKAZAWA, Sho KODAMA, Keiri NAKANISHI, Masato SUMIYOSHI, Kohei OIKAWA, Zheye WANG, Takashi MIURA
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Patent number: 11588498Abstract: According to one embodiment, a buffer stores first hash values and first complementary data. A first conversion unit converts consecutive characters in a second character string into second hash values and second complementary data. A search unit searches for consecutive first hash values from the buffer, and output a pointer. A selection unit selects consecutive first hash values and pieces of first complementary data from the buffer. A second conversion unit converts the consecutive first hash values into a third character string using the pieces of first complementary data. A comparison unit compares the second character string with the third character string to acquire a matching length. An output unit output the matching length with the pointer.Type: GrantFiled: September 10, 2021Date of Patent: February 21, 2023Assignee: Kioxia CorporationInventors: Daisuke Yashima, Kohei Oikawa, Sho Kodama, Keiri Nakanishi, Masato Sumiyoshi, Youhei Fukazawa, Zheye Wang, Takashi Miura
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Patent number: 11561738Abstract: A memory system includes a storage device and a memory controller. The memory controller includes an encoder and a decoder. The encoder includes a first code table updating section configured to update the encoding code table and an encoding flow controlling section configured to control input to the first code table updating section by using a first data amount indicating a data amount of the input symbol. The first data amount is calculated based on the input symbol. The decoder includes a second code table updating section configured to update the decoding code table and a decoding flow controlling section configured to control input to the second code table updating section by using a second data amount indicating a data amount of the output symbol. The second data amount is calculated based on the output symbol in the same way as the calculation of the first data amount.Type: GrantFiled: March 4, 2021Date of Patent: January 24, 2023Assignee: Kioxia CorporationInventors: Masato Sumiyoshi, Keiri Nakanishi, Sho Kodama, Kohei Oikawa
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Publication number: 20230006689Abstract: According to one embodiment, an interleaving unit divides a symbol string into first and second symbols. A first coding unit converts the first symbols to first codewords. A first packet generating unit generates first packets including the first codewords. A first request generating unit generates first packet requests including sizes of variable length packets. A second coding unit converts the second symbols to second codewords. A second packet generating unit generates second packets including the second codewords. A second request generating unit generates second packet requests including sizes of variable length packets. A multiplexer outputs a compressed stream including the first and second variable length packets cut out from the first and second packets.Type: ApplicationFiled: March 7, 2022Publication date: January 5, 2023Inventors: Masato SUMIYOSHI, Keiri NAKANISHI, Kohei OIKAWA, Sho KODAMA
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Publication number: 20220398019Abstract: A compression device includes an analyzer circuit, a control circuit, a compressor circuit, and a selector circuit. The analyzer circuit is configured to analyze first data that is input thereto and generate one or more parameter values regarding data compression and/or decompression. The control circuit is configured to generate at least one compression mode information indicating whether or not compression is to be performed, based on the one or more parameter values. The compressor circuit is configured to compress the first data into second data according to the compression mode information. The selector circuit is configured to output the first data if not compressed or the second data if the first data is compressed, together with the compression mode information.Type: ApplicationFiled: March 3, 2022Publication date: December 15, 2022Inventors: Youhei FUKAZAWA, Sho KODAMA, Keiri NAKANISHI, Kohei OIKAWA, Takashi MIURA, Daisuke YASHIMA, Masato SUMIYOSHI, Zheye WANG