Patents by Inventor Koji Yamakawa

Koji Yamakawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7728368
    Abstract: According to an aspect of the invention, there is provided a semiconductor device including a semiconductor substrate, a lower electrode film formed on the semiconductor substrate, a dielectric film formed on the lower electrode film, and an upper electrode film formed on the dielectric film, wherein the lower electrode film, the dielectric film and the upper electrode film construct a capacitor in a predetermined region on the semiconductor substrate, the dielectric film is separated from the upper electrode film outside the predetermined region, and the dielectric film is formed continuously with respect to an adjacent cell.
    Type: Grant
    Filed: February 15, 2007
    Date of Patent: June 1, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Soichi Yamazaki, Koji Yamakawa
  • Publication number: 20090267123
    Abstract: A semiconductor device includes: a semiconductor substrate; a plurality of transistors on the semiconductor substrate, each of the transistors has a source and drain region; an interlayer insulating film on the semiconductor substrate and the plurality of transistors; and at least three capacitors on the interlayer insulation film, each of them has a top electrode, a bottom electrode and an insulating film interposed therebetween; wherein the 1st and 2nd capacitors have an shared electrode, with the top electrodes of the 1st and 2nd capacitors, which has a 1st longer direction, the 2nd and 3rd capacitors have an shared electrode, with the bottom electrodes of the 2nd and 3rd capacitors, which has a 2nd longer direction different from the 1st direction.
    Type: Application
    Filed: April 20, 2009
    Publication date: October 29, 2009
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Soichi YAMAZAKI, Koji Yamakawa, Masahiro Kiyotoshi
  • Publication number: 20090224301
    Abstract: A semiconductor memory device comprises a field effect transistor including a source/drain region, an interlayer insulation film burying the field effect transistor, a ferroelectric capacitor including a lower electrode, a ferroelectric film and an upper electrode, the lower electrode with a concave-convex surface, and a plug electrically connecting between the source/drain region and the ferroelectric capacitor. A height and a size in an in-place direction of each convex portion in the concave-convex surface is 1 to 50 nm. The ferroelectric film includes a lower ferroelectric film with a predetermined height from the lower electrode and an upper ferroelectric film formed on the lower ferroelectric film as being formed from the same material as the lower ferroelectric film. The lower ferroelectric film includes a part of which at least one of composition, crystallizing orientation and size of a crystalline particle being different from a crystalline particle in the upper ferroelectric film.
    Type: Application
    Filed: March 6, 2009
    Publication date: September 10, 2009
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Koji Yamakawa, Soichi Yamazaki
  • Patent number: 7573120
    Abstract: According to an aspect of the present invention, there is provided a semiconductor device comprising a semiconductor substrate, a capacitor which is disposed above the semiconductor substrate and in which a dielectric film is held between lower and upper electrodes, an oxide film formed in such a manner as to coat the capacitor and having a thickness of 5 nm or more and 50 nm or less, and a protective film formed on the oxide film by an ALD process.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: August 11, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Katsuaki Natori, Hiroyuki Kanaya, Koji Yamakawa
  • Patent number: 7564089
    Abstract: There is disclosed a semiconductor device comprising a semiconductor substrate, and a capacitor provided above the semiconductor substrate, and including a bottom electrode, a dielectric film formed on the bottom electrode, and a top electrode formed on the dielectric film and having a plurality of hole patterns.
    Type: Grant
    Filed: August 5, 2004
    Date of Patent: July 21, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Soichi Yamazaki, Katsuaki Natori, Koji Yamakawa
  • Publication number: 20090127603
    Abstract: A semiconductor memory device according to an embodiment comprises: a field-effect transistor formed on a substrate; an interlayer insulation film formed on the substrate on which the field-effect transistor is formed; and a ferroelectric capacitor including a lower electrode connected via a plug to one of source/drain regions of the field-effect transistor, and formed on the interlayer insulation film, a ferroelectric film having a perovskite crystal structure used as a basic structure, and an upper electrode, wherein a lattice matching region in which a lattice of the ferroelectric film is matched with a lattice of the lower electrode is formed in a range of a predetermined thickness of the ferroelectric film from the lower electrode.
    Type: Application
    Filed: November 5, 2008
    Publication date: May 21, 2009
    Inventors: Koji Yamakawa, Soichi Yamazaki
  • Patent number: 7531408
    Abstract: A method of manufacturing a semiconductor device, including forming a capacitor above a semiconductor substrate, the capacitor including a dielectric film containing Pb, Zr, Ti and O. Forming the capacitor includes forming a crystallized film which contains Pb, Sr, Zr, Ti, Ru and O.
    Type: Grant
    Filed: May 25, 2007
    Date of Patent: May 12, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Keisuke Nakazawa, Koji Yamakawa, Katsuaki Natori, Soichi Yamazaki, Hiroshi Itokawa, Hiroyuki Kanaya
  • Patent number: 7527984
    Abstract: A semiconductor device according to an embodiment of the present invention includes a semiconductor substrate; a ferroelectric capacitor arranged above the semiconductor substrate; an insulating protecting film covering a side surface of the ferroelectric capacitor; and a side wall film formed on a side surface of the ferroelectric capacitor through the protecting film and giving tensile stress to the ferroelectric capacitor in a direction of an electric field applied to the ferroelectric capacitor.
    Type: Grant
    Filed: July 10, 2006
    Date of Patent: May 5, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koji Yamakawa, Soichi Yamazaki
  • Publication number: 20090091876
    Abstract: A semiconductor device has a semiconductor substrate, and a capacitor which is provided on the upper side of the semiconductor substrate and composed of a lower electrode, an upper electrode and a dielectric film, the dielectric film being placed in between the lower electrode and the upper electrode, the lower electrode including a noble metal film, and a plurality of conductive oxide films formed in an islands arrangement on the noble metal film.
    Type: Application
    Filed: September 30, 2008
    Publication date: April 9, 2009
    Inventors: Koji YAMAKAWA, Soichi YAMAZAKI
  • Patent number: 7501675
    Abstract: A semiconductor device according to an aspect of the present invention comprises a semiconductor substrate, a ferroelectric capacitor, a protective film and an auxiliary capacitor. The ferroelectric capacitor is provided above the semiconductor substrate and comprises an upper electrode, a lower electrode and a ferroelectric film interposed between the upper and lower electrodes. The protective film is formed, covering the ferroelectric capacitor. The auxiliary capacitor is provided in a circuit section peripheral to the ferroelectric capacitor and uses the protective film as capacitor insulating film.
    Type: Grant
    Filed: April 18, 2005
    Date of Patent: March 10, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Katsuaki Natori, Soichi Yamazaki, Koji Yamakawa, Hiroyuki Kanaya
  • Patent number: 7473565
    Abstract: A semiconductor device comprises a bottom electrode, a top electrode, and a dielectric film provided between the bottom electrode and the top electrode and made of a perovskite type ferroelectrics containing Pb, Zr, Ti and O, the dielectric film comprising a first portion formed of a plurality of crystal grains partitioned by grain boundaries having a plurality of directions.
    Type: Grant
    Filed: July 11, 2005
    Date of Patent: January 6, 2009
    Assignees: Kabushiki Kaisha Toshiba, Infineon Technologies AG
    Inventors: Osamu Arisumi, Keitaro Imai, Koji Yamakawa, Bum-ki Moon
  • Patent number: 7465628
    Abstract: According to an aspect of the invention, there is provided a semiconductor device comprising a capacitor formed above a semiconductor substrate by sandwiching a dielectric film between a lower electrode and an upper electrode including an electrode film which contains an MOx type conductive oxide (M is a metal element, O is an oxygen element, and x>0), and a contact connected to the upper electrode, wherein a film thickness of the electrode film immediately below the contact is smaller than a film thickness of the electrode film in the other portion.
    Type: Grant
    Filed: April 14, 2006
    Date of Patent: December 16, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Soichi Yamazaki, Koji Yamakawa
  • Patent number: 7456456
    Abstract: A semiconductor device according to the present invention comprises a semiconductor substrate, a capacitor including a lower electrode disposed above the semiconductor substrate, a dielectric film disposed above the lower electrode, and an upper electrode disposed above the dielectric film, the upper electrode including metal oxide formed of ABO3 perovskite oxide and containing at least an Ru element as a B site element, and a metal film containing a Ti element being disposed between the dielectric film and the upper electrode.
    Type: Grant
    Filed: December 27, 2006
    Date of Patent: November 25, 2008
    Assignees: Kabushiki Kaisha Toshiba, Infineon Technologies AG
    Inventors: Hiroshi Itokawa, Koji Yamakawa, Rainer Bruchhaus
  • Publication number: 20080258192
    Abstract: This disclosure concerns a semiconductor device comprising an insulating film provided on a semiconductor substrate; a lower contact formed in the insulating film; a ferroelectric capacitor including a first lower electrode provided on the lower contact and connected to the lower contact, a second lower electrode provided on the first lower electrode and made of SRO (Strontium Ruthenium Oxide), a ferroelectric film including crystals, and an upper electrode provided on the ferroelectric film, grain diameters of the crystals being set to 30 nm to 150 nm by forming the ferroelectric film on the second lower electrode; and a wiring connected to the upper electrode.
    Type: Application
    Filed: April 16, 2008
    Publication date: October 23, 2008
    Inventors: Soichi YAMAZAKI, Koji Yamakawa
  • Publication number: 20080258193
    Abstract: A ferroelectric memory that stores information by using a hysteresis characteristic of a ferroelectric, has a semiconductor substrate; a lower electrode formed above said semiconductor substrate; a ferroelectric film formed on said lower electrode; and an upper electrode formed on said ferroelectric film, wherein said upper electrode includes an AOx-type conductive oxide film formed on said ferroelectric film and an “A” metal film formed on said AOx-type conductive oxide film, and said “A” metal is a noble metal selected from among Ir, Ru, Rh, Pt, Os and Pd.
    Type: Application
    Filed: April 22, 2008
    Publication date: October 23, 2008
    Inventors: Koji Yamakawa, Soichi Yamazaki
  • Publication number: 20080160642
    Abstract: A semiconductor device according to an aspect of the invention comprises a semiconductor substrate, a conductive plug which is connected to an active region of a transistor formed on the semiconductor substrate, a metal silicide film which covers a bottom surface portion and side surface portion of the conductive plug, and an electrode structure which is formed on the conductive plug.
    Type: Application
    Filed: March 11, 2008
    Publication date: July 3, 2008
    Inventors: Hiroshi Itokawa, Keitaro Imai, Koji Yamakawa, Bum-ki Moon
  • Publication number: 20080013985
    Abstract: A developing roller having a properly adjusted toner feed quantity comprises a shaft, an elastic layer and a surface covering layer, in which a JIS 10-point average roughness (Rz) of the surface is 4-7 ?m and a specular gloss at 85° according to JIS Z8741 of the surface is 14-55.
    Type: Application
    Filed: April 3, 2007
    Publication date: January 17, 2008
    Applicant: BRIDGESTONE CORPORATION
    Inventor: Koji Yamakawa
  • Publication number: 20070231927
    Abstract: A manufacturing method of a semiconductor device of an embodiment of the present invention includes: forming a lower electrode film for a capacitor above a substrate; forming a ferroelectric film on the lower electrode film by deposition-simultaneous crystallization; forming a dummy film on the ferroelectric film; removing the dummy film and a part of the ferroelectric film through a planarizing process to planarize the surface of the ferroelectric film; and forming an upper electrode film for the capacitor on the ferroelectric film.
    Type: Application
    Filed: March 30, 2007
    Publication date: October 4, 2007
    Inventors: Koji Yamakawa, Masahiro Kiyotoshi, Soichi Yamazaki
  • Publication number: 20070231948
    Abstract: A method of manufacturing a semiconductor device, including forming a capacitor above a semiconductor substrate, the capacitor including a dielectric film containing Pb, Zr, Ti and O. Forming the capacitor includes forming a crystallized film which contains Pb, Sr, Zr, Ti, Ru and O.
    Type: Application
    Filed: May 25, 2007
    Publication date: October 4, 2007
    Applicant: KABUSHHIKI KAISHA TOSHIBA
    Inventors: Keisuke Nakazawa, Koji Yamakawa, Katsuaki Natori, Soichi Yamazaki, Hiroshi Itokawa, Hiroyuki Kanaya
  • Publication number: 20070215974
    Abstract: According to an aspect of the invention, there is provided a semiconductor device including a semiconductor substrate, a lower electrode film formed on the semiconductor substrate, a dielectric film formed on the lower electrode film, and an upper electrode film formed on the dielectric film, wherein the lower electrode film, the dielectric film and the upper electrode film construct a capacitor in a predetermined region on the semiconductor substrate, the dielectric film is separated from the upper electrode film outside the predetermined region, and the dielectric film is formed continuously with respect to an adjacent cell.
    Type: Application
    Filed: February 15, 2007
    Publication date: September 20, 2007
    Inventors: Soichi Yamazaki, Koji Yamakawa