Abstract: An apparatus for laminating a scintillator panel and an imaging device panel includes a chamber, a membrane, a first vacuum pump, a second vacuum pump, a heater plate, and a heater power supply. The chamber includes a chamber cover, defining a sealed space. The membrane defines the sealed space in the bottom of the chamber cover by being coupled to the bottom surface of the chamber cover and is made of a contractable and expandable material. The first vacuum pump is coupled to the chamber cover and vents vacuum in the sealed space between the bottom surface of the chamber cover and the membrane. The second vacuum pump vents vacuum in the chamber by being coupled to one side of the chamber. The heater plate is coupled into the chamber to support and heat the panel assembly with an adhesive interposed between the scintillator panel and the imaging device panel.

Abstract: A floating offshore structure is disclosed. The floating offshore structure, which is for drilling or production, includes a semi-submerged platform body in the shape of a cylinder that is extended vertically above and below the sea level. The platform body is formed with a concave part that reduces its cross-sectional area. The concave part is discontinuously formed along an external circumferential surface of the platform body. The depth of submergence of the platform body is adjusted so that the water line is located at the concave part in an extreme marine condition.

Abstract: A nonvolatile memory device includes a pipe gate having a pipe channel hole; a plurality of interlayer insulation layers and a plurality of gate electrodes alternately stacked over the pipe gate; a pair of columnar cell channels passing through the interlayer insulation layers and the gate electrodes and coupling a pipe channel formed in the pile channel hole; a first blocking layer and a charge trapping and charge storage layer formed on sidewalls of the columnar cell channels; and a second blocking layer formed between the first blocking layer and the plurality of gate electrodes.

Abstract: A nonvolatile memory device includes a pipe insulation layer having a pipe channel hole, a pipe gate disposed over the pipe insulation layer, a pair of cell strings each having a columnar cell channel, and a pipe channel coupling the columnar cell channels and surrounding inner sidewalls and a bottom of the pipe channel hole.

Abstract: Provided is a circuit board including: a support substrate including a first region and a second region extending to be bent from the first region; light emitting devices mounted to the first region of the support substrate; and a bending portion bent between the first region and the second region, wherein the bending portion comprises: an interconnection line arrangement portion that crosses an interconnection line; and an interconnection line protection portion disposed on the periphery of the interconnection line, wherein the interconnection line protection portion protrudes more than the interconnection line arrangement portion.

Abstract: A resistive memory device operable with low power consumption and a memory apparatus and data processing system including the same are provided. The resistive memory includes a chalcogenide compound containing 10 to 60 wt % (atomic weight) of selenium (Se) or tellurium (Te).

Abstract: A nonvolatile memory device includes a pipe insulation layer having a pipe channel hole, a pipe gate disposed over the pipe insulation layer, a pair of cell strings each having a columnar cell channel, and a pipe channel coupling the columnar cell channels and surrounding inner sidewalls and a bottom of the pipe channel hole.

Abstract: Provided is a lighting device, including: a circuit board in which light emitting elements are mounted to one surface of a supporting substrate; a substrate housing disposed to be spaced apart from another surface opposite to the one surface of the supporting substrate; and a distance regulating portion formed between the circuit board and the substrate housing to adjust a spaced distance between the circuit board and the substrate housing according to movement of the circuit board, wherein the distance regulating portion functions to fix the circuit board to the substrate housing via a fixing element formed in the circuit board and the substrate housing.

Abstract: Provided are a lighting device and a flat panel display having the lighting device, the lighting device, including: a support substrate; a circuit board on the support substrate; light emitting devices mounted on the circuit board; and a light guide plate having a protruding portion protruding to a remaining region except for a region in which the light emitting devices are disposed.

Abstract: Provided is a printed circuit board, comprising: a supporting substrate including a first region and a second region extending to be bent from the first region; an insulating substrate above the supporting substrate; a bending portion bent between the first region and the second region; and an adhesive layer between the supporting substrate and the insulating substrate and except for the bending portion.

Abstract: Provided is a circuit board including: a supporting substrate including a first region to which light emitting elements are mounted and a second region extending to be bent from the first region, wherein the second region comprises: a connector mounting portion to which a connector for supplying an electric current to the light emitting elements is mounted; and a non-mounting portion of a connector separated and spaced apart from the connector mounting portion, wherein the connector mounting portion is formed lower than the non-mounting portion of the connector.

Abstract: Provided is a lighting unit, including: a support substrate; a light guide plate for guiding light generated from a light source; and a first stopper fixed to the support substrate and configured to support the light guide plate.

Abstract: Provided is a circuit board including: a supporting substrate; light emitting elements mounted to the supporting substrate; a through hole passing through the supporting substrate; and a connector inserted into the through hole and for supplying an electric current to the light emitting elements.

Abstract: Provided is a circuit board including: a support substrate; a plurality of light emitting devices mounted on the support substrate; and a device protection portion surrounding one of the light emitting devices, or three or more surfaces of the plurality of light emitting devices.

Abstract: A semiconductor device including a conductive layer, a diffusion barrier layer formed over the conductive layer, including a refractory metal compound, and acquired after a surface treatment, and a metal silicide layer formed over the diffusion barrier layer. The adhesion between a diffusion barrier layer and a metal silicide layer may be improved by increasing the surface energy of the diffusion barrier layer through a surface treatment. Therefore, although the metal silicide layer is fused in a high-temperature process, it is possible to prevent a void from being caused at the interface between the diffusion barrier layer and the metal silicide layer. Moreover, it is possible to increase the adhesion between a conductive layer and the diffusion barrier layer by increasing the surface energy of the conductive layer through the surface treatment.

Abstract: A semiconductor light emitting device including a light emitting structure including a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer; a first electrode connected to the first conductivity type semiconductor layer; a second electrode including a contact layer connected to the second conductivity type semiconductor layer, a capping layer disposed on the contact layer, and a metal buffer layer disposed on the capping layer, the metal buffer layer encompasses an upper and lateral surface of the capping layer; a first insulating layer disposed on the light emitting structure such that the first and second electrodes are exposed; and a second insulating layer disposed on the first insulating layer such that at least a portion of the first electrode and at least a portion of the metal buffer layer are exposed.

Abstract: A semiconductor device including a conductive layer, a diffusion barrier layer formed over the conductive layer, including a refractory metal compound, and acquired after a surface treatment, and a metal silicide layer formed over the diffusion barrier layer. The adhesion between a diffusion barrier layer and a metal silicide layer may be improved by increasing the surface energy of the diffusion barrier layer through a surface treatment. Therefore, although the metal silicide layer is fused in a high-temperature process, it is possible to prevent a void from being caused at the interface between the diffusion barrier layer and the metal silicide layer. Moreover, it is possible to increase the adhesion between a conductive layer and the diffusion barrier layer by increasing the surface energy of the conductive layer through the surface treatment.

Abstract: The present invention provides an etching composition, comprising a silyl phosphate compound, phosphoric acid and deionized water, and a method for fabricating a semiconductor, which includes an etching process employing the etching composition. The etching composition of the invention shows a high etching selectivity for a nitride film with respect to an oxide film. Thus, when the etching composition of the present invention is used to remove a nitride film, the effective field oxide height (EEH) may be easily controlled by controlling the etch rate of the oxide film. In addition, the deterioration in electrical characteristics caused by damage to an oxide film or etching of the oxide film may be prevented, and particle generation may be prevented, thereby ensuring the stability and reliability of the etching process.

Abstract: A semiconductor device includes a dielectric layer in which zirconium, hafnium, and a IV group element are mixed. A method for fabricating a capacitor includes forming a bottom electrode, forming the dielectric layer and forming a top electrode over the dielectric layer.

Abstract: A non-volatile memory includes a channel layer to extend from a substrate in a vertical direction; a plurality of interlayer dielectric layers and a plurality of gate electrodes to be alternately stacked along the channel layer; and a memory layer to be interposed between the channel layer and each of the gate electrodes, wherein the memory layer comprises a tunnel dielectric layer to contact the channel layer, a first charge trap layer to contact the tunnel dielectric layer and formed of an insulating material, a charge storage layer to contact the first charge trap layer and formed of a semiconducting material or a conductive material, a second charge trap layer to contact the charge storage layer and formed of an insulating material, and a charge blocking layer to contact the second charge trap layer.