Patents by Inventor Liang Yu

Liang Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240152295
    Abstract: A memory device includes a plurality of memory dies, each memory die of the plurality of memory dies including a memory array and control logic, operatively coupled with the memory array, to perform operations including identifying a data path operation with respect to the memory die. The memory die is associated with a channel. The operations further include determining, based on at least one value derived from a current budget ready status and a cache ready status, whether the channel is ready for the memory die to handle the data path operation, and in response to determining that the channel is ready for the memory die to handle the data path operation, causing the data path operation to be handled by the memory die.
    Type: Application
    Filed: November 7, 2023
    Publication date: May 9, 2024
    Inventors: Liang Yu, Jonathan S. Parry
  • Patent number: 11978810
    Abstract: Various embodiments of the present disclosure are directed towards a method for forming a varactor comprising a reduced surface field (RESURF) region. The method includes forming a drift region having a first doping type within a substrate. A RESURF region having a second doping type is formed within the substrate such that the RESURF region is below the drift region. A gate structure is formed on the substrate. A pair of contact regions is formed within the substrate on opposing sides of the gate structure. The contact regions respectively abut the drift region and have the first doping type, and wherein the first doping type is opposite the second doping type.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: May 7, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Liang-Yu Su, Chih-Wen Yao, Hsiao-Chin Tuan, Ming-Ta Lei
  • Patent number: 11977634
    Abstract: The disclosure discloses a method for detecting an intrusion in parallel based on an unbalanced data Deep Belief Network, which reads an unbalanced data set DS; under-samples the unbalanced data set using the improved NCR algorithm to reduce the ratio of the majority type samples and make the data distribution of the data set balanced; the improved differential evolution algorithm is used on the distributed memory computing platform Spark to optimize the parameters of the deep belief network model to obtain the optimal model parameters; extract the feature of data of the data set, and then classify the intrusion detection by the weighted nuclear extreme learning machine, and finally train multiple weighted nuclear extreme learning machines of different structures in parallel by multithreading as the base classifier, and establish a multi-classifier intrusion detection model based on adaptive weighted voting for detecting the intrusion in parallel.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: May 7, 2024
    Assignee: HUNAN UNIVERSITY
    Inventors: Kenli Li, Zhuo Tang, Qing Liao, Chubo Liu, Xu Zhou, Siyang Yu, Liang Du
  • Patent number: 11977748
    Abstract: A memory device includes memory dice, each memory die including: a memory array; a memory to store a data structure; and control logic that includes: multiple processing threads to execute memory access operations on the memory array concurrently; a priority ring counter, the data structure to store an association between a value of the priority ring counter and a subset of the multiple processing threads; a threads manager to increment the value of the priority ring counter before a power management cycle and to identify one or more prioritized processing threads corresponding to the subset of the multiple processing threads; and a peak power manager coupled with the threads manager and to prioritize allocation of power to the one or more prioritized processing threads during the power management cycle.
    Type: Grant
    Filed: February 9, 2022
    Date of Patent: May 7, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Luca Nubile, Walter Di Francesco, Fumin Gu, Ali Mohammadzadeh, Biagio Iorio, Liang Yu
  • Publication number: 20240145596
    Abstract: A device includes a fin extending from a semiconductor substrate; a gate stack over the fin; a first spacer on a sidewall of the gate stack; a source/drain region in the fin adjacent the first spacer; an inter-layer dielectric layer (ILD) extending over the gate stack, the first spacer, and the source/drain region, the ILD having a first portion and a second portion, wherein the second portion of the ILD is closer to the gate stack than the first portion of the ILD; a contact plug extending through the ILD and contacting the source/drain region; a second spacer on a sidewall of the contact plug; and an air gap between the first spacer and the second spacer, wherein the first portion of the ILD extends across the air gap and physically contacts the second spacer, wherein the first portion of the ILD seals the air gap.
    Type: Application
    Filed: January 2, 2024
    Publication date: May 2, 2024
    Inventors: Su-Hao Liu, Kuo-Ju Chen, Kai-Hsuan Lee, I-Hsieh Wong, Cheng-Yu Yang, Liang-Yin Chen, Huicheng Chang, Yee-Chia Yeo, Syun-Ming Jang, Meng-Han Chou
  • Publication number: 20240143501
    Abstract: A memory device includes a plurality of memory dies. Each memory die of the plurality of memory dies includes a memory die and control logic, operatively coupled with the memory die, to perform operations including receiving, during a current auxiliary data communication cycle, a token to enable auxiliary data communication, in response to receiving the token, determining whether to communicate auxiliary data via an auxiliary data channel to at least one other memory die of a plurality of memory dies, and in response to determining to communicate the auxiliary data via the auxiliary data channel to the at least one other memory die, causing the auxiliary data to be communicated to the at least one other memory die.
    Type: Application
    Filed: October 26, 2023
    Publication date: May 2, 2024
    Inventors: Luca Nubile, Luigi Pilolli, Liang Yu, Ali Mohammadzadeh, Walter Di Francesco, Biagio Iorio
  • Publication number: 20240142847
    Abstract: A display device includes a panel, a conductive layer, a first color filter array and a second color filter array. The panel has a display surface and multiple sub-pixel regions where the multiple sub-pixel regions and the conductive layer are on this display surface. The first color filter array including multiple first color filter elements is disposed on the conductive layer while the second color filter array including multiple second color filter elements is disposed on the first color filter array. One first overlaid region and one second overlaid region are defined by the orthogonal projections of the color filter elements within one of the sub-pixel regions. In one sub-pixel region, a section of the first overlaid region does not overlap a section of the second overlaid region.
    Type: Application
    Filed: June 14, 2023
    Publication date: May 2, 2024
    Inventors: Liang-Yu LIN, Po-Yuan LO, Ian FRENCH
  • Patent number: 11973027
    Abstract: A semiconductor device and a method of forming the same are provided. The semiconductor device includes a substrate, a gate structure, a dielectric structure and a contact structure. The substrate has source/drain (S/D) regions. The gate structure is on the substrate and between the S/D regions. The dielectric structure covers the gate structure. The contact structure penetrates through the dielectric structure to connect to the S/D region. A lower portion of a sidewall of the contact structure is spaced apart from the dielectric structure by an air gap therebetween, while an upper portion of the sidewall of the contact structure is in contact with the dielectric structure.
    Type: Grant
    Filed: March 23, 2022
    Date of Patent: April 30, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Pei-Yu Chou, Jr-Hung Li, Liang-Yin Chen, Su-Hao Liu, Tze-Liang Lee, Meng-Han Chou, Kuo-Ju Chen, Huicheng Chang, Tsai-Jung Ho, Tzu-Yang Ho
  • Patent number: 11973076
    Abstract: The present disclosure provides a electrostatic discharge (ESD) protection circuit, coupled between a first reference terminal and a second reference terminal; the ESD protection circuit includes a first voltage divider, a second voltage divider, a first trigger circuit and a second trigger circuit. The first trigger circuit includes a first terminal and a second terminal, wherein the first terminal is coupled to the first reference terminal, and the second terminal is coupled to the second reference terminal via the first voltage divider. The second trigger circuit includes a first terminal and a second terminal, wherein the first terminal is coupled to the second reference terminal, the second terminal is coupled to the first reference terminal via the second voltage divider, and the second trigger circuit and the first trigger circuit are in parallel connection.
    Type: Grant
    Filed: March 31, 2021
    Date of Patent: April 30, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Ming-Fang Lai, Liang-Yu Su, Hang Fan
  • Patent number: 11965419
    Abstract: The present invention discloses a multi-energy complementary system for a co-associated abandoned mine and a use method. The multi-energy complementary system for a co-associated abandoned mine includes a mining mechanism, a grouting mechanism and an energy mechanism. In the present invention, the mining of coal and uranium resources is realized through the mining mechanism, the subsidence and seepage reduction of the stratum is realized through the grouting mechanism, and the effective utilization of waste resources is realized through the energy mechanism. Finally, with the efficient cooperation of the three mechanisms, safe and efficient development and utilization of co-associated resources in the full life cycle are realized, and the purposes of green and efficient mining of coal and uranium resources and secondary development of a coal seam goaf are achieved, thereby facilitating the realization of dual-carbon goals and the development of low-carbon green energy.
    Type: Grant
    Filed: April 28, 2022
    Date of Patent: April 23, 2024
    Assignee: ANHUI UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Tong Zhang, Liang Yuan, Yanfang Li, Zegong Liu, Ming Tang, Xin Yang, Xiang Yu, Shuai Liu, Xin Lv
  • Publication number: 20240125963
    Abstract: The present disclosure provides a method and a system for acquiring seismic data of a four-component ocean bottom node (OBN). The method is implemented by the system, comprising controlling installations of a plurality of ocean bottom submerged buoys and a plurality of four-component OBN seismic data acquisition instruments and sending positioning signals and timing signals to the plurality of ocean bottom submerged buoys through armored opto-electronic composite cables. The method also includes obtaining real-time and uninterrupted water temperature data, pressure data, density data, and salt saturation data along the armored opto-electronic composite cables from the ocean surface to locations of the plurality of ocean bottom submerged buoys, and calculating real-time and three-dimensional data of waters of a whole measurement work area through interpolation.
    Type: Application
    Filed: December 25, 2023
    Publication date: April 18, 2024
    Applicants: BGP INC., CHINA NATIONAL PETROLEUM CORPORATION, OPTICAL SCIENCE AND TECHNOLOGY (CHENGDU) LTD.
    Inventors: Liang GOU, Gang YU, Haibo LIU, Zhaohong XU, Ximing WANG, Shujun XIA, Shujie AN, Mengxiong XIAO
  • Patent number: 11960172
    Abstract: The present application discloses a liquid crystal display panel, a method for manufacturing the liquid crystal display panel, and a curved display. The liquid crystal display panel is configured with an alignment layer only on an array substrate, but not on an opposing substrate opposite to the array substrate. After photo-alignment, a pretilt angle of liquid crystal molecules near the array substrate is greater than a pretilt angle of liquid crystal molecules near the opposing substrate to effectively mitigate a problem of “black clusters.
    Type: Grant
    Filed: July 13, 2021
    Date of Patent: April 16, 2024
    Assignees: Huizhou China Star Optoelectronics Display Co., Ltd., TCL China Star Optoelectronics Technology Co., Ltd.
    Inventors: Liang Yu, Feng Zheng
  • Patent number: 11960764
    Abstract: A method includes selecting a particular ready/busy pin (R/B #) among a plurality of R/B # pins that are associated with respective memory dice among a plurality of memory dice of a memory device. The method further includes receiving, by at least one memory dice among the plurality of memory dice, signaling indicative of performance of a memory access while the particular R/B # pin is set to low, and, initiating an internal clocking signal subsequent to receipt of the signaling indicative of performance of the memory access, wherein the internal clocking signal is associated with timing of operations performed by the plurality of memory dice.
    Type: Grant
    Filed: September 2, 2021
    Date of Patent: April 16, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Liang Yu, Luigi Pilolli, Biagio Iorio
  • Patent number: 11955378
    Abstract: A bonding method of package components and a bonding apparatus are provided. The method includes: providing at least one first package component and a second package component, wherein the at least one first package component has first electrical connectors and a first dielectric layer at a bonding surface of the at least one first package component, and the second package component has second electrical connectors and a second dielectric layer at a bonding surface of the second package component; bringing the at least one first package component and the second package component in contact, such that the first electrical connectors approximate or contact the second electrical connectors; and selectively heating the first electrical connectors and the second electrical connectors by electromagnetic induction, in order to bond the first electrical connectors with the second electrical connectors.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Li Hsiao, Chih-Hang Tung, Chen-Hua Yu, Tung-Liang Shao, Su-Chun Yang
  • Patent number: 11953512
    Abstract: An intelligent experimental device for collaborative mining of associated resources includes a signal transmission mechanism, a pressure maintaining mechanism, a feeding mechanism, and a reaction mechanism. The signal transmission mechanism includes a centralized controller, an annunciator, signal receivers, a power supply, a power cord, signal transmitters, and signal sensing valves. The pressure maintaining mechanism includes ambient and axial pressure oil chambers, ambient and axial pressure pumps, ambient and axial pressure liquid distribution tanks, a comprehensive pressure distribution pipe, and hydraulic transmission pipes. The feeding mechanism includes monitoring analyzers, temperature controllers, solution transfer pipes, seepage pumps, mixture conveying pipes, a comprehensive liquid distributor, an aggregate chamber, a liquid chamber, an oil chamber, a gas chamber, a mixing chamber and an analytical purifier.
    Type: Grant
    Filed: May 19, 2022
    Date of Patent: April 9, 2024
    Assignee: ANHUI UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Tong Zhang, Xiang Yu, Yankun Ma, Yanfang Li, Liang Yuan, Zegong Liu
  • Publication number: 20240114614
    Abstract: Disclosed is a thermal conduction-electrical conduction isolated circuit board with a ceramic substrate and a power transistor embedded, mainly comprising: a dielectric material layer, a heat-dissipating ceramic block, a securing portion, a stepped metal electrode layer, a power transistor, and a dielectric material packaging, wherein a via hole is formed in the dielectric material layer, the heat-dissipating ceramic block is correspondingly embedded in the via hole, the heat-dissipating ceramic block has a thermal conductivity higher than that of the dielectric material layer and a thickness less than that of the dielectric material layer, the stepped metal electrode layer conducts electricity and heat for the power transistor, the dielectric material packaging is configured to partially expose the source connecting pin, drain connecting pin, and gate connecting pin of the encapsulated stepped metal electrode layer.
    Type: Application
    Filed: September 29, 2022
    Publication date: April 4, 2024
    Inventors: HO-CHIEH YU, CHEN-CHENG-LUNG LIAO, CHUN-YU LIN, JASON AN CHENG HUANG, CHIH-CHUAN LIANG, KUN-TZU CHEN, NAI-HIS HU, LIANG-YO CHEN
  • Publication number: 20240106119
    Abstract: An antenna includes a patch radiator, a feed point, a first ground point, and a second ground point. The patch radiator has a first side edge and an intersecting second side edge, and a first coupling contact and a second coupling contact. The patch radiator is coupled to the first ground point and the second ground point through the first coupling contact and the second coupling contact, and is biased coupled to the feed point. A distance between the first coupling contact and the first side edge, a distance between the first coupling contact and the second side edge, a distance between the second coupling contact and the first side edge, and a distance between the second coupling contact and the second side edge are all greater than or equal to 0.05?, where ? is an operating wavelength of the antenna in an operating frequency band range of the antenna.
    Type: Application
    Filed: December 10, 2021
    Publication date: March 28, 2024
    Inventors: Dong Yu, Jiaming Wang, Liang Xue, Yuanpeng Li, Hanyang Wang, Meng Hou
  • Patent number: 11942433
    Abstract: In an embodiment, a structure includes: a first integrated circuit die including first die connectors; a first dielectric layer on the first die connectors; first conductive vias extending through the first dielectric layer, the first conductive vias connected to a first subset of the first die connectors; a second integrated circuit die bonded to a second subset of the first die connectors with first reflowable connectors; a first encapsulant surrounding the second integrated circuit die and the first conductive vias, the first encapsulant and the first integrated circuit die being laterally coterminous; second conductive vias adjacent the first integrated circuit die; a second encapsulant surrounding the second conductive vias, the first encapsulant, and the first integrated circuit die; and a first redistribution structure including first redistribution lines, the first redistribution lines connected to the first conductive vias and the second conductive vias.
    Type: Grant
    Filed: January 17, 2022
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Jen-Fu Liu, Ming Hung Tseng, Tsung-Hsien Chiang, Yen-Liang Lin, Tzu-Sung Huang
  • Publication number: 20240096825
    Abstract: A bond head is provided. The bond head includes a bond base, a chuck member, and an elastic material. The chuck member protrudes from a surface of the bond base, and has a chuck surface formed with vacuum holes for holding a die using differential air pressure. In the direction parallel to the chuck surface, the width of the chuck surface is less than the width of the bond base and is equal to or greater than the width of the die. The elastic material is disposed over the chuck surface. The elastic material is arranged around the periphery of the chuck surface to cover edges and/or corners of the chuck surface.
    Type: Application
    Filed: February 8, 2023
    Publication date: March 21, 2024
    Inventors: Chen-Hua YU, Chih-Hang TUNG, Kuo-Chung YEE, Yian-Liang KUO, Jiun-Yi WU
  • Patent number: 11933372
    Abstract: An engagement and disengagement device used in a seat belt retractor including a first rotating member capable of being driven to rotate about a rotation axis thereof, a second rotating member provided coaxially with the first rotating member and connected to a reel of the seat belt retractor in an anti-torsion manner, and a transmission member provided between the first and second rotating member. The first rotating member is capable of transmitting torque to the second rotating member by means of the transmission member. The transmission member includes a holder and a transmission element in the holder. A first elastic component elastically holds the transmission element by radially exerting a force that enables the transmission element to be located away from the first or the second rotating member, and the first elastic component is integrated on the holder.
    Type: Grant
    Filed: December 25, 2020
    Date of Patent: March 19, 2024
    Assignee: AUTOLIV DEVELOPMENT AB
    Inventors: Liang Ge, Licheng Yu