Patents by Inventor Liang Yu

Liang Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11953512
    Abstract: An intelligent experimental device for collaborative mining of associated resources includes a signal transmission mechanism, a pressure maintaining mechanism, a feeding mechanism, and a reaction mechanism. The signal transmission mechanism includes a centralized controller, an annunciator, signal receivers, a power supply, a power cord, signal transmitters, and signal sensing valves. The pressure maintaining mechanism includes ambient and axial pressure oil chambers, ambient and axial pressure pumps, ambient and axial pressure liquid distribution tanks, a comprehensive pressure distribution pipe, and hydraulic transmission pipes. The feeding mechanism includes monitoring analyzers, temperature controllers, solution transfer pipes, seepage pumps, mixture conveying pipes, a comprehensive liquid distributor, an aggregate chamber, a liquid chamber, an oil chamber, a gas chamber, a mixing chamber and an analytical purifier.
    Type: Grant
    Filed: May 19, 2022
    Date of Patent: April 9, 2024
    Assignee: ANHUI UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Tong Zhang, Xiang Yu, Yankun Ma, Yanfang Li, Liang Yuan, Zegong Liu
  • Patent number: 11955378
    Abstract: A bonding method of package components and a bonding apparatus are provided. The method includes: providing at least one first package component and a second package component, wherein the at least one first package component has first electrical connectors and a first dielectric layer at a bonding surface of the at least one first package component, and the second package component has second electrical connectors and a second dielectric layer at a bonding surface of the second package component; bringing the at least one first package component and the second package component in contact, such that the first electrical connectors approximate or contact the second electrical connectors; and selectively heating the first electrical connectors and the second electrical connectors by electromagnetic induction, in order to bond the first electrical connectors with the second electrical connectors.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Li Hsiao, Chih-Hang Tung, Chen-Hua Yu, Tung-Liang Shao, Su-Chun Yang
  • Publication number: 20240114614
    Abstract: Disclosed is a thermal conduction-electrical conduction isolated circuit board with a ceramic substrate and a power transistor embedded, mainly comprising: a dielectric material layer, a heat-dissipating ceramic block, a securing portion, a stepped metal electrode layer, a power transistor, and a dielectric material packaging, wherein a via hole is formed in the dielectric material layer, the heat-dissipating ceramic block is correspondingly embedded in the via hole, the heat-dissipating ceramic block has a thermal conductivity higher than that of the dielectric material layer and a thickness less than that of the dielectric material layer, the stepped metal electrode layer conducts electricity and heat for the power transistor, the dielectric material packaging is configured to partially expose the source connecting pin, drain connecting pin, and gate connecting pin of the encapsulated stepped metal electrode layer.
    Type: Application
    Filed: September 29, 2022
    Publication date: April 4, 2024
    Inventors: HO-CHIEH YU, CHEN-CHENG-LUNG LIAO, CHUN-YU LIN, JASON AN CHENG HUANG, CHIH-CHUAN LIANG, KUN-TZU CHEN, NAI-HIS HU, LIANG-YO CHEN
  • Publication number: 20240106119
    Abstract: An antenna includes a patch radiator, a feed point, a first ground point, and a second ground point. The patch radiator has a first side edge and an intersecting second side edge, and a first coupling contact and a second coupling contact. The patch radiator is coupled to the first ground point and the second ground point through the first coupling contact and the second coupling contact, and is biased coupled to the feed point. A distance between the first coupling contact and the first side edge, a distance between the first coupling contact and the second side edge, a distance between the second coupling contact and the first side edge, and a distance between the second coupling contact and the second side edge are all greater than or equal to 0.05?, where ? is an operating wavelength of the antenna in an operating frequency band range of the antenna.
    Type: Application
    Filed: December 10, 2021
    Publication date: March 28, 2024
    Inventors: Dong Yu, Jiaming Wang, Liang Xue, Yuanpeng Li, Hanyang Wang, Meng Hou
  • Patent number: 11942433
    Abstract: In an embodiment, a structure includes: a first integrated circuit die including first die connectors; a first dielectric layer on the first die connectors; first conductive vias extending through the first dielectric layer, the first conductive vias connected to a first subset of the first die connectors; a second integrated circuit die bonded to a second subset of the first die connectors with first reflowable connectors; a first encapsulant surrounding the second integrated circuit die and the first conductive vias, the first encapsulant and the first integrated circuit die being laterally coterminous; second conductive vias adjacent the first integrated circuit die; a second encapsulant surrounding the second conductive vias, the first encapsulant, and the first integrated circuit die; and a first redistribution structure including first redistribution lines, the first redistribution lines connected to the first conductive vias and the second conductive vias.
    Type: Grant
    Filed: January 17, 2022
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Jen-Fu Liu, Ming Hung Tseng, Tsung-Hsien Chiang, Yen-Liang Lin, Tzu-Sung Huang
  • Publication number: 20240096825
    Abstract: A bond head is provided. The bond head includes a bond base, a chuck member, and an elastic material. The chuck member protrudes from a surface of the bond base, and has a chuck surface formed with vacuum holes for holding a die using differential air pressure. In the direction parallel to the chuck surface, the width of the chuck surface is less than the width of the bond base and is equal to or greater than the width of the die. The elastic material is disposed over the chuck surface. The elastic material is arranged around the periphery of the chuck surface to cover edges and/or corners of the chuck surface.
    Type: Application
    Filed: February 8, 2023
    Publication date: March 21, 2024
    Inventors: Chen-Hua YU, Chih-Hang TUNG, Kuo-Chung YEE, Yian-Liang KUO, Jiun-Yi WU
  • Patent number: 11933372
    Abstract: An engagement and disengagement device used in a seat belt retractor including a first rotating member capable of being driven to rotate about a rotation axis thereof, a second rotating member provided coaxially with the first rotating member and connected to a reel of the seat belt retractor in an anti-torsion manner, and a transmission member provided between the first and second rotating member. The first rotating member is capable of transmitting torque to the second rotating member by means of the transmission member. The transmission member includes a holder and a transmission element in the holder. A first elastic component elastically holds the transmission element by radially exerting a force that enables the transmission element to be located away from the first or the second rotating member, and the first elastic component is integrated on the holder.
    Type: Grant
    Filed: December 25, 2020
    Date of Patent: March 19, 2024
    Assignee: AUTOLIV DEVELOPMENT AB
    Inventors: Liang Ge, Licheng Yu
  • Patent number: 11935760
    Abstract: A package structure includes a first thermal dissipation structure, a first semiconductor die, a second semiconductor die. The first thermal dissipation structure includes a semiconductor substrate, conductive vias embedded in the semiconductor substrate, first capacitors electrically connected to the conductive vias, and a thermal transmission structure disposed over the semiconductor substrate and the conductive vias. The first semiconductor die is disposed on the first thermal dissipation structure. The second semiconductor die is disposed on the first semiconductor die opposite to the first thermal dissipation structure.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Yian-Liang Kuo, Kuo-Chung Yee
  • Patent number: 11935602
    Abstract: A memory device might include a controller configured to cause the memory device to generate a first sum of expected peak current magnitudes for a plurality of memory devices, and generate a second sum of expected peak current magnitudes for a subset of the plurality of memory devices, if the memory device were to initiate a next phase of an access operation in a selected operating mode; to compare the first sum to a first current demand budget for the plurality of the memory devices; to compare the second sum to a second current demand budget for the subset of memory devices; and to initiate the next phase of the access operation in the selected operating mode in response to the first sum being less than or equal to the first current demand budget and the second sum being less than or equal to the second current demand budget.
    Type: Grant
    Filed: May 6, 2022
    Date of Patent: March 19, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Liang Yu, Jeremy Binfet
  • Patent number: 11936571
    Abstract: Examples described herein relate to offload reliable transport management to a network interface device and store packets to be resent, based on received packet receipt acknowledgements (ACKs), into one or more kernel space queues that are also accessible in user space.
    Type: Grant
    Filed: November 4, 2022
    Date of Patent: March 19, 2024
    Assignee: Intel Corporation
    Inventors: Shaopeng He, Cunming Liang, Jiang Yu, Ziye Yang, Ping Yu, Bo Cui, Jingjing Wu, Liang Ma, Hongjun Ni, Zhiguo Wen, Changpeng Liu, Anjali Singhai Jain, Daniel Daly, Yadong Li
  • Publication number: 20240085581
    Abstract: The present disclosure provides a device for full-wave field seismic source based on a gas explosion technology and a method for acquiring seismic data. The device includes a cylindrical explosion-proof metal outer barrel, and four sides of the explosion-proof metal outer barrel are fixedly connected to four high-strength steel plates. The device also includes a cylindrical explosion-proof metal gas explosion inner barrel and pipelines for injecting high-pressure air and high-pressure gas into the gas explosion inner barrel. A center of the gas explosion inner barrel is installed with an electronic ignition gun, which is connected to a GPS timing module connected to the electronic ignition gun. The device further includes a controller configured to control a seismic source of a gas explosion full-wave field.
    Type: Application
    Filed: November 6, 2023
    Publication date: March 14, 2024
    Applicants: BGP INC., CHINA NATIONAL PETROLEUM CORPORATION, OPTICAL SCIENCE AND TECHNOLOGY (CHENGDU) LTD.
    Inventors: Liang GOU, Gang YU, Maojun YANG, Ximing WANG
  • Patent number: 11928343
    Abstract: A variety of applications can include a memory device having a memory die designed to control a power budget for a cache and a memory array of the memory die. A first flag received from a data path identifies a start of a cache operation on the data and a second flag from the data path identifies an end of the cache operation. A controller for peak power management can be implemented to control the power budget based on determination of usage of current associated with the cache from the first and second flags. In various embodiments, the controller can be operable to feedback a signal to a memory controller external to the memory die to adjust an operating speed of an interface from the memory controller to the memory die. Additional devices, systems, and methods are discussed.
    Type: Grant
    Filed: November 8, 2022
    Date of Patent: March 12, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Liang Yu, Jonathan Scott Parry, Luigi Pilolli
  • Publication number: 20240066814
    Abstract: A method of manufacturing a decorated molding article includes: forming an all-in-one coating on a substrate and performing a curing step, thereby forming a composite layer structure with a protective effect, a color effect, and a bonding effect. Compared with the printing layer in the conventional In Mold Label (IML) and InSert molding (INS) that is made by a plurality of anti-impact and bonding processes, the composite layer structure of the embodiment can form a molded film with better physical properties (e.g., higher hardness, better protection effect, etc.) after the blister molding process. Therefore, the molded film of the embodiment can be applied to a laser engraving process to form a variety of light-transmitting decorative molded products. Further, the present disclosure further forms a protective layer locally in the grooves formed after the laser engraving process, so as to protect the texture after the laser engraving process from damage.
    Type: Application
    Filed: February 9, 2023
    Publication date: February 29, 2024
    Applicant: Jin Ya Dian Technology Co.,Ltd.
    Inventors: Che-Ming Yu, Kuo-Liang Ying
  • Publication number: 20240066769
    Abstract: Provided is a decorated molding article includes a workpiece and a molded film attached to an outer surface of the workpiece or an inner surface of the workpiece. Compared with the printing layer in the conventional In Mold Label (IML) and InSert molding (INS) that is made by a plurality of anti-impact and bonding processes, a plurality of stacked decorative layers of the embodiment not only provide various color effects, but also directly combined with injection molding material to form part products and have both a protection effect and an adhesive effect. Further, the present disclosure can effectively simplify the manufacturing steps of the composite layer structure and reduce the manufacturing cost.
    Type: Application
    Filed: June 28, 2023
    Publication date: February 29, 2024
    Applicant: Jin Ya Dian Technology Co.,Ltd.
    Inventors: Che-Ming Yu, Kuo-Liang Ying
  • Publication number: 20240067728
    Abstract: The present invention provides a bispecific antibody and use thereof, and the bispecific antibody or an antigen-binding fragment of the present invention can bind to two or more antigens or two or more epitopes of a same antigen. The antibody or the antigen-binding fragment of the present invention can be used to treat a variety of diseases, such as inflammatory diseases, autoimmune diseases, cancers or spinal cord injury, and can also be used for diagnosis and prognosis of related diseases.
    Type: Application
    Filed: November 5, 2021
    Publication date: February 29, 2024
    Inventors: Yifan CHEN, Qiulian LIANG, Shujun PEI, Jin-Chen YU, Shengfeng LI
  • Publication number: 20240069299
    Abstract: An optical element driving mechanism includes a movable assembly, a fixed assembly, and a driving assembly. The movable assembly is configured to be connected to an optical element. The movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly in a range of motion. The optical element driving mechanism further includes a positioning assembly configured to position the movable assembly at a predetermined position relative to the fixed assembly when the driving assembly is not operating.
    Type: Application
    Filed: November 9, 2023
    Publication date: February 29, 2024
    Inventors: Chao-Chang HU, Kuen-Wang TSAI, Liang-Ting HO, Chao-Hsi WANG, Chih-Wei WENG, He-Ling CHANG, Che-Wei CHANG, Sheng-Zong CHEN, Ko-Lun CHAO, Min-Hsiu TSAI, Shu-Shan CHEN, Jungsuck RYOO, Mao-Kuo HSU, Guan-Yu SU
  • Publication number: 20240072019
    Abstract: An electronic package is provided, in which an electronic module and a plurality of conductive pillars are embedded in an encapsulation layer, and a circuit structure is formed on the encapsulation layer, where the electronic module includes a carrier structure having conductive vias and at least a first electronic element disposed on the carrier structure. The first electronic element has a plurality of conductors in a form of conductive through-silicon vias, and at least a second electronic element is disposed on the circuit structure. Therefore, the design of the electronic module can reduce the layout area occupied by the electronic element on a surface of a packaging zone of the circuit structure, such that other functional elements can be added to the electronic package according to requirements, and the electronic package can improve functional requirements of the end product.
    Type: Application
    Filed: October 27, 2022
    Publication date: February 29, 2024
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chung-Yu Ke, Liang-Pin Chen
  • Patent number: 11916022
    Abstract: Various embodiments of the present disclosure are directed towards a semiconductor processing system including an overlay (OVL) shift measurement device. The OVL shift measurement device is configured to determine an OVL shift between a first wafer and a second wafer, where the second wafer overlies the first wafer. A photolithography device is configured to perform one or more photolithography processes on the second wafer. A controller is configured to perform an alignment process on the photolithography device according to the determined OVL shift. The photolithography device performs the one or more photolithography processes based on the OVL shift.
    Type: Grant
    Filed: June 7, 2022
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yeong-Jyh Lin, Ching I Li, De-Yang Chiou, Sz-Fan Chen, Han-Jui Hu, Ching-Hung Wang, Ru-Liang Lee, Chung-Yi Yu
  • Publication number: 20240061592
    Abstract: A method includes receiving a request to perform a memory access operation, wherein the memory access operation includes a set of sub-operations, selecting a current quantization data structure from a plurality of current quantization data structures, wherein each current quantization data structure of the plurality of current quantization data structures maintains, for each sub-operation of the set of sub-operations, a respective current quantization value reflecting an amount of current that is consumed by the respective sub-operation based on a set of peak power management (PPM) operation parameters, and causing the memory access operation to be performed using PPM based on the current quantization data structure.
    Type: Application
    Filed: August 8, 2023
    Publication date: February 22, 2024
    Inventors: Chulbum Kim, Jonathan S. Parry, Luca Nubile, Ali Mohammadzadeh, Biagio Iorio, Liang Yu, Jeremy Binfet, Walter Di Francesco, Daniel J. Hubbard, Luigi Pilolli
  • Publication number: 20240061593
    Abstract: A memory device includes memory dies. Each memory die includes a memory array and control logic, operatively coupled with the memory array, to perform operations for implementing peak power management (PPM) data burst communication. The operations include monitoring a data burst with respect to the memory array, detecting a current reservation trigger associated with the data burst, in response detecting the current reservation trigger, reserving an initial amount of current reflecting a maximum current consumption value associated with a maximum data transfer speed of the data burst, detecting a plurality of input/output cycles of the data burst following the preamble period, and in response to detecting the number of input/output cycles, reserving, based on an analysis of the plurality of input/output cycles, a subsequent amount of current reflecting an actual current consumption value associated with an actual data transfer speed of the data burst.
    Type: Application
    Filed: August 16, 2023
    Publication date: February 22, 2024
    Inventors: Hojung Yun, Liang Yu, Jonathan S. Parry