Abstract: A semiconductor chip apparatus including a memory having a plurality of memory locations, a memory access element, and an integrity check device configured to store a reference value for a check function over values stored in the memory locations and, in a case of write access to a memory location, configured to update a check value with the value to be written by the write access if the check value represents the value stored in the memory location prior to the write access, and configured to compare the reference value with the check value after the check value has been generated and output a signal depending on a result of the comparison.

Abstract: A sender device includes: a first sequence generator configured to generate a first sequence of bits having a bit pattern that incudes first bit values and second bit values; a first parsing processor configured to receive a first plurality of data blocks and the first sequence of bits, and select a first subset of data blocks and a second subset of data blocks from the first plurality of data blocks based on the bit pattern; an encryption processor configured to encrypt the selected first subset of data blocks received from the first parsing processor to generate encrypted data blocks and output the encrypted data blocks to an output terminal that is configured to output the encrypted data blocks and the selected second subset of data blocks as unencrypted data blocks from the sender device.

Abstract: A portable chip device comprises a chip having an operating system and a loader, the loader being configured to load a software module onto the chip and/or to render the software module in the chip executable, a communications interface configured to communicate with an external reader, the portable chip device being configured to carry out a software module update by: receiving a second key in the loader via communication between the external reader and the communications interface, where the communication is encrypted with a first key, and storing the second key in the loader, the operating system being configured to provide the decryption of the communication encrypted with the first key, authenticating the external reader using the symmetric key stored in the loader, receiving software module update data in the loader via the communications interface, and executing the software module update with the software module update data.

Abstract: In various embodiments. an electronic circuit is provided. The electronic circuit may include at least one memory cell and a control circuit configured to determine a formation state of the at least one memory cell and set a predefined function to a predefined state of executability (e.g., enabled or disabled) based on the determined formation states. For example, the predefined function may be set to the predefined state of executability only if the determined formation states of two or more memory cells match a predefined formation state pattern, or only if a minimum number or fraction of two or memory cells are in a predefined formation state. The formation state is either unformed or formed, wherein the unformed state is an electrically isolated state, and the formed state is a state into which an initially unformed memory cell is transformable and in which the formed memory cell is repeatedly switchable between a state of low electrical resistivity and a state of high electrical resistivity.

Abstract: A sender device includes: a first sequence generator configured to generate a first sequence of bits having a bit pattern that incudes first bit values and second bit values; a first parsing processor configured to receive a first plurality of data blocks and the first sequence of bits, and select a first subset of data blocks and a second subset of data blocks from the first plurality of data blocks based on the bit pattern; an encryption processor configured to encrypt the selected first subset of data blocks received from the first parsing processor to generate encrypted data blocks and output the encrypted data blocks to an output terminal that is configured to output the encrypted data blocks and the selected second subset of data blocks as unencrypted data blocks from the sender device.

Abstract: A data message authentication system in a vehicle communication network includes a sequence generator configured to generate a sequence representative of an intra-message pattern; a parsing processor configured to receive a data message, receive the sequence from the sequence generator, select a subset of data segments from the data message based on the intra-message pattern, and output the selected subset of data segments; and a tag generator configured to receive the selected subset of data segments from the parsing processor and generate an authentication code based on the selected subset of data segments, where the authentication code corresponds to the data message.

Abstract: An authentication system includes a microcontroller having a unique identifier (ID) and a first key pair including a microcontroller secret key and a microcontroller public key. The microcontroller is configured to store the unique ID, the first key pair, a digital signature of the unique ID, the digital signature being generated using an external secret key of a second key pair, and a digital certificate of the microcontroller public key that is signed by the external secret key of the second key pair. The second key pair includes the external secret key and an external public key. The authentication system further includes a controller configured to perform a first authenticity validation check on the unique ID using the external public key and perform a second authenticity validation check on the microcontroller public key using the external public key.

Abstract: An authentication system includes a microcontroller having a unique identifier (ID) and a first key pair including a microcontroller secret key and a microcontroller public key. The microcontroller is configured to store the unique ID, the first key pair, a digital signature of the unique ID, the digital signature being generated using an external secret key of a second key pair, and a digital certificate of the microcontroller public key that is signed by the external secret key of the second key pair. The second key pair includes the external secret key and an external public key. The authentication system further includes a controller configured to perform a first authenticity validation check on the unique ID using the external public key and perform a second authenticity validation check on the microcontroller public key using the external public key.

Abstract: A data message authentication system in a vehicle communication network includes a sequence generator configured to generate a sequence representative of an intra-message pattern; a parsing processor configured to receive a data message, receive the sequence from the sequence generator, select a subset of data segments from the data message based on the intra-message pattern, and output the selected subset of data segments; and a tag generator configured to receive the selected subset of data segments from the parsing processor and generate an authentication code based on the selected subset of data segments, where the authentication code corresponds to the data message.

Abstract: In various embodiments, a chip card module is provided. The chip card module includes a chip card module contact array having six contact pads that are arranged in two rows having three contact pads each in accordance with ISO 7816, and three additional contact pads that are arranged between the two rows. Each additional contact pad is electrically conductively connected to a respective associated contact pad from a row from the two rows.

Abstract: An intermediate servant device connected in a daisy chain configuration with a set of devices is described. The intermediate servant device may be configured to receive, from a previous servant device of the set of servant devices, a request for data, a first response to the request for data, and authentication information for the first response to the request for data. The intermediate servant device may be further configured to generate a second response to the request for data and determine authentication information for the second response based on the authentication information for the first response, the second response, and a key assigned to the intermediate servant device. The intermediate servant device may be further configured to output at least the authentication information for the second response, the first response, and the second response.

Abstract: An intermediate servant device connected in a daisy chain configuration with a set of devices is described. The intermediate servant device may be configured to receive, from a previous servant device of the set of servant devices, a request for data, a first response to the request for data, and authentication information for the first response to the request for data. The intermediate servant device may be further configured to generate a second response to the request for data and determine authentication information for the second response based on the authentication information for the first response, the second response, and a key assigned to the intermediate servant device. The intermediate servant device may be further configured to output at least the authentication information for the second response, the first response, and the second response.

Abstract: Various embodiments provide an input/output module, including: at least one input/output port for the input of data; a signature generator that is coupled to the input/output port and is set up to generate a signature for the data from the data; a reference input, wherein the reference input is set up for the application of a reference signature; and a comparator that is coupled to the signature generator and to the reference input, and is set up to output an alarm signal if the signature of the data on the input/output port differs from the reference signature.

Abstract: In various embodiments, a chip card module is provided. The chip card module includes a chip card module contact array having six contact pads that are arranged in two rows having three contact pads each in accordance with ISO 7816, and three additional contact pads that are arranged between the two rows. Each additional contact pad is electrically conductively connected to a respective associated contact pad from a row from the two rows.

Abstract: In accordance with one embodiment, a chip is provided which includes an interface configured to receive test data and masking data, a processing component having a plurality of scan chains. Each scan chain is configured to generate a test response on the basis of a processing of the test data. The chip further includes a compression circuit configured to compress the test responses generated by the scan chains to form a compressed test response, and a signature generating circuit configured to generate a signature on the basis of the compressed test response, depending on whether the masking data specify that the compressed test response is to be masked.

Abstract: An embedded security module includes a security processor, volatile and non-volatile memory, and an interface. The security processor includes transistors formed in one or more semiconductor layers of a semiconductor die, and implements one or more security-related functions on data and/or code accessed by the security processor. The volatile memory is fabricated on the same semiconductor die as the security processor and stores the data and/or code accessed by the security processor. The non-volatile memory includes non-volatile storage cells disposed above each semiconductor layer of the semiconductor die, and securely stores at least one of the data and/or code accessed by the security processor and security information relating to the data and/or code accessed by the security processor. The interface is fabricated on the same semiconductor die as the security processor and provides a communication interface for the security processor.

Abstract: In a system, there is communication between an electric circuit and a terminal within a scope of a terminal session, wherein the electric circuit has a current consumer for causing additional current consumption, and the terminal has a current consumption meter detecting the current consumption of the electric circuit and coupled to a checker checking authenticity of the electric circuit if the current consumption of the electric circuit has additional current consumption.

Abstract: In various embodiments, a die is provided. The die may include a physical unclonable function circuit configured to provide an output signal, wherein the output signal is dependent on at least one physical characteristic specific to the die; and a self-test circuit integrated with the physical unclonable function circuit on the die, wherein the self-test circuit is configured to provide at least one test input signal to the physical unclonable function circuit and to determine as to whether the output signal provided in response to the at least one test input signal fulfills a predefined criterion.

Abstract: In various embodiments, a chip card is provided. The chip card includes a chip having a memory unit and a control unit, and a coil which is electrically coupled to the control unit and is intended to generate a magnetic field. The control unit and the coil may be set up to simulate a magnetic strip using the generated magnetic field.

Abstract: An apparatus for checking an error detection functionality of a data processing circuit, comprising an arithmetic logic unit, which provides an output datum based on an input datum, and an error detection circuit that executes the error detection functionality and detects an error based on the output datum during correct execution of the error detection functionality, and generates an error signal, if an error is present, which comprises a control circuit that passes the error signal through to an error signal output in a normal operating mode, and blocks the error signal in a checking mode, does not let the error signal pass to the error signal output, influences the arithmetic logic unit, the error detection circuit or the input datum such that the error detection circuit detects an error during correct execution of the error detection functionality, and, if no error signal is received in response to influencing, outputs an alarm signal indicating an incorrect execution of the error detection functionality.