Abstract: An embedded security module includes a security processor, volatile and non-volatile memory, and an interface. The security processor includes transistors formed in one or more semiconductor layers of a semiconductor die, and implements one or more security-related functions on data and/or code accessed by the security processor. The volatile memory is fabricated on the same semiconductor die as the security processor and stores the data and/or code accessed by the security processor. The non-volatile memory includes non-volatile storage cells disposed above each semiconductor layer of the semiconductor die, and securely stores at least one of the data and/or code accessed by the security processor and security information relating to the data and/or code accessed by the security processor. The interface is fabricated on the same semiconductor die as the security processor and provides a communication interface for the security processor.

Abstract: In various embodiments, a die is provided. The die may include a physical unclonable function circuit configured to provide an output signal, wherein the output signal is dependent on at least one physical characteristic specific to the die; and a self-test circuit integrated with the physical unclonable function circuit on the die, wherein the self-test circuit is configured to provide at least one test input signal to the physical unclonable function circuit and to determine as to whether the output signal provided in response to the at least one test input signal fulfills a predefined criterion.

Abstract: Various embodiments provide an input/output module, including: at least one input/output port for the input of data; a signature generator that is coupled to the input/output port and is set up to generate a signature for the data from the data; a reference input, wherein the reference input is set up for the application of a reference signature; and a comparator that is coupled to the signature generator and to the reference input, and is set up to output an alarm signal if the signature of the data on the input/output port differs from the reference signature.

Abstract: A method for supporting a tie of a chip to an electronic apparatus includes generating once a chip-specific characteristic variable in a chip, reading out the chip-specific characteristic variable by the chip, and transmitting characteristic data representing the read-out characteristic variable of the chip to an electronic apparatus.

Abstract: In various embodiments, a method for biometric verification of a person is provided. The method may include detecting a biometric sample of a biometric characteristic of the person, and reading out a stored biometric feature from a data carrier and carrying out a comparison of the stored biometric feature with the detected biometric sample by means of a control unit; wherein at least one data area of the stored biometric feature is altered by means of disturbances, the control unit determines the altered disturbed data area of the stored biometric feature and omits the determined disturbed data areas during the comparison.

Abstract: A compiler system including a compiler configured to compile a source code into a machine language code is presented, so that the machine language code is executable on a processing unit, wherein the processing unit comprises an internal register that is changing its state responsive to an execution of the machine language code. The compiler is configured to encrypt the machine language code based on an encryption function that depends on the state of the internal register.

Abstract: A chip card module including a substrate with a first side and an opposite second side. Contact areas are arranged on the first side, and a first conductor structure is arranged on the second side, the first conductor structure runs from one contact region to one of a another contact region and a second conductor structure, which is connected to the contact areas by means of a through connection in the substrate, so that the first conductor structure runs at least partly in a central region. The chip card module also includes a chip with connections which are arranged over the central region on the second side of the substrate, one of the connections being connected to the one contact region.

Abstract: A method for supporting a tie of a chip to an electronic apparatus includes generating once a chip-specific characteristic variable in a chip, reading out the chip-specific characteristic variable by the chip, and transmitting characteristic data representing the read-out characteristic variable of the chip to an electronic apparatus.

Abstract: A integrated circuit comprises a circuit part to be protected and protective lines located at least one wiring level of the integrated circuit. In addition, the integrated circuit comprises logical gates coupled to the protective lines, whereby a logic circuit is formed, and a processing unit implemented to detect a manipulation of the integrated circuit by applying test patterns to the logic circuit and verifying a logic output value of the logic circuit responsive to the test patterns.

Abstract: A security device including a first external interface; a second external interface; and a security controller connected to said first external interface and said second external interface, said security controller being adapted to validate an access right based on a codeword received via said first interface to perform an encrypted memory access via said second external interface to an external memory coupleable to said second external interface, and to prevent that encrypted memory access via said first external interface or prevent any output of data via said first external interface depending on data received via said second external interface in case of a negative validation.

Abstract: In a module with a controller for a chip card, the controller having first and second I/O pads for data input and output, and the module having one I/O pad. Both of the first and second I/O pads of the controller are connected to only the one I/O pad of the module. In this manner, data output via one of the first and second I/O pads of the controller may be read and monitored by the controller via the other of the first and second I/O pads of the controller.

Abstract: Method and device for creating a starting value for a pseudorandom number generator, having a reader configured to unstably read out an output value from a memory cell and a determiner configured to determine the starting value on the basis of the output value of the memory cell.

Abstract: A circuit arrangement comprising a logic circuit to be tested and a test circuit. The logic circuit comprising logic-circuit-internal combinations configured to generate output data from input data based on a predetermined relationship. The logic circuit is configured to detect whether the relationship is satisfied and to provide an error signal if the relationship is not satisfied. The test circuit is configured to alter logic-circuit-internal combinations, to detect the error signal, and to output an alarm signal if the error signal is not detected upon alteration of the logic-circuit-internal combinations.

Abstract: Some embodiments of a chip module comprise a substrate, a semiconductor chip on the substrate, and a first layer between the substrate and the semiconductor chip, the first layer having high reflectivity for electromagnetic waves. Methods of protecting a chip module from electromagnetic radiation by interposing a protective layer between the chip and the substrate are also disclosed.

Abstract: A circuit arrangement for initializing a random number generator includes a volatile random access memory and an access device for storing and reading information in the random access memory. The information is read out from at least one area of the random access memory as a starting value or read out and transformed into a starting value. Furthermore, the circuit arrangement includes a switching device which is coupled to the access device and decouples the random access memory for a period of time from a supply voltage or a refresh signal. The random number generator is coupled to the access device and generates a random number sequence based on the starting value provided by the access device.

Abstract: Apparatus and method for generating an initial value for a pseudo-random number generator, with an oscillator configured to generate an oscillator signal; and a generator configured to generate the initial value based on the oscillator signal at least during part of a transient of the oscillator.

Abstract: A data storing apparatus that wirelessly transmits data, wherein the apparatus is deformable so as to block wireless transmission of data when the apparatus is in the deformed state.

Abstract: A carrier arrangement having a carrier configured to fix a semiconductor chip, contacts located on the carrier and configured to make contact with the semiconductor chip, and an overvoltage protection in a form of a spark gap arrangement formed between the contacts.

Abstract: An apparatus including a sensor configured to sense a physical quantity, an actuator configured to manipulate the physical quantity in a predefined manner, and a detection circuit configured to output an alarm signal in case the sensor does not react to the manipulation of the physical quantity in an expected way.

Abstract: Checking an error recognition functionality of a memory circuit including a memory that stores a datum, and a check value circuit that executes the error recognition functionality, is performed by a monitoring circuit. The memory circuit provides the datum to the check value circuit, wherein the check value circuit checks the datum provided thereto for errors and outputs an error signal if an error is present. The monitoring circuit is coupled to the check value circuit and influences the check value circuit, the memory circuit or the datum provided to the check value circuit so that the check value circuit discovers an error in a check in a case of correct execution of the error recognition functionality, and outputs an alarm signal if the check value circuit does not output an error signal upon the influence of the monitoring circuit.