Abstract: An apparatus for efficiently and continuously mass-producing a photovoltaic element by a plasma CVD method having an excellent current-voltage characteristic and excellent photoelectric conversion efficiency. The apparatus has a first chamber where raw material gas flows from top to bottom. A second chamber is connected to the first chamber by a separating path and causes the raw material gas to flow from bottom to top along the movement direction of the long substrate.

Abstract: A non-volatile semiconductor memory device enabling reading at high speed has a memory cell array including a plurality of memory cells arranged in a column direction and a row direction, each of the memory cells having first and second non-volatile memory elements that are controlled by one word gate and first and second control gates. One of the first and second non-volatile memory elements stores data, but the other does not function as an element which stores data.

Abstract: A nonvolatile semiconductor storage device includes a memory cell array region in which a plurality of memory cells arranged in a row direction and a column direction, each of the memory cells having first and second MONOS memory cells and being controlled by one word gate and two control gates. The memory cell array region includes a plurality of sectors which are formed by dividing the memory cell array region in the row direction, and the longitudinal direction of the sectors is the column direction. Each of the plurality of sectors includes small blocks which are formed by dividing each of the sectors in the column direction. First to fourth control gate line drivers are arranged in each of local driver areas between which two adjacent small blocks are disposed. The first to fourth control gate drivers set the potentials of the first and second control gates within one corresponding small block, independently of the other small block.

Abstract: A semiconductor device having an isolation region formed in a semiconductor substrate and a capacitance device formed above that isolation region. The capacitance device has a first capacitor conductive layer disposed above the isolation region and a second capacitor conductive layer in the shape of a side wall formed along one side surface of the first capacitor conductive layer. The second capacitor conductive layer is disposed facing the first capacitor conductive layer, with a first capacitor insulating layer interposed.

Abstract: A semiconductor device includes an isolation region which is formed in a semiconductor layer, and a resistance conductive layer which is in a sidewall shape. According to this semiconductor device, the resistance conductive layer having a high resistance can be obtained with a very small area. Thus, a novel semiconductor device including a resistance element can be provided.

Abstract: An image processing device is provided. The image processing device includes a first shift register connected to a line for reading out an image signal that selects a line where a signal in response to carriers accumulated in an accumulation state for generating carriers in the photo diode in response to received light is read out, regarding each line of the matrix by scanning a plurality of lines in a direction that is perpendicular to each line of a matrix and is designated, a second shift register connected to a line for clearing an image signal that selects a line for clearing an image signal where the residual carriers in the solid-state image-pickup element are discharged from the solid-state image-pickup element, and an output circuit that outputs a reset signal to the first shift register when a direction of scanning lines of the matrix is changed.

Abstract: A plate high-frequency electrode for supplying a high-frequency power of the VHF band and a grounding electrode are disposed in opposition to each other at an interval of less than 8 mm in a vacuum vessel; at least a silane-based gas and nitrogen gas as source gases are introduced into a reaction space of the vacuum vessel, and a silicon nitride deposited film is formed with the pressure of the reaction space being kept at 40 to 133. Thereby, a silicon nitride film with good quality can be obtained.

Abstract: To provide an apparatus for forming a deposited film, which is a parallel plate electrode type CVD apparatus, with a discharge vessel receiving a material gas flowing therein and discharging air therefrom, decomposing the material gas by the aid of a plasma generated therein, and depositing the film on the substrate, in which the exhaust port of the material gas exhaust means has an opening wider in the lateral direction than the parallel plate electrode. This structure diminishes the stagnant region of the material gas during the deposited film forming process and controls formation of by-products, to deposit the film uniform in quality and thickness.

Abstract: Sputtering particles emitted from a target are ionized by the Penning ionization process. And the sputtering particles ionized are caused to fly in the direction of the substrate by a magnetic field formed by ambipolar diffusion due to a magnetic field generating means without scattering the particles to deposit the particles on the substrate. The partial pressure of a sputtering discharge gas in a discharge space is set to 1.3 Pa or less and a distance from the target to an ionization space is within twice the mean free path of the partial pressure of the sputtering discharge gas.

Abstract: A non-volatile semiconductor device in which the number of redundant cells is not increased in proportion to the number of simultaneously accessed bits, having a redundant cell layout which prevents an increase in access time. This non-volatile semiconductor memory device has a regular cell array in which a plurality of memory cells are arranged. The regular cell array is divided into N sector regions in the row direction. Each of the N sector regions is divided into n first memory blocks in the row direction. One of the n first memory blocks is a redundant memory block. The (n?1) first memory blocks correspond to (n?1) input/output terminals.

Abstract: A high-speed accessible non-volatile memory device including: a memory cell array which has a plurality of memory cells arranged in a row direction and a column direction, and a precharge voltage supply section. The memory cell has a source region, a drain region, a word gate and a select gate disposed to face a channel region provided between the source region and the drain region, and a non-volatile memory element formed between the word gate and the channel region. The precharge voltage supply section supplies a precharge voltage to all the word gates in the memory cell array during standby mode.

Abstract: In a non-volatile semiconductor memory device of the present invention, in the case of reading information from a second non-volatile memory element of an (i)-th twin memory cell and from a first non-volatile memory element of an (i+1)-th twin memory cell in the row direction, where i is an integer of not less than 1, the process senses an (i?1)-th bit line connecting with a first non-volatile memory element of the (i)-th twin memory cell, so as to detect an electric current running between the (i?1)-th bit line and an (i)-th bit line connecting with the second non-volatile memory element of the (i)-th twin memory cell, via the second non-volatile memory element of the (i)-th twin memory cell.

Abstract: A vacuum-processing apparatus comprising a vacuum vessel, a processing chamber arranged in the vacuum vessel and a heater for heating a circumferential wall of the processing chamber, wherein a substrate is arranged in the processing chamber and the substrate is vacuum-processed in the processing chamber, characterized in that the vacuum-processing apparatus has a cooling plate located outside the processing chamber and arranged at a position to oppose the circumferential wall of the processing chamber for cooling the circumferential wall of the processing chamber, and a mechanism for moving the cooling plate so as to change a distance between the cooling plate and the circumferential wall of the processing chamber. A vacuum-processing method for performing a surface treatment for a substrate using the vacuum-processing apparatus.

Abstract: A deposited film forming apparatus has a power applying electrode disposed above a flat plate type base member grounded, in a vacuum chamber, and a power source for supplying a power to the power applying electrode, the deposited film forming apparatus being constructed to supply the power from the power source to the power applying electrode so as to generate a plasma in a discharge space between the power applying electrode and a substrate disposed in opposition to the power applying electrode in the vacuum chamber and serving as an electrode in a pair with the power applying electrode, thereby decomposing a source gas introduced into the vacuum chamber to form a deposited film on the substrate, wherein the power applying electrode is fixed to the base member with the power applying electrode being isolated from the base member.

Abstract: A method for ionization film formation to form a deposited film by ionizing vaporized particles with an ionization mechanism of the hot-cathode system and injecting the ionized particles into a substrate is provided. The method includes the step of introducing He gas inside the ionization mechanism.

Abstract: A two-layer structured electric power application electrode including a non-split electrode consisting of a single planar plate and six split electrodes arranged on the non-split electrode so as to be electrically in contact with the non-split electrode is arranged on the upper side of a discharge chamber provided within a vacuum container such that the power application electrode faces a strip substrate in parallel. The split electrodes are arranged in such a manner as to form a planar plane, and the distance between the surfaces of the split electrodes facing the strip substrate and the strip substrate is uniform. The total area of the surfaces of the split electrodes facing the strip substrate is the same as the area of the non-split electrode on which the split electrodes are mounted. This improves the uniformity in plasma generated in the apparatus for forming a deposited film and enables cutting-down of the costs required to form deposited films.

Abstract: A substrate-processing method includes at least (a) a step of delivering a web substrate and an interleaf from a substrate delivery bobbin provided in a substrate delivery chamber while the web substrate is transported into a substrate-processing chamber and the interleaf delivered is wound on an interleaf takeup bobbin, and (b) a step of subjecting the web substrate transported into the substrate-processing chamber to desired processing in the substrate-processing chamber. The web substrate processed in the substrate-processing chamber is transported outside the substrate-processing chamber, and transport abnormality of the interleaf in the substrate delivery chamber is detected by a transport abnormality-detecting mechanism.

Abstract: In a non-volatile semiconductor memory device of the present invention, in the case of reading information from a second non-volatile memory element of an (i)-th twin memory cell and from a first non-volatile memory element of an (i+1)-th twin memory cell in the row direction, where i is an integer of not less than 1, the process senses an (i−1)-th bit line connecting with a first non-volatile memory element of the (i)-th twin memory cell, so as to detect an electric current running between the (i−1)-th bit line and an (i)-th bit line connecting with the second non-volatile memory element of the (i)-th twin memory cell, via the second non-volatile memory element of the (i)-th twin memory cell.

Abstract: A non-volatile semiconductor memory device having a memory cell array region in which a plurality of memory cells, each having first and second MONOS memory cells controlled by a word gate and control gates, are arranged in first and second directions. The memory cell array region has a plurality of sector regions divided in the second direction. Each of a plurality of control gate drivers is capable of setting a potential of first and second control gates in the corresponding sector region independently of other sector regions. A plurality of switching elements which select connection/disconnection are formed at connections between a plurality of main bit lines and a plurality of sub bit lines.

Abstract: A nonvolatile semiconductor memory device having a small layout size includes a memory cell array in which a plurality of memory cells are arranged in a row direction and a column direction. The memory cell array includes a plurality of element isolation regions. Each of the memory cells includes a source region, a drain region, a channel region located between the source region and the drain region, a select gate and a word gate disposed to face the channel region, and a nonvolatile memory element formed between the word gate and the channel region. A wordline connection section which connects at least one of a plurality of word gate interconnects in an upper layer with at least one of the word gates is disposed over at least one of the element isolation regions.