Abstract: A gas adsorptive member is disposed in a space communicating with film deposition chambers, and deposition films are deposited while continuously feeding gas components released from this member, thereby enabling the high quality and uniform deposition films to be formed on the substrate with good reproducibility.

Abstract: A method for ionization film formation to form a deposited film by ionizing vaporized particles with an ionization mechanism of the hot-cathode system and injecting the ionized particles into a substrate is provided. The method includes the step of introducing He gas inside the ionization mechanism.

Abstract: A non-volatile semiconductor memory device of the present invention has: a memory cell array that includes multiple twin memory cells arrayed in both a row direction and a column direction; an address generation circuit that generates multiple addresses sequentially varying from a specified address; an access control circuit that regulates operations of at least multiple word lines and multiple bit lines according to the multiple addresses generated by the address generation circuit, so as to control a reading operation of information; and a detection circuit that detects information read via the multiple bit lines.

Abstract: In a discharge space, a substrate 201 and a cathode 206 are disposed a distance d (cm) apart from each other, and gas containing one or more silicon compounds and hydrogen are introduced into the discharge space, and a product Pd of a film forming pressure P (Pa) and d, and a hydrogen flow rate M (SLM) are set so as to meet a relation: 80M+200≦Pd≦160M+333, and an RF power is applied to generate a plasma and a non-monocrystal silicon thin film is formed on the substrate 201 in the discharge space. Thereby, there is provided a thin film formation method making it possible to form an amorphous silicon film in which both a uniform film forming rate of a film distribution facilitating an implementation of a large area and a high conversion efficiency can be obtained while achieving an increase in the film forming rate.

Abstract: An image processing device and method are provided. In a method of reading an image signal from a solid-state image-pickup element where a plurality of unit pixels including a transistor for detecting a light signal and a photo diode are arranged in a matrix, shift data applied to a line for reading out an image signal, which outputs a signal for selecting a line for reading out an image signal, is output to a shift register connected to a line for reading out an image signal, when the number of lines between line for reading out an image signal and line for clearing an image signal are equal to or less than the number of lines in the matrix and the condition for picking an image up is changed.

Abstract: In a deposited-film-forming method of forming a compound film on a substrate by a chemical reaction between the particles of a raw material emitted from a raw material particle generation source opposed to the substrate in the direction of the substrate, and the atoms of a reactive gas supplied to a flying space of the particles of the raw material, the space being interposed between the substrate and the raw material particle source, the atoms of a rare gas in an excited state are supplied to the flying space of the particles of the raw material, in order to ionize the atoms of the reactive gas and the particles of the raw material and thereby induce the chemical reaction.

Abstract: A voltage generation section, which generates voltages for driving the control gates in a plurality of nonvolatile memory cells, has a booster circuit and a voltage control circuit. The voltage control circuit has a plurality of voltage output terminals, and switches and outputs a plurality of voltages inputted from the booster circuit to a plurality of voltage output terminals in accordance with a selection state of the nonvolatile memory cell. The voltage control circuit pre-drives a control gate line by outputting a maximum voltage among the voltages to all of the voltage output terminals in a pre-drive period. A disconnection state, in which no voltage from the booster circuit is outputted, is set in a period prior to the pre-drive period, and a power supply voltage may be outputted instead of the voltage from the booster circuit.

Abstract: A plasma-processing apparatus having a high frequency power application electrode in which a plasma is generated by supplying a VHF power to said high frequency power application electrode, characterized in that said plasma-processing apparatus has an impedance matching equipment comprising a capacitive element and an inductive element which are mutually connected in series connection and which is arranged such that said capacitive element and said inductive element of said impedance matching equipment are symmetrical to the center of said high frequency power application electrode.

Abstract: There is disclosed an exhaust processing process of a processing apparatus for processing a substrate or a film, which comprises after the processing of the substrate or the film, introducing a non-reacted gas and/or a by-product into a trap means comprising a filament comprised of a high-melting metal material comprising as a main component at least one of tungsten, molybdenum and rhenium; and processing the non-reacted gas and/or the by-product inside the trap means. This makes it possible to prevent lowering in exhaust conductance to lengthen the maintenance cycle of the processing apparatus, and to provide a high-quality product (processed substrate or film).

Abstract: A high-speed accessible non-volatile memory device including: a memory cell array which has a plurality of memory cells arranged in a row direction and a column direction, and a precharge voltage supply section. The memory cell has a source region, a drain region, a word gate and a select gate disposed to face a channel region provided between the source region and the drain region, and a non-volatile memory element formed between the word gate and the channel region. The precharge voltage supply section supplies a precharge voltage to all the word gates in the memory cell array during standby mode.

Abstract: An ink cartridge for an ink jet printer having a housing having at least one wall. The ink cartridge further has at least two ink chambers for containing different ink accommodated in the housing. Ink supply ports are formed in one wall of the housing within each of the ink chambers. Each of the ink supply ports has an inner opening and an outer opening. The distance from the inner opening of a first ink supply port to that of a second ink supply port adjacent to the first ink supply port is different from a second distance from the outer opening of the first ink supply opening to that of the second ink supply port.

Abstract: The surface shape of a power-applying electrode is altered in agreement with the curving of a substrate so that the electrode-substrate distance can be kept at a constant value. This enables formation of thin films having uniform film thickness in the substrate width direction even when the electrode-substrate distance is shortened in order to make film formation rate higher in deposited-film formation apparatus of a roll-to-roll system.

Abstract: A non-volatile semiconductor memory device has a memory cell array region in which a plurality of memory cells, each of the memory cells having first and second MONOS memory cells, are arranged. A control gate drive section has a plurality of control gate drivers. A plurality of switching elements are provided at connections between a plurality of main bit lines and a plurality of sub bit lines. Each of the sub bit lines has a projecting portion at one end. The projecting portion has a large-width region having a width greater than the width of each of the sub bit lines in a region in which the memory cells are formed.

Abstract: A nonvolatile semiconductor memory device prevents the voltage from dropping in a voltage raising circuit at the switching time of a control gate voltage at an address changing time. This nonvolatile semiconductor memory device has a voltage generation section which generates voltages for driving the control gates in a plurality of nonvolatile memory cells. The voltage generation section has the voltage raising circuit and a voltage control circuit. The voltage control circuit has a plurality of voltage input terminals and a plurality of voltage output terminals, and switches and outputs a plurality of voltages inputted from the voltage raising circuit through the voltage input terminals to the voltage output terminals in accordance with a selection state of then on volatile memory cells.

Abstract: In a plasma processing method, on a back side of a cathode electrode is provided at least one conductor plate d.c. potentially insulated from the cathode electrode and an opposing electrode, and the cathode electrode and the conductor plate are enclosed with a shielding wall such that a ratio of an inter-electrode coupling capacitance provided by the cathode electrode and the opposing electrode to a coupling capacitance provided by the cathode electrode and a bottom surface of the shielding wall on the back side of the conductor plate is not less than a predetermined value. Thereby, a high-quality, high-speed plasma processing is realized.

Abstract: A nonvolatile semiconductor memory device which reduces the characteristic difference depending on the cell position, occurring between a cell current from a regular memory cell and a reference cell current, has a regular cell array and a reference cell array. The regular cell array has M numbers of large blocks formed by dividing the regular cell array in a column direction. Each of the M numbers of large blocks has m numbers of small blocks formed by finely dividing each of the large blocks in the column direction. The number and arrangement of the reference memory cells within the reference cell array is coincident with the number and arrangement of the memory cells arranged in the small block as a minimum unit for cell-array manufacture process.

Abstract: When data is read from one of the memory elements in a memory cell [i] in a reverse read mode, a word line WL1 is set at a supply voltage Vdd, a control gate CG [i+1] is set at 1.5V, and a control gate CG [i] is set at an override voltage (for example, 3V). When a bit line BL [I+1] is 0V and a bit line BL [i] is connected to a sense amplifier, the gate voltage BS0 of a bit line selection transistor located midway of the bit line BL [i] is set at a high voltage (for example, 4.5V), in order to ensure current which flows through the bit line BL [i] connected to the drain of the memory cell [i].

Abstract: A deposited film forming apparatus is provided which has a power applying electrode disposed above a flat plate type base member grounded, in a vacuum chamber, and a power source for supplying a power to the power applying electrode, the deposited film forming apparatus being constructed to supply the power from the power source to the power applying electrode so as to generate a plasma in a discharge space between the power applying electrode and a substrate disposed in opposition to the power applying electrode in the vacuum chamber and serving as an electrode in a pair with the power applying electrode, thereby decomposing a source gas introduced into the vacuum chamber to form a deposited film on the substrate, wherein the power applying electrode is fixed to the base member with the power applying electrode being isolated from the base member. A deposited film forming method using the apparatus is also provided.

Abstract: A plate high-frequency electrode for supplying a high-frequency power of the VHF band and a grounding electrode are disposed in opposition to each other at an interval of less than 8 mm in a vacuum vessel; at least a silane-based gas and nitrogen gas as source gases are introduced into a reaction space of the vacuum vessel, and a silicon nitride deposited film is formed with the pressure of the reaction space being kept at 40 to 133. Thereby, a silicon nitride film with good quality can be obtained.

Abstract: A two-layer structured electric power application electrode including a non-split electrode consisting of a single planar plate and six split electrodes arranged on the non-split electrode so as to be electrically in contact with the non-split electrode is arranged on the upper side of a discharge chamber provided within a vacuum container such that the power application electrode faces a strip substrate in parallel. The split electrodes are arranged in such a manner as to form a planar plane, and the distance between the surfaces of the split electrodes facing the strip substrate and the strip substrate is uniform. The total area of the surfaces of the split electrodes facing the strip substrate is the same as the area of the non-split electrode on which the split electrodes are mounted. This improves the uniformity in plasma generated in the apparatus for forming a deposited film and enables cutting-down of the costs required to form deposited films.