Patents by Inventor Masahiro Sugimoto

Masahiro Sugimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8608298
    Abstract: Provided is a printing apparatus in which bubbles in a print head are easily removed. The printing apparatus includes a first one-way valve disposed between the pump and the ink tank in the collection channel, the first one-way valve allowing movement of ink from the pump to the ink tank and blocking movement of ink from the ink tank to the pump; a circulation channel that connects the ink tank to the collection channel at a position between the pump and the first one-way valve, the circulation channel enabling circulation of ink from the ink tank, through the print head, and to the ink tank; and a second one-way valve disposed in the circulation channel, the second one-way valve allowing movement of ink from the ink tank to the pump and blocking movement of ink from the pump to the ink tank.
    Type: Grant
    Filed: April 14, 2011
    Date of Patent: December 17, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yuji Kanome, Hiroyuki Tanaka, Yoshiaki Suzuki, Seiji Suzuki, Masahiro Sugimoto, Takeaki Nakano, Susumu Hirosawa
  • Publication number: 20130330749
    Abstract: A normal person (i.e. a control) and liver diseases such as drug induced liver injury, an asymptomatic hepatitis B carrier, an asymptomatic hepatitis C carrier, chronic hepatitis B, chronic hepatitis C, liver cancer, a nonalcoholic fatty liver disease (NAFLD), nonalcoholic steatohepatitis (NASH), and simple steatosis (SS) are identified by measuring the concentrations of ?-Glu-X (X represents an amino acid or an amine) peptides or the levels of AST or ALT in blood and carrying out, for example, a multiple logistic regression based on the measured value.
    Type: Application
    Filed: August 15, 2013
    Publication date: December 12, 2013
    Inventors: Masahiro SUGIMOTO, Tomoyoshi SOGA
  • Publication number: 20130330896
    Abstract: A manufacturing method of a silicon carbide semiconductor device includes: forming a drift layer on a silicon carbide substrate; forming a base layer on or in a surface portion of the drift layer; forming a source region in a surface portion of the base layer; forming a trench to penetrate the base layer and to reach the drift layer; forming a gate electrode on a gate insulation film in the trench; forming a source electrode electrically connected to the source region and the base layer; and forming a drain electrode on a back surface of the substrate. The forming of the trench includes: flattening a substrate surface; and etching to form the trench after flattening.
    Type: Application
    Filed: September 4, 2012
    Publication date: December 12, 2013
    Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATION
    Inventors: Shinichiro Miyahara, Toshimasa Yamamoto, Hidefumi Takaya, Masahiro Sugimoto, Yukihiko Watanabe, Narumasa Soejima, Tsuyoshi Ishikawa
  • Patent number: 8575689
    Abstract: An SiC semiconductor device includes a substrate, a drift layer, a base region, a source region, a trench, a gate oxide film, a gate electrode, a source electrode and a drain electrode. The substrate has a Si-face as a main surface. The source region has the Si-face. The trench is provided from a surface of the source region to a portion deeper than the base region and extends longitudinally in one direction and has a Si-face bottom. The trench has an inverse tapered shape, which has a smaller width at an entrance portion than at a bottom, at least at a portion that is in contact with the base region.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: November 5, 2013
    Assignees: DENSO CORPORATION, Toyota Jidosha Kabushiki Kaisha
    Inventors: Tomohiro Mimura, Shinichiro Miyahara, Hidefumi Takaya, Masahiro Sugimoto, Narumasa Soejima, Tsuyoshi Ishikawa, Yukihiko Watanabe
  • Publication number: 20130286427
    Abstract: A printer includes a storage portion, a printing portion, and a processor. The processor is configured to control the printer to cause the storage portion to store job identification information and device identification information that have been received from the device, cause the printing portion to perform printing based on the printing data that have been received from the device, specify a printing result for the printing job and transmit a result information record to the device that has transmitted a request command. The result information record includes the specified printing result and also includes the job identification information and the device identification information that are stored in the storage portion, to the device that has transmitted a request command.
    Type: Application
    Filed: March 14, 2013
    Publication date: October 31, 2013
    Applicant: BROTHER KOGYO KABUSHIKI KAISHA
    Inventors: Yoshitsugu TOMOMATSU, Masahiro SUGIMOTO
  • Patent number: 8523345
    Abstract: An apparatus includes a humidifying unit that generates humidified gas, a drying unit that dries ink applied to a sheet by a recording unit, a first duct that supplies gas discharged from the drying unit to at least one of the humidifying unit and the recording unit, and a second duct that supplies the humidified gas generated by the humidifying unit to the recording unit.
    Type: Grant
    Filed: October 12, 2010
    Date of Patent: September 3, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yoshiaki Suzuki, Yuji Kanome, Seiji Suzuki, Hiroyuki Tanaka, Takeaki Nakano, Masahiro Sugimoto, Susumu Hirosawa
  • Patent number: 8525223
    Abstract: A SiC semiconductor device includes: a SiC substrate including a first or second conductive type layer and a first conductive type drift layer and including a principal surface having an offset direction; a trench disposed on the drift layer and having a longitudinal direction; and a gate electrode disposed in the trench via a gate insulation film. A sidewall of the trench provides a channel formation surface. The vertical semiconductor device flows current along with the channel formation surface of the trench according to a gate voltage applied to the gate electrode. The offset direction of the SiC substrate is perpendicular to the longitudinal direction of the trench.
    Type: Grant
    Filed: April 19, 2012
    Date of Patent: September 3, 2013
    Assignees: DENSO CORPORATION, Toyota Jidosha Kabushiki Kaisha
    Inventors: Hiroki Watanabe, Shinichiro Miyahara, Masahiro Sugimoto, Hidefumi Takaya, Yukihiko Watanabe, Narumasa Soejima, Tsuyoshi Ishikawa
  • Patent number: 8518809
    Abstract: A manufacturing method of an SiC single crystal includes preparing an SiC substrate, implanting ions into a surface portion of the SiC substrate to form an ion implantation layer, activating the ions implanted into the surface portion of the SiC substrate by annealing, chemically etching the surface portion of the SiC substrate to form an etch pit that is caused by a threading screw dislocation included in the SiC substrate and performing an epitaxial growth of SiC to form an SiC growth layer on a surface of the SiC substrate including an inner wall of the etch pit in such a manner that portions of the SiC growth layer grown on the inner wall of the etch pit join with each other.
    Type: Grant
    Filed: December 1, 2011
    Date of Patent: August 27, 2013
    Assignee: DENSO CORPORATION
    Inventors: Hiroki Watanabe, Yasuo Kitou, Yasushi Furukawa, Kensaku Yamamoto, Hidefumi Takaya, Masahiro Sugimoto, Yukihiko Watanabe, Narumasa Soejima, Tsuyoshi Ishikawa
  • Patent number: 8492867
    Abstract: A semiconductor device includes a semiconductor substrate and an electric field terminal part. The semiconductor substrate includes a substrate, a drift layer disposed on a surface of the substrate, and a base layer disposed on a surface of the drift layer. The semiconductor substrate is divided into a cell region in which a semiconductor element is disposed and a peripheral region that surrounds the cell region. The base region has a bottom face located on a same plane throughout the cell region and the peripheral region and provides an electric field relaxing layer located in the peripheral region. The electric field terminal part surrounds the cell region and a portion of the electric field relaxing layer and penetrates the electric field relaxing layer from a surface of the electric field relaxing layer to the drift layer.
    Type: Grant
    Filed: June 20, 2011
    Date of Patent: July 23, 2013
    Assignees: DENSO CORPORATION, Toyota Jidosha Kabushiki Kaisha
    Inventors: Kensaku Yamamoto, Naohiro Suzuki, Hidefumi Takaya, Masahiro Sugimoto, Jun Morimoto, Narumasa Soejima, Tsuyoshi Ishikawa, Yukihiko Watanabe
  • Patent number: 8454118
    Abstract: A supply unit is provided to supply humidified gas near a nozzle array of a line-type recording head. The flow-rate distribution of the supplied humidified gas in a direction of the nozzle array is changeable in accordance with a conveying region where a sheet is conveyed while opposing the nozzle array.
    Type: Grant
    Filed: October 1, 2010
    Date of Patent: June 4, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Akira Kida, Masahiro Sugimoto, Yuji Kanome, Hiroyuki Tanaka, Yoshiaki Suzuki, Seiji Suzuki, Takeaki Nakano, Susumu Hirosawa
  • Publication number: 20130116148
    Abstract: Disclosed is a method for promptly identifying a liver disease. A normal person or a liver disease such as drug-induced liver injury, asymptomatic hepatitis B carrier, chronic hepatitis B, hepatitis C with persistently normal ALT, chronic hepatitis C, cirrhosis type C, hepatocellular carcinoma, simple steatosis, or non-alcoholic steatohepatitis is identified by measuring the concentration of a ?-Glu-X (wherein X represents an amino acid or an amine) peptide or the level of AST or ALT in blood and carrying out, for example, a multiple logistic regression based on the measured value.
    Type: Application
    Filed: May 17, 2011
    Publication date: May 9, 2013
    Applicant: KEIO UNIVERSITY
    Inventors: Tomoyoshi Soga, Masahiro Sugimoto, Makoto Suematsu, Takafumi Saito, Sumio Kawata
  • Patent number: 8356880
    Abstract: In order to efficiently perform preliminary ejection of ink at a bend of an ink circulation passage, the number of preliminary ejections of a nozzle group located on the outer side of the bend is set larger than the number of preliminary ejections of a nozzle group located in the middle of the bend.
    Type: Grant
    Filed: February 23, 2011
    Date of Patent: January 22, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Susumu Hirosawa, Yuji Kanome, Hiroyuki Tanaka, Yoshiaki Suzuki, Masahiro Sugimoto, Seiji Suzuki, Takeaki Nakano
  • Publication number: 20130001592
    Abstract: In a silicon carbide semiconductor device, a plurality of trenches has a longitudinal direction in one direction and is arranged in a stripe pattern. Each of the trenches has first and second sidewalls extending in the longitudinal direction. The first sidewall is at a first acute angle to one of a (11-20) plane and a (1-100) plane, the second sidewall is at a second acute angle to the one of the (11-20) plane and the (1-100) plane, and the first acute angle is smaller than the second acute angle. A first conductivity type region is in contact with only the first sidewall in the first and second sidewalls of each of the trenches, and a current path is formed on only the first sidewall in the first and second sidewalls.
    Type: Application
    Filed: June 25, 2012
    Publication date: January 3, 2013
    Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATION
    Inventors: Shinichiro Miyahara, Masahiro Sugimoto, Hidefumi Takaya, Yukihiko Watanabe, Narumasa Soejima, Tsuyoshi Ishikawa
  • Publication number: 20120319136
    Abstract: A SiC device includes an inversion type MOSFET having: a substrate, a drift layer, and a base region stacked in this order; source and contact regions in upper portions of the base region; a trench penetrating the source and base regions; a gate electrode on a gate insulating film in the trench; a source electrode coupled with the source and base region; a drain electrode on a back of the substrate; and multiple deep layers in an upper portion of the drift layer deeper than the trench. Each deep layer has an impurity concentration distribution in a depth direction, and an inversion layer is provided in a portion of the deep layer on the side of the trench under application of the gate voltage.
    Type: Application
    Filed: February 6, 2012
    Publication date: December 20, 2012
    Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATION
    Inventors: Masato Noborio, Kensaku Yamamoto, Hideo Matsuki, Hidefumi Takaya, Masahiro Sugimoto, Narumasa Soejima, Tsuyoshi Ishikawa, Yukihiko Watanabe
  • Patent number: 8334541
    Abstract: A SiC semiconductor device includes a reverse type MOSFET having: a substrate; a drift layer and a base region on the substrate; a base contact layer and a source region on the base region; multiple trenches having a longitudinal direction in a first direction penetrating the source region and the base region; a gate electrode in each trench via a gate insulation film; an interlayer insulation film covering the gate electrode and having a contact hole, through which the source region and the base contact layer are exposed; a source electrode coupling with the source region and the base region through the contact hole; a drain electrode on the substrate. The source region and the base contact layer extend along with a second direction perpendicular to the first direction, and are alternately arranged along with the first direction. The contact hole has a longitudinal direction in the first direction.
    Type: Grant
    Filed: July 7, 2011
    Date of Patent: December 18, 2012
    Assignees: DENSO CORPORATION, Toyota Jidosha Kabushiki Kaisha
    Inventors: Shinichiro Miyahara, Hidefumi Takaya, Masahiro Sugimoto, Jun Morimoto, Yukihiko Watanabe
  • Publication number: 20120273801
    Abstract: A SiC semiconductor device includes: a SiC substrate including a first or second conductive type layer and a first conductive type drift layer and including a principal surface having an offset direction; a trench disposed on the drift layer and having a longitudinal direction; and a gate electrode disposed in the trench via a gate insulation film. A sidewall of the trench provides a channel formation surface. The vertical semiconductor device flows current along with the channel formation surface of the trench according to a gate voltage applied to the gate electrode. The offset direction of the SiC substrate is perpendicular to the longitudinal direction of the trench.
    Type: Application
    Filed: April 19, 2012
    Publication date: November 1, 2012
    Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATION
    Inventors: Hiroki WATANABE, Shinichiro MIYAHARA, Masahiro SUGIMOTO, Hidefumi TAKAYA, Yukihiko WATANABE, Narumasa SOEJIMA, Tsuyoshi ISHIKAWA
  • Patent number: 8299498
    Abstract: A semiconductor device 10 is provided with a first hetero junction 40b configured with two types of nitride semiconductors having different bandgap energy from each other, a second hetero junction 50b configured with two types of nitride semiconductors having different bandgap energy from each other, and a gate electrode 58 facing the second hetero junction 50b. The second hetero junction 50b is configured to be electrically connected to the first hetero junction 40b. The first hetero junction 40b is a c-plane and the second hetero junction 50b is either an a-plane or an m-plane.
    Type: Grant
    Filed: April 7, 2008
    Date of Patent: October 30, 2012
    Assignees: Kabushiki Kaisha Toyota Chuo Kenkyusho, Toyota Jidosha Kabushiki Kaisha
    Inventors: Tsutomu Uesugi, Kenji Ito, Osamu Ishiguro, Tetsu Kachi, Masahiro Sugimoto
  • Publication number: 20120217639
    Abstract: A manufacturing method of a semiconductor device including an electrode having low contact resistivity to a nitride semiconductor is provided. The manufacturing method includes a carbon containing layer forming step of forming a carbon containing layer containing carbon on a nitride semiconductor layer, and a titanium containing layer forming step of forming a titanium containing layer containing titanium on the carbon containing layer. A complete solid solution Ti (C, N) layer of TiN and TiC is formed between the titanium containing layer and the nitride semiconductor layer. As a result, the titanium containing layer comes to be in ohmic contact with the nitride semiconductor layer throughout the border therebetween.
    Type: Application
    Filed: September 2, 2010
    Publication date: August 30, 2012
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAIHSA
    Inventors: Masahiro Sugimoto, Akinori Seki, Akira Kawahashi, Yasuo Takahashi, Masakatsu Maeda
  • Publication number: 20120181551
    Abstract: A silicon carbide semiconductor device includes a silicon carbide semiconductor substrate and a trench. The silicon carbide semiconductor substrate has an offset angle with respect to a (0001) plane or a (000-1) plane and has an offset direction in a <11-20> direction. The trench is provided from a surface of the silicon carbide semiconductor substrate. The trench extends in a direction whose interior angle with respect to the offset direction is 30 degrees or ?30 degrees.
    Type: Application
    Filed: January 12, 2012
    Publication date: July 19, 2012
    Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATION
    Inventors: Shinichiro Miyahara, Hidefumi Takaya, Masahiro Sugimoto, Yukihiko Watanabe, Narumasa Soejima, Tsuyoshi Ishikawa
  • Patent number: 8222675
    Abstract: A nitride semiconductor device 2 comprises a nitride semiconductor layer 10. A gate insulating film 16 is formed on the surface of the nitride semiconductor layer 10. The gate insulating film 16 includes a portion composed of an aluminum nitride film 15 and a portion composed of an insulating material 14 that contains at least one of oxygen or silicon. A region W2 of the nitride semiconductor layer 10 facing the aluminum nitride film 15 is included in a region W1 of the nitride semiconductor layer 10 facing a gate electrode 18. The nitride semiconductor device 2 may further comprise a nitride semiconductor lower layer 8. The nitride semiconductor layer 10 may be stacked on the surface of the nitride semiconductor lower layer 8. The nitride semiconductor layer 10 may have a larger band gap than that of the nitride semiconductor lower layer 8 and have a heterojunction formed there between.
    Type: Grant
    Filed: August 20, 2009
    Date of Patent: July 17, 2012
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Masahiro Sugimoto, Hiroyuki Ueda, Tsutomu Uesugi, Masakazu Kanechika, Tetsu Kachi