Patents by Inventor Michio Horiuchi

Michio Horiuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150022230
    Abstract: A probe card includes a wiring substrate including an opening portion, a first connection pad, and a second connection pad arranged in an opposite area to the first connection pad, a resin portion formed in the opening portion, a first wire buried in the resin portion, in which one end is connected to the first connection pad and other end constitutes a first contact terminal, and a second wire buried in the resin portion, in which one end is connected to the second connection pad and other end constitutes a second contact terminal, wherein the first and second wires extend on one line, and the first and second contact terminals are arranged on the one line, and the first and second contact terminals are gathered to be separated such that the first and second contact terminals touch one electrode pad of a text object with a pair.
    Type: Application
    Filed: July 10, 2014
    Publication date: January 22, 2015
    Inventors: Ryo FUKASAWA, Michio HORIUCHI, Yasue TOKUTAKE, Yuichi MATSUDA, Mitsuhiro AIZAWA
  • Publication number: 20150022229
    Abstract: A probe card, includes, a wiring substrate having an opening portion and including a first connection pad and a second connection pad, the first connection pad being arranged at a periphery of the opening portion, the second connection pad being arranged to be adjacent to the first connection pad, a resin portion formed inside the opening portion of the wiring substrate, a first wire buried in the resin portion and having one end connected to the first connection pad and the other end constituting a first contact terminal protruding from a lower face of the resin portion, and a second wire buried in the resin portion and having one end connected to the second connection pad and the other end constituting a second contact terminal protruding from the lower face of the resin portion, wherein diameters of the first contact terminal and the second contact terminal are equal to diameters of the first wire and the second wire in the resin portion, and the first contact terminal and the second contact terminal are g
    Type: Application
    Filed: July 10, 2014
    Publication date: January 22, 2015
    Inventors: Ryo FUKASAWA, Michio HORIUCHI, Yasue TOKUTAKE, Yuichi MATSUDA, Mitsuhiro AIZAWA
  • Publication number: 20140347833
    Abstract: An electronic component device, includes, a plurality of wiring layers including a component connection pad in a center part and an external connection pad in a periphery, an insulating layer formed on the wiring layers, and the insulating layer in which the component connection pad and the external connection pad are exposed, a frame member arranged on the insulating layer, and the frame member in which an opening portion is provided in an area of the center part in which the component connection pad is arranged, and a connection hole is provided on the external connection pad, an electronic component arranged in the opening portion of the frame member and connected to the component connection pad, a sealing resin formed in the opening portion of the frame member and sealing the electronic component, and a metal bonding material formed on the external connection pad in the connection hole.
    Type: Application
    Filed: April 24, 2014
    Publication date: November 27, 2014
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Michio HORIUCHI, Ryo FUKASAWA, Yuichi MATSUDA, Yasue TOKUTAKE
  • Patent number: 8877454
    Abstract: To provide an autoanalyzer for analyzing a sugar chain contained in a biological sample, in particular, serum. Namely, it is intended to provide a method of analyzing a sugar chain in a sample, which comprises the following steps: A) the sugar chain-releasing step of releasing the sugar chain in the sample; B) the detection sample-preparing step of preparing the released sugar chain for detection; and, in the case of conducting mass spectrometry using a plate, C) the step of forming a plate for the mass spectrometry having the captured sugar chain dotted thereon which comprises the step of providing the tagged sugar chain sample solution obtained in the step B) on a collection plate; and, if required, the step of conducting an operation in a solid phase support-enclosed plate to form the plate for mass spectrometry; and D) the step of analyzing the sugar chain to be assayed.
    Type: Grant
    Filed: October 3, 2008
    Date of Patent: November 4, 2014
    Assignees: National University Corporation Hokkaido University, Shionogi & Co., Ltd.
    Inventors: Shinichiro Nishimura, Yasuro Shinohara, Yoshiaki Miura, Hiroshi Yamazaki, Michio Horiuchi, Hiroaki Motoki, Toshiharu Kuroda, Yoko Kita, Mika Nakano
  • Publication number: 20140262465
    Abstract: A wiring substrate includes, an insulating substrate in which a plurality of penetration conductors are provided, the penetration conductors penetrating in a thickness direction of the insulating substrate, a first connection pad arranged on one face of the insulating substrate, a second connection pad arranged to correspond to the first connection pad on other face of the insulating substrate, a first metal layer arranged to surround the first connection pad, a second metal layer arranged to correspond to the first metal layer, the second metal layer surrounding the second connection pad, the plurality of penetration conductors connecting the first connection pad and the second connection pad, and connecting the first metal layer and the second metal layer, and an elastic body formed in a part of the insulating substrate between the first and second connection pads, and the first and second metal layers.
    Type: Application
    Filed: March 10, 2014
    Publication date: September 18, 2014
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Michio HORIUCHI, Ryo FUKASAWA, Yuichi MATSUDA, Yasue TOKUTAKE
  • Patent number: 8729401
    Abstract: A wiring substrate includes a composite substrate including an oxidized aluminum substrate portion in which a large number of penetration conductors penetrating in a thickness direction are provided, and a frame-like aluminum substrate portion provided around the oxidized aluminum substrate portion, and a wiring layer of n layers (n is an integer of 1 or more) connected to the penetration conductors.
    Type: Grant
    Filed: February 22, 2011
    Date of Patent: May 20, 2014
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Tomoo Yamasaki, Michio Horiuchi
  • Publication number: 20140125372
    Abstract: A probe card includes a wiring substrate including an opening portion and a connection pad arranged on an upper face of the wiring substrate located on the periphery of the opening portion, a resin portion formed in the opening portion of the wiring substrate, and the resin portion formed of a material having elasticity, a contact terminal arranged to protrude from the lower face of the resin portion, and wire buried in the resin portion and connecting the contact terminal and the connection pad, wherein the contact terminal is formed of an end part of the wire, and is formed integrally with the wire.
    Type: Application
    Filed: October 28, 2013
    Publication date: May 8, 2014
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Ryo FUKASAWA, Michio HORIUCHI, Yasue TOKUTAKE, Yuichi MATSUDA, Mitsuhiro AIZAWA
  • Publication number: 20140117539
    Abstract: A wiring substrate includes a core layer, first and second wiring layers, and a first insulating layer. The core layer has one and another surfaces and includes a plate-shaped member formed of an aluminum oxide and multiple linear conductors penetrating the plate-shaped member in a thickness direction of the plate-shaped member. The first wiring layer is formed on the one surface of the core layer. The second wiring layer is formed on the other surface of the core layer. The first insulating layer has a same thickness as the first wiring layer and is formed in an area of the one surface of the core layer on which the first wiring layer is not formed. The first and second wiring layers are positioned superposing each other in a plan view. The first and second wiring layers are electrically connected by way of the multiple linear conductors.
    Type: Application
    Filed: October 28, 2013
    Publication date: May 1, 2014
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Yuko KARASAWA, Kazue Ban, Ryo Fukasawa, Yuichi Matsuda, Michio Horiuchi, Yasue Tokutake
  • Patent number: 8664764
    Abstract: One embodiment provides a semiconductor device having: a core substrate having first and second surfaces and an accommodation hole penetrating therethrough; a semiconductor element accommodated in the accommodation hole so that a front surface thereof is on the first surface side; a first metal film formed on a back surface of the semiconductor element; a second metal film formed on the second surface of the core substrate; an insulating layer covering the first and second metal films; and a third metal film formed on the insulating layer, via parts thereof penetrating through the insulating layer to respectively reach the first and second metal films.
    Type: Grant
    Filed: June 11, 2012
    Date of Patent: March 4, 2014
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Michio Horiuchi, Yasue Tokutake, Yuichi Matsuda
  • Patent number: 8638542
    Abstract: A capacitor includes a dielectric substrate and a large number of filamentous conductors formed to penetrate through the dielectric substrate in a thickness direction thereof. An electrode is connected to only respective one ends of a plurality of filamentous conductors constituting one of groups each composed of a plurality of filamentous conductors. The electrode is disposed in at least one position on each of both surfaces of the dielectric substrate, or in at least two positions on one of the surfaces. Further, an insulating layer is formed on each of both surfaces of the dielectric substrate so as to cover regions between the electrodes, and a conductor layer is formed on the corresponding insulating layer integrally with a desired number of electrodes.
    Type: Grant
    Filed: July 9, 2010
    Date of Patent: January 28, 2014
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Michio Horiuchi, Yasue Tokutake, Yuichi Matsuda, Yukio Shimizu, Tomoo Yamasaki, Yuta Sakaguchi
  • Publication number: 20130081796
    Abstract: A thermal interface material includes a metal foil, which has a first surface and an opposite second surface, and a plurality of rod conductors each having a side surface extending in a thickness direction of the metal foil. The rod conductors are arranged on at least one of the first and second surfaces of the metal foil in a planar direction that is perpendicular to the thickness direction. A resin layer covers at least the first surface and the second surface of the metal foil and the side surfaces of the rod conductors.
    Type: Application
    Filed: September 13, 2012
    Publication date: April 4, 2013
    Applicant: Shinko Electric Industries Co., LTD.
    Inventors: Michio Horiuchi, Yasue Tokutake, Yuichi Matsuda
  • Publication number: 20130048350
    Abstract: A base member includes: a core layer including: a plate-like body, made of aluminum oxide; and plural linear conductors, which penetrate through the plate-like body in a thickness direction of the plate-like body; a bonding layer, formed on at least one of a first surface and a second surface of the core layer; and a silicon layer or a glass layer, formed on the bonding layer.
    Type: Application
    Filed: August 17, 2012
    Publication date: February 28, 2013
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Michio Horiuchi, Yasue Tokutake, Yuichi Matsuda
  • Patent number: 8361671
    Abstract: The present invention relates to a solid electrolyte fuel-cell device wherein a plurality of fuel cells are formed on a single plate. A plurality of cathode layers are formed on one surface of the flat plate-like solid electrolyte substrate, and a plurality of anode layers on the opposite surface thereof, and each fuel cell is formed from a pair of the cathode layer and the anode layer. An electromotive force extracting lead wire is attached to the cathode layer, and a lead wire is attached to the anode layer. The plurality of fuel cells are connected in series by electrically connecting the cathode layer of one fuel cell to the anode layer of an adjacent fuel cell. Flames formed by combustion of a fuel such as a methane gas are supplied to the entire surface of each anode layer, and air is supplied to each cathode layer.
    Type: Grant
    Filed: August 19, 2004
    Date of Patent: January 29, 2013
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Michio Horiuchi, Shigeaki Suganuma, Misa Watanabe
  • Patent number: 8362369
    Abstract: A wiring board includes a core substrate having a structure including an insulating base material and a large number of filamentous conductors densely provided in the insulating base material and piercing the insulating base material in a thickness direction thereof. Pads made of portions of wiring layers are oppositely disposed on both surfaces of the core substrate and electrically connected to opposite ends of a plurality of filamentous conductors in such a manner that the pads share the filamentous conductors. A wiring connection between one surface side and the other surface side of the core substrate is made through the pads. The insulating base material is made of an inorganic dielectric. Pads made of portions of the wiring layers are disposed on both surfaces of the core substrate and electrically connected only to corresponding one end sides of different groups each formed of a plurality of filamentous conductors.
    Type: Grant
    Filed: June 2, 2010
    Date of Patent: January 29, 2013
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Michio Horiuchi, Yasue Tokutake, Yuichi Matsuda, Masao Nakazawa
  • Publication number: 20120327626
    Abstract: One embodiment provides a wiring substrate including: a core substrate having an insulative base member, the insulative base member having a first surface and a second surface, a plurality of linear conductors penetrating through the insulative base member from the first surface to the second surface; an inorganic material layer joined to at least one of the first surface and the second surface of the insulative base member; and a penetration line penetrating through the inorganic material layer, wherein one end of the penetration line is electrically connected to a corresponding part of the linear conductors, without intervention of a bump.
    Type: Application
    Filed: June 21, 2012
    Publication date: December 27, 2012
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Michio Horiuchi, Yasue Tokutake, Yuichi Matsuda, Tomoo Yamasaki
  • Publication number: 20120313245
    Abstract: One embodiment provides a semiconductor device having: a core substrate having first and second surfaces and an accommodation hole penetrating therethrough; a semiconductor element accommodated in the accommodation hole so that a front surface thereof is on the first surface side; a first metal film formed on a back surface of the semiconductor element; a second metal film formed on the second surface of the core substrate; an insulating layer covering the first and second metal films; and a third metal film formed on the insulating layer, via parts thereof penetrating through the insulating layer to respectively reach the first and second metal films.
    Type: Application
    Filed: June 11, 2012
    Publication date: December 13, 2012
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Michio HORIUCHI, Yasue TOKUTAKE, Yuichi MATSUDA
  • Patent number: 8324513
    Abstract: A wiring substrate includes a core substrate including an inorganic dielectric insulating base material having first and second surfaces, and linear conductors penetrating the insulating base; a first wiring layer on the first surface electrically connected to a portion of linear conductors; a second wiring layer on the second surface electrically connected to the portion of the linear conductors; a first insulating layer on the first surface covering the first wiring layer and including a first through-hole; a third wiring layer on the first insulating layer electrically connected to the first wiring layer via the first through-hole; a second insulating layer on the second surface covering the second wiring layer and including a second through-hole; and a fourth wiring layer on the second insulating layer electrically connected to the second wiring layer via the second through-hole.
    Type: Grant
    Filed: January 20, 2011
    Date of Patent: December 4, 2012
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Michio Horiuchi, Yasue Tokutake, Yuichi Matsuda
  • Patent number: 8304129
    Abstract: A solid electrolyte fuel cell comprising a cathode layer 12 formed on one side of a solid electrolyte layer 10 and an anode layer 18 formed on the other side of the solid electrolyte layer 10, wherein the cathode layer 16 comprises a first cathode layer 12 formed in contact with the solid electrolyte layer and a second cathode layer 14 formed covering the first cathode layer 12, the second cathode layer 14 is formed having a higher porosity than the first cathode layer 12 and the first cathode layer 12 is divided into a plurality of island-shaped portions 12a, 12a.
    Type: Grant
    Filed: March 27, 2007
    Date of Patent: November 6, 2012
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Fumimasa Katagiri, Shigeaki Suganuma, Yasue Tokutake, Jun Yoshiike, Michio Horiuchi
  • Patent number: 8304664
    Abstract: An electronic component (chip) mounted structure includes a chip having a terminal, a wiring board having a terminal electrically connected to the terminal of the chip, and an interposing board disposed between the chip and the wiring board and having a structure including an insulating base material provided with a large number of filamentous conductors penetrating the insulating base material in a thickness direction thereof. The terminal of the chip is electrically connected to the terminal of the wiring board via a plurality of filamentous conductors provided in the interposing board.
    Type: Grant
    Filed: May 11, 2010
    Date of Patent: November 6, 2012
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Tsuyoshi Kobayashi, Michio Horiuchi, Yukio Shimizu, Yasue Tokutake
  • Patent number: 8242612
    Abstract: A wiring board includes a core substrate including an insulation base member; linear conductors configured to pierce from a first surface of the insulation base member to a second surface of the insulation base member; a ground wiring group including a first ground wiring formed on the first surface of the core substrate, and a belt-shaped second ground wiring formed on the second surface of the core substrate and electrically connected to the first ground wiring by way of a part of the linear conductors; and an electric power supply wiring group including a first electric power supply wiring formed on the first surface, and a second electric power supply wiring formed on the second surface and electrically connected to the first electric power supply wiring by way of a part of the plural linear conductors.
    Type: Grant
    Filed: June 11, 2010
    Date of Patent: August 14, 2012
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Michio Horiuchi, Yasue Tokutake, Yuichi Matsuda, Tomoo Yamasaki, Yuta Sakaguchi