Patents by Inventor Michio Horiuchi

Michio Horiuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8138609
    Abstract: In a semiconductor device, a substrate includes a plurality of line conductors which penetrate the substrate from a top surface to a bottom surface of the substrate. A semiconductor chip is secured in a hole of the substrate. A first insulating layer is formed on the top surfaces of the substrate and the semiconductor chip. A first wiring layer is formed on the first insulating layer and electrically connected via through holes of the first insulating layer to the semiconductor chip and some line conductors exposed to one of the through holes. A second insulating layer is formed on the bottom surfaces of the substrate and the semiconductor chip. A second wiring layer is formed on the second insulating layer and electrically connected via a through hole of the second insulating layer to some line conductors exposed to the through hole.
    Type: Grant
    Filed: July 8, 2010
    Date of Patent: March 20, 2012
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Michio Horiuchi, Yasue Tokutake, Yuichi Matsuda, Tomoo Yamasaki, Yuta Sakaguchi
  • Patent number: 8134444
    Abstract: An inductor includes a core substrate including minute column-like electrical conductors extending between a front surface and a back surface of the core substrate. Each column-like electrical conductor is insulated from adjacent column-like electrical conductors by being surrounded by an insulating material. Insulation layers are formed on the front surface and the back surface of the core substrate, respectively. At least two connection electrical conductors extend through each of the insulation layers. Each connection electrical conductor is electrically connected to a plurality of the column-like electrical conductors. Wirings are formed on each of the insulation layers to connect said connection electrical conductors to each other electrically. The wirings, the connection electrical conductors and the column-like electrical conductors are connected to form a coil in a three-dimensional manner.
    Type: Grant
    Filed: October 1, 2010
    Date of Patent: March 13, 2012
    Assignee: Shinko Electronic Industries Co., Ltd.
    Inventors: Michio Horiuchi, Yukio Shimizu, Kazunari Sekigawa, Tsuyoshi Kobayashi
  • Patent number: 8057950
    Abstract: A solid oxide fuel cell includes: a solid electrolyte; and electrodes on both surfaces of the solid electrolyte, wherein at least one of joint surfaces where the solid electrolyte and the electrodes are in contact with each other is a roughened surface having at least two different types of surface roughness.
    Type: Grant
    Filed: May 19, 2006
    Date of Patent: November 15, 2011
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Michio Horiuchi, Yasue Tokutake, Shigeaki Suganuma, Misa Watanabe
  • Patent number: 8053680
    Abstract: A wiring board includes a plate-shaped resin member; chip connection pads provided in the resin member, the chip connection pads having connection surfaces electrically connected to electrode pads provided on a semiconductor chip, the connection surfaces being situated in substantially the same plane as a first surface of the resin member, the first surface being a side where the semiconductor chip is mounted; pads provided in a portion of the resin member, the portion being situated outside an area where the chip connection pads are formed; lead wirings connected to the pads; and conductive wires sealed by the resin member, the conductive wires electrically connecting the chip connection pads and the pads to each other.
    Type: Grant
    Filed: February 27, 2009
    Date of Patent: November 8, 2011
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Fumimasa Katagiri, Yasue Tokutake, Naoyuki Koizumi, Shigeaki Suganuma, Michio Horiuchi
  • Publication number: 20110220404
    Abstract: A wiring substrate includes a composite substrate including an oxidized aluminum substrate portion in which a large number of penetration conductors penetrating in a thickness direction are provided, and a frame-like aluminum substrate portion provided around the oxidized aluminum substrate portion, and a wiring layer of n layers (n is an integer of 1 or more) connected to the penetration conductors.
    Type: Application
    Filed: February 22, 2011
    Publication date: September 15, 2011
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Tomoo Yamasaki, Michio Horiuchi
  • Publication number: 20110175235
    Abstract: A wiring substrate includes a core substrate including an inorganic dielectric insulating base material having first and second surfaces, and linear conductors penetrating the insulating base; a first wiring layer on the first surface electrically connected to a portion of linear conductors; a second wiring layer on the second surface electrically connected to the portion of the linear conductors; a first insulating layer on the first surface covering the first wiring layer and including a first through-hole; a third wiring layer on the first insulating layer electrically connected to the first wiring layer via the first through-hole; a second insulating layer on the second surface covering the second wiring layer and including a second through-hole; and a fourth wiring layer on the second insulating layer electrically connected to the second wiring layer via the second through-hole.
    Type: Application
    Filed: January 20, 2011
    Publication date: July 21, 2011
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Michio Horiuchi, Yasue Tokutake, Yuichi Matsuda
  • Publication number: 20110111443
    Abstract: To provide an autoanalyzer for analyzing a sugar chain contained in a biological sample, in particular, serum. Namely, it is intended to provide a method of analyzing a sugar chain in a sample, which comprises the following steps: A) the sugar chain-releasing step of releasing the sugar chain in the sample; B) the detection sample-preparing step of preparing the released sugar chain for detection; and, in the case of conducting mass spectrometry using a plate, C) the step of forming a plate for the mass spectrometry having the captured sugar chain dotted thereon which comprises the step of providing the tagged sugar chain sample solution obtained in the step B) on a collection plate; and, if required, the step of conducting an operation in a solid phase support-enclosed plate to form the plate for mass spectrometry; and D) the step of analyzing the sugar chain to be assayed.
    Type: Application
    Filed: October 3, 2008
    Publication date: May 12, 2011
    Applicants: NATIONAL UNIVERSITY CORPORATION HOKKAIDO UNIVERSITY, SYSTEM INSTRUMENTS CO., LTD., SHIONOGI & CO., LTD.
    Inventors: Shinichiro Nishimura, Yasuro Shinohara, Yoshiaki Miura, Hiroshi Yamazaki, Michio Horiuchi, Hiroaki Motoki, Toshiharu Kuroda, Yoko Kita, Mika Nakano
  • Publication number: 20110095419
    Abstract: There is provided a conductive film. The conductive film includes: an anodized layer having a plurality of through holes extending therethrough in its thickness direction; a plurality of linear conductors each formed in a corresponding one of the through holes and each having first and second protrusions protruding from the anodized layer, wherein at least one of the first and second protrusions is covered by a coating material; and an uncured thermosetting resin layer formed on the anodized layer to cover at least one of the first and second protrusions.
    Type: Application
    Filed: October 21, 2010
    Publication date: April 28, 2011
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Michio Horiuchi, Yasue Tokutake, Yuichi Matsuda, Tsuyoshi Kobayashi, Tatsuaki Denda
  • Publication number: 20110095433
    Abstract: There is provided a method of manufacturing a conductive film. The method includes: (a) providing an anodized layer having a plurality of through holes extending therethrough in its thickness direction; (b) forming a plurality of linear conductors by filling each of the through holes with a conductive material; (c) forming protection layers on both surfaces of the anodized layer; (d) removing the anodized layer to form a plurality of gaps between the linear conductors; (e) forming an organic insulation layer between the protection layers to fill the gaps with the organic insulation layer; and (f) removing the protection layers.
    Type: Application
    Filed: October 21, 2010
    Publication date: April 28, 2011
    Applicant: Shinko Electric Industries Co., Ltd.
    Inventors: Michio HORIUCHI, Yasue TOKUTAKE, Yuichi MATSUDA, Tsuyoshi KOBAYASHI, Tatsuaki DENDA
  • Publication number: 20110080247
    Abstract: An inductor includes a core substrate including minute column-like electrical conductors extending between a front surface and a back surface of the core substrate. Each column-like electrical conductor is insulated from adjacent column-like electrical conductors by being surrounded by an insulating material. Insulation layers are formed on the front surface and the back surface of the core substrate, respectively. At least two connection electrical conductors extend through each of the insulation layers. Each connection electrical conductor is electrically connected to a plurality of the column-like electrical conductors. Wirings are formed on each of the insulation layers to connect said connection electrical conductors to each other electrically. The wirings, the connection electrical conductors and the column-like electrical conductors are connected to form a coil in a three-dimensional manner.
    Type: Application
    Filed: October 1, 2010
    Publication date: April 7, 2011
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Michio HORIUCHI, Yukio Shimizu, Kazunari Sekigawa, Tsuyoshi Kobayashi
  • Publication number: 20110018144
    Abstract: A wiring board includes a core substrate including an insulation base member; linear conductors configured to pierce from a first surface of the insulation base member to a second surface of the insulation base member; a ground wiring group including a first ground wiring formed on the first surface of the core substrate, and a belt-shaped second ground wiring formed on the second surface of the core substrate and electrically connected to the first ground wiring by way of a part of the linear conductors; and an electric power supply wiring group including a first electric power supply wiring formed on the first surface, and a second electric power supply wiring formed on the second surface and electrically connected to the first electric power supply wiring by way of a part of the plural linear conductors.
    Type: Application
    Filed: June 11, 2010
    Publication date: January 27, 2011
    Inventors: Michio Horiuchi, Yasue Tokutake, Yuichi Matsuda, Tomoo Yamasaki, Yuta Sakaguchi
  • Publication number: 20110013340
    Abstract: A capacitor includes a dielectric substrate and a large number of filamentous conductors formed to penetrate through the dielectric substrate in a thickness direction thereof. An electrode is connected to only respective one ends of a plurality of filamentous conductors constituting one of groups each composed of a plurality of filamentous conductors. The electrode is disposed in at least one position on each of both surfaces of the dielectric substrate, or in at least two positions on one of the surfaces. Further, an insulating layer is formed on each of both surfaces of the dielectric substrate so as to cover regions between the electrodes, and a conductor layer is formed on the corresponding insulating layer integrally with a desired number of electrodes.
    Type: Application
    Filed: July 9, 2010
    Publication date: January 20, 2011
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD
    Inventors: Michio HORIUCHI, Yasue Tokutake, Yuichi Matsuda, Yukio Shimizu, Tomoo Yamasaki, Yuta Sakaguchi
  • Publication number: 20110012266
    Abstract: In a semiconductor device, a substrate includes a plurality of line conductors which penetrate the substrate from a top surface to a bottom surface of the substrate. A semiconductor chip is secured in a hole of the substrate. A first insulating layer is formed on the top surfaces of the substrate and the semiconductor chip. A first wiring layer is formed on the first insulating layer and electrically connected via through holes of the first insulating layer to the semiconductor chip and some line conductors exposed to one of the through holes. A second insulating layer is formed on the bottom surfaces of the substrate and the semiconductor chip. A second wiring layer is formed on the second insulating layer and electrically connected via a through hole of the second insulating layer to some line conductors exposed to the through hole.
    Type: Application
    Filed: July 8, 2010
    Publication date: January 20, 2011
    Inventors: Michio HORIUCHI, Yasue Tokutake, Yuichi Matsuda, Tomoo Yamasaki, Yuta Sakaguchi
  • Publication number: 20100307808
    Abstract: A wiring board includes a core substrate having a structure including an insulating base material and a large number of filamentous conductors densely provided in the insulating base material and piercing the insulating base material in a thickness direction thereof. Pads made of portions of wiring layers are oppositely disposed on both surfaces of the core substrate and electrically connected to opposite ends of a plurality of filamentous conductors in such a manner that the pads share the filamentous conductors. A wiring connection between one surface side and the other surface side of the core substrate is made through the pads. The insulating base material is made of an inorganic dielectric. Pads made of portions of the wiring layers are disposed on both surfaces of the core substrate and electrically connected only to corresponding one end sides of different groups each formed of a plurality of filamentous conductors.
    Type: Application
    Filed: June 2, 2010
    Publication date: December 9, 2010
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Michio HORIUCHI, Yasue TOKUTAKE, Yuichi MATSUDA, Masao NAKAZAWA
  • Publication number: 20100294552
    Abstract: An electronic component (chip) mounted structure includes a chip having a terminal, a wiring board having a terminal electrically connected to the terminal of the chip, and an interposing board disposed between the chip and the wiring board and having a structure including an insulating base material provided with a large number of filamentous conductors penetrating the insulating base material in a thickness direction thereof. The terminal of the chip is electrically connected to the terminal of the wiring board via a plurality of filamentous conductors provided in the interposing board.
    Type: Application
    Filed: May 11, 2010
    Publication date: November 25, 2010
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD
    Inventors: Tsuyoshi KOBAYASHI, Michio Horiuchi, Yukio Shimizu, Yasue Tokutake
  • Patent number: 7803491
    Abstract: A solid electrolyte fuel cell configuration provided with a single sheet shaped solid electrolyte substrate formed with a plurality of fuel cells and thereby not having a sealed structure, achieving a reduction of the size and a reduction of the cost, and able to improve the durability and improve the power generation efficiency, a single sheet shaped solid electrolyte substrate, in particular a solid electrolyte fuel cell configuration provided with a single sheet shaped solid electrolyte substrate, a plurality of anode layers formed on one side of the solid electrolyte substrate, and a plurality of cathode layers formed on the side opposite to the one side of the solid electrolyte substrate at positions facing the anode layers, the anode layers and cathode layers facing each other across the solid electrolyte substrate forming a plurality of fuel cells, the anode layers and cathode layers being connected in series.
    Type: Grant
    Filed: May 9, 2005
    Date of Patent: September 28, 2010
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Michio Horiuchi, Shigeaki Suganuma, Misa Watanabe, Yasue Tokutake
  • Patent number: 7786597
    Abstract: A multilayer wiring board includes: a substrate; connection pads arranged in a square grid fashion; and wiring patterns. Relationship between the connection pads and the wiring patterns satisfies: {(Ndl+1)P?d?s}/(w+s)>2Ndr+Ndl(a+1)+2a, wherein P is a pitch of the connection pads, d is a diameter of the connection pads, s is a minimum interval between the wiring patterns and is a minimum interval between the wiring pattern and the connection pad that are adjacent to each other, w is a minimum width of the wiring patterns, Ndl is the number of non-pad rows in each of the non-pad regions, Ndr is the number of non-pad columns in each of non-pad region, and a is an integer of (P?d?s)/(w+s).
    Type: Grant
    Filed: December 2, 2008
    Date of Patent: August 31, 2010
    Assignee: Shinko Electric Industries Co., Ltd
    Inventors: Michio Horiuchi, Yasue Tokutake, Shigeaki Suganuma, Naoyuki Koizumi, Fumimasa Katagiri
  • Patent number: 7771886
    Abstract: A solid oxide fuel cell comprising a fuel cell unit which comprises an anode layer made of an electrically conducting mesh and an anode-forming material carried by this mesh, a cathode layer made of an electrically conducting mesh and a cathode-forming material carried by this mesh, and a solid electrolytic layer in the form of a thin film arranged between and supported by the anode layer and the cathode layer.
    Type: Grant
    Filed: January 6, 2006
    Date of Patent: August 10, 2010
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Michio Horiuchi, Shigeaki Suganuma, Misa Watanabe, Yasue Tokutake
  • Patent number: 7722980
    Abstract: A solid oxide fuel cell that directly utilizes a flame according to the present invention has a solid oxide substrate, a cathode electrode layer formed on one surface, and an anode electrode layer 3 formed on the opposite surface and a platinum mesh is embedded in the entire surfaces of the solid cathode electrode layer and the anode electrode layer. An oxide layer covers the entire periphery of the solid oxide substrate from the end part of the cathode electrode layer to the end part of the anode electrode layer. Due to the platinum mesh and the oxide layer, thermal shock due to rapid heating by a flame is alleviated and cracking in the solid oxide substrate is prevented from occurring.
    Type: Grant
    Filed: July 12, 2006
    Date of Patent: May 25, 2010
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Michio Horiuchi, Yasue Tokutake, Shigeaki Suganuma, Misa Watanabe
  • Patent number: 7659021
    Abstract: The present invention relates to a power generating apparatus using a solid oxide fuel cell. A plurality of solid oxide fuel cells, each comprising a solid oxide substrate, a porous cathode electrode layer, and a porous anode electrode layer, are stacked vertically and housed inside a walled structure. A mixture gas is supplied to each solid oxide fuel cell from above. An exhaust gas discharged from each fuel cell is burned in a space below each fuel cell, producing a flame. Each fuel cell is heated by this flame.
    Type: Grant
    Filed: March 10, 2006
    Date of Patent: February 9, 2010
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Michio Horiuchi, Shigeaki Suganuma, Misa Watanabe, Yasue Tokutake