Patents by Inventor Ming Huang
Ming Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240162317Abstract: A non-volatile memory device includes a memory cell including a substrate, a select gate, a control gate, a planar floating gate, a coupling dielectric layer, an erase gate dielectric layer, and an erase gate. The select gate and the control gate are disposed on the substrate and laterally spaced apart from each other, and the control gate includes a non-vertical surface. The planar floating gate includes a lateral tip laterally spaced apart from the control gate. The coupling dielectric layer includes a first thickness (T1). The erase gate dielectric layer covers the non-vertical surface of the control gate and the lateral tip of the planar floating gate, and includes a second thickness (T2). The erase gate covers the erase gate dielectric layer and the lateral tip of the planar floating gate. The first thickness and the second thickness satisfy the following relation: (T2)<(T1)<2(T2).Type: ApplicationFiled: October 20, 2023Publication date: May 16, 2024Inventors: Der-Tsyr Fan, I-Hsin Huang, Tzung-Wen Cheng, Yu-Ming Cheng, Chen-Ming Tsai
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Publication number: 20240162455Abstract: A battery cell including a membrane electrode assembly, a cathode bipolar plate and an anode bipolar plate. The anode bipolar plate includes a metal layer and a thermally conductive layer. The metal layer is stacked on a side of the membrane electrode assembly that is located farthest away from the cathode bipolar plate. The metal layer has a bottom surface, a top surface, a first side surface and a second side surface. The bottom surface faces the membrane electrode assembly. The thermally conductive layer includes a first cover layer and two second cover layers. The first cover layer covers the top surface of the metal layer. The two second cover layers protrude from two opposite sides of the first cover layer, respectively. The two second cover layers at least partially cover the first side surface and the second side surface of the metal layer, respectively.Type: ApplicationFiled: March 16, 2023Publication date: May 16, 2024Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chien-Ming LAI, Sung-Chun CHANG, Chiu-Ping HUANG, Li-Duan TSAI
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Publication number: 20240161403Abstract: Text-to-image generation generally refers to the process of generating an image from one or more text prompts input by a user. While artificial intelligence has been a valuable tool for text-to-image generation, current artificial intelligence-based solutions are more limited as it relates to text-to-3D content creation. For example, these solutions are oftentimes category-dependent, or synthesize 3D content at a low resolution. The present disclosure provides a process and architecture for high-resolution text-to-3D content creation.Type: ApplicationFiled: August 9, 2023Publication date: May 16, 2024Inventors: Chen-Hsuan Lin, Tsung-Yi Lin, Ming-Yu Liu, Sanja Fidler, Karsten Kreis, Luming Tang, Xiaohui Zeng, Jun Gao, Xun Huang, Towaki Takikawa
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Publication number: 20240162349Abstract: A device includes a semiconductor fin, and a gate stack on sidewalls and a top surface of the semiconductor fin. The gate stack includes a high-k dielectric layer, a work-function layer overlapping a bottom portion of the high-k dielectric layer, and a blocking layer overlapping a second bottom portion of the work-function layer. A low-resistance metal layer overlaps and contacts the work-function layer and the blocking layer. The low-resistance metal layer has a resistivity value lower than second resistivity values of both of the work-function layer and the blocking layer. A gate spacer contacts a sidewall of the gate stack.Type: ApplicationFiled: January 24, 2024Publication date: May 16, 2024Inventors: Chung-Chiang Wu, Po-Cheng Chen, Kuo-Chan Huang, Hung-Chin Chung, Hsien-Ming Lee, Chien-Hao Chen
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Publication number: 20240161250Abstract: Techniques are disclosed herein for generating a content item. The techniques include performing one or more first denoising operations based on an input and a first machine learning model to generate a first content item, and performing one or more second denoising operations based on the input, the first content item, and a second machine learning model to generate a second content item, where the first machine learning model is trained to denoise content items having an amount of corruption within a first corruption range, the second machine learning model is trained to denoise content items having an amount of corruption within a second corruption range, and the second corruption range is lower than the first corruption range.Type: ApplicationFiled: October 11, 2023Publication date: May 16, 2024Inventors: Yogesh BALAJI, Timo Oskari AILA, Miika AITTALA, Bryan CATANZARO, Xun HUANG, Tero Tapani KARRAS, Karsten KREIS, Samuli LAINE, Ming-Yu LIU, Seungjun NAH, Jiaming SONG, Arash VAHDAT, Qinsheng ZHANG
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Publication number: 20240162185Abstract: An electronic device including a circuit structure, a bonding element and an electronic unit is disclosed. The circuit structure includes a conductive pad, and the conductive pad has an accommodating recess. At least a portion of the bonding element is disposed in the accommodating recess. The electronic unit is electrically connected to the conductive pad through the bonding element. The accommodating recess has a bottom surface and an opening opposite to the bottom surface, and a width of the bottom surface is greater than a width of the opening.Type: ApplicationFiled: December 25, 2022Publication date: May 16, 2024Applicant: InnoLux CorporationInventors: Chin-Ming HUANG, Cheng-Chi WANG, Kuan-Hsueh LIN
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Publication number: 20240162291Abstract: A transistor with a fin structure and a nanosheet includes a fin structure. A first gate device is disposed on the fin structure. A first source/drain layer is disposed at one side of the first gate device. A first source/drain layer is on the fin structure and extends into the fin structure. A second source/drain layer is disposed at another side of the first gate device. The second source/drain layer is on the fin structure and extends into the fin structure. A nanosheet is disposed above the first gate device, between the first source/drain layer and the second source/drain layer, and contacts the first source/drain layer and the second source/drain layer. A second gate device surrounds the nanosheet.Type: ApplicationFiled: December 7, 2022Publication date: May 16, 2024Applicant: UNITED MICROELECTRONICS CORP.Inventors: Ching-In Wu, Yu-Ming Lin, Cheng-Tung Huang
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Publication number: 20240162316Abstract: A non-volatile memory device includes at least one memory cell and the memory cell includes a substrate, a select gate, a control gate, a floating gate, and an erase gate. The select gate is disposed on the substrate, and the control gate is disposed on the substrate and laterally spaced apart from the select gate. The control gate comprises a non-vertical surface. The floating gate includes a vertical portion and a horizontal portion. The vertical portion disposed between the select gate and the control gate and includes a first top tip laterally spaced apart from the control gate. The horizontal portion is disposed between the substrate and the control gate, where the horizontal portion includes a lateral tip laterally and vertically spaced apart from the control gate. The erase gate covers the non-vertical surface of the control gate and the lateral tip of the horizontal portion of the floating gate.Type: ApplicationFiled: October 6, 2023Publication date: May 16, 2024Inventors: Der-Tsyr Fan, I-Hsin Huang, Tzung-Wen Cheng, Yu-Ming Cheng
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Publication number: 20240161797Abstract: An integrated circuit (IC) device includes memory cells each including first through fourth memory elements. The first memory element is physically arranged, along a first axis, between a bit line and a first auxiliary conductive line. The second memory element is physically arranged, along the first axis, between a second auxiliary conductive line and a first conductor. The first and second memory elements are arranged in a first row along the first axis. The third memory element is physically arranged, along the first axis, between the first auxiliary conductive line and a second conductor electrically coupled to the first conductor. The fourth memory element is physically arranged, along the first axis, between the bit line and the second auxiliary conductive line. The third and fourth memory elements are arranged, along the first axis, in a second row spaced from the first row along an axis transverse to the first axis.Type: ApplicationFiled: January 24, 2024Publication date: May 16, 2024Inventors: Bo-Feng YOUNG, Yu-Ming LIN, Shih-Lien Linus LU, Han-Jong CHIA, Sai-Hooi YEONG, Chia-En HUANG, Yih WANG
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Publication number: 20240161652Abstract: A method includes determining one or more metrics of a surgical task being performed by a surgeon based at least partially upon a type of the surgical task being performed and a video of the surgical task being performed. The method also includes determining a surgical skill of the surgeon during the surgical task based at least partially upon the video, the one or more metrics, or a combination thereof.Type: ApplicationFiled: March 22, 2022Publication date: May 16, 2024Applicant: THE JOHNS HOPKINS UNIVERSITYInventors: Satyanarayana S. VEDULA, Shameema SIKDER, Gregory D. HAGER, Tae Soo KIM, Chien-Ming HUANG, Anand MALPANI, Kristen H. PARK, Bohua WAN
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Publication number: 20240162315Abstract: A non-volatile memory device includes at least one memory cell, and the memory cell includes a substrate, an assist gate structure, a tunneling dielectric layer, a floating gate, and an upper gate structure. The assist gate structure is disposed on the substrate. The floating gate includes two opposite first top edges arranged along a first direction, two opposite first sidewalls arranged along the first direction, and two opposite second sidewalls arranged along a second direction different from the first direction. The upper gate structure covers the assist gate structure and the floating gate, where at least one of the first top edges of the floating gate is embedded in the upper gate structure. Portions of the upper gate structure extend beyond the second sidewalls of the floating gate in the second direction, and the portions of the upper gate structure are disposed above the substrate.Type: ApplicationFiled: December 28, 2022Publication date: May 16, 2024Applicant: IOTMEMORY TECHNOLOGY INC.Inventors: Der-Tsyr Fan, I-Hsin Huang, Tzung-Wen Cheng, Yu-Ming Cheng
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Patent number: 11985314Abstract: Video processing methods and apparatuses in a video encoding or decoding system for processing out-of-bounds nodes in a current picture. An out-of-bounds node is a coding tree node with a block region across a current picture boundary. The video processing method or apparatus determines an inferred splitting type, applies the inferred splitting type to split the out-of-bounds node into child blocks, adaptively splits each child block into one or multiple leaf blocks, and encodes or decodes the leaf blocks in the out-of-bounds node inside the current picture. The inferred splitting type for partitioning out-of-bounds nodes in an inter slice, picture, or tile is the same as the inferred splitting type for partitioning out-of-bounds nodes in an intra slice, picture, or tile.Type: GrantFiled: December 24, 2019Date of Patent: May 14, 2024Assignee: HFI INNOVATION INC.Inventors: Chia-Ming Tsai, Chih-Wei Hsu, Tzu-Der Chuang, Ching-Yeh Chen, Yu-Wen Huang, Shih-Ta Hsiang
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Patent number: 11983640Abstract: Techniques for generating a natural language question template for an artificial intelligence question and answer (QA) system are disclosed. A graph database query relating to a QA system is parsed using a predefined schema. The parsing includes extracting a first plurality of values from the graph database query relating to a where clause in the graph database query, extracting a second plurality of values from the graph database query relating to a return clause in the graph database query, identifying a QA template rule relating to the graph database query, based on a match clause in the graph database query. A natural language question template is generated based on the first plurality of values, the second plurality of values, and the identified QA template rule. The natural language question template is suitable for use by the QA system as part of generating a response to a natural language question.Type: GrantFiled: December 30, 2019Date of Patent: May 14, 2024Assignee: International Business Machines CorporationInventors: Zi Ming Huang, Jian Wang, Jing Li, Jian Min Jiang, Ke Wang, Xin Ni
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Patent number: 11983363Abstract: A user gesture behavior simulation system includes a touch gesture recording and editing device and a touch gesture simulation device. When at least one touch gesture is implemented on a record touch object with at least one finger of a user, the at least one touch gesture is recorded by the touch gesture recording and editing device, and at least one touch gesture operating trajectory is correspondingly generated by the touch gesture recording and editing device. The touch gesture simulation device includes at least one artificial finger. The at least one artificial finger is driven and moved to an under-test touch object by the touch gesture simulation device. The at least one touch gesture is simulated by the touch gesture simulation device according to the at least one touch gesture operating trajectory.Type: GrantFiled: September 5, 2023Date of Patent: May 14, 2024Assignee: PRIMAX ELECTRONICS LTD.Inventors: Yung-Tai Pan, Jui-Hung Hsu, Chang-Ming Huang
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Patent number: 11984379Abstract: Provided is an electronic package, in which a heat dissipating body is formed on an electronic device and is combined with a heat sink so that the electronic device, the heat dissipating body and the heat sink form a receiving space, and a heat dissipating material is formed in the receiving space and in contact with the heat sink and the electronic device, where a fluid regulating space is formed between the heat dissipating material and the heat dissipating body and is used as a volume regulating space for the heat dissipating material during thermal expansion and contraction.Type: GrantFiled: July 8, 2021Date of Patent: May 14, 2024Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Yu-Lung Huang, Chih-Ming Huang, Kuo-Hua Yu, Chang-Fu Lin
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Publication number: 20240150192Abstract: A semiconductor device with different configurations of gate structures and a method of fabricating the same are disclosed. The method includes forming a fin structure on a substrate, forming a gate opening on the fin structure, forming a metallic oxide layer within the gate opening, forming a first dielectric layer on the metallic oxide layer, forming a second dielectric layer on the first dielectric layer, forming a work function metal (WFM) layer on the second dielectric layer, and forming a gate metal fill layer on the WFM layer. The forming the first dielectric layer includes depositing an oxide material with an oxygen areal density less than an oxygen areal density of the metallic oxide layer.Type: ApplicationFiled: January 12, 2024Publication date: May 9, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsiang-Pi CHANG, Chung-Liang Cheng, I-Ming Chang, Yao-Sheng Huang, Huang-Lin Chao
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Publication number: 20240155425Abstract: The present disclosure relates to radio frame sending methods and apparatuses, and radio frame receiving methods and apparatuses. In one example method, a multi-link device generates a radio frame, where the radio frame includes a first multi-link element (MLE) and a second MLE, the first MLE includes a first information element, the second MLE includes a second information element, and the first information element and the second information element correspond to station information of a same link. Then, the multi-link device sends the radio frame.Type: ApplicationFiled: January 19, 2024Publication date: May 9, 2024Inventors: Yuchen GUO, Yiqing LI, Guogang HUANG, Yunbo LI, Ming GAN
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Publication number: 20240150906Abstract: An electrolytic cell includes a cation exchange membrane, a cathode compartment, and an anode compartment. The cathode compartment includes a gas diffusion electrode and a flow channel element, in which the flow channel element is between the cation exchange membrane and the gas diffusion electrode, and has a plurality of flow channels arranged in parallel with each other. The anode compartment includes an anode mesh, in which the cation exchange membrane is between the anode mesh and the flow channel element. A distance between the anode mesh and the gas diffusion electrode is substantially equal to the sum of a first thickness of the cation exchange membrane and a second thickness of the flow channel element. The novel electrolytic cell can combine with a chloralkali electrolytic cell to deal with gaseous CO2 and produce products, e.g., synthesis gas, for other purposes.Type: ApplicationFiled: May 9, 2023Publication date: May 9, 2024Inventors: Hao-Ming CHEN, Tai-Lung CHEN, Wan-Tun HUNG, Yu-Cheng CHEN, Kuo-Ming HUANG, Fu-Da YEN, Che-Jui LIAO
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Publication number: 20240151972Abstract: An augmented reality (AR) display is provided. The display comprises a light field generator and a birdbath eyepiece. The light field generator generates a light field as an output. The birdbath eyepiece connects to the light field generator for receiving and projecting the light field to human eye. The birdbath eyepiece comprises a beam splitter and a combiner. The combiner has a curved surface. Each beam of the light field is split into two beams by the beam splitter with one of the split beams reflected by the combiner. Three states-of-use of the birdbath eyepiece are provided for the near-eye light field AR display to transmit the light field to the human eye. A low f-number (or focal ratio) and a large eyebox are obtained to effectively expand the field of view and increase the volume of space within which the human eye can receive the light field.Type: ApplicationFiled: July 27, 2023Publication date: May 9, 2024Inventors: Chao-Chien Wu, Jiun-Woei Huang, Hong-Ming Chen
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Publication number: 20240152463Abstract: The invention provides a configurable memory system including an interface layer, an overlay application layer, and a memory relocatable layer. The interface layer has a physical memory attribute module and a physical memory protection module. The interface layer manages memory attributes and memory security. The overlay application layer is coupled to the interface layer and executes an exception handler process to check if an overlay exception has occurred. The memory relocatable layer, coupled to the interface layer and the overlay application layer, having a plurality of resident service program within a first memory space, an overlay physical region within a second memory space, and a plurality of overlay virtual regions having application processes within a third memory space. The application processes of one of the overlay virtual regions is determined to be executed by the PMA module and is copied from the overlay virtual region to the overlay physical region by a processor.Type: ApplicationFiled: November 9, 2022Publication date: May 9, 2024Applicant: ANDES TECHNOLOGY CORPORATIONInventors: Chih-Ming Shen, Cheng-Yen Huang