Patents by Inventor Ming Huang

Ming Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240170065
    Abstract: The present disclosure provides a high voltage (HV) switch system for a memory device that includes a first switch configured to transfer a boost voltage during a first time period to a first set of selected word lines or a second set of selected word lines of the memory device; a second switch configured to transfer a target regulated voltage during a second time period to the first set of the selected word lines when programming a first set of memory cells coupled to the first set of the selected word lines; and a third switch configured to transfer the target regulated voltage during the second time period to the second set of the selected word lines that is different from the first set of word lines when programming a second set of memory cells coupled to the second set of the selected word lines.
    Type: Application
    Filed: December 22, 2022
    Publication date: May 23, 2024
    Applicant: Yangtze Memory Technologies Co., Ltd.
    Inventors: Li XIANG, Ming YANG, Wei HUANG
  • Publication number: 20240170211
    Abstract: A metal electrode of a ceramic capacitor and a method of forming the same are provided. The method includes mixing metal powders and a barium titanate organic-precursor to obtain precursor powders; adding an adhesive to the precursor powders to obtain a metal slurry; performing a molding process to the metal slurry to obtain a film material; performing a binder burn-out process to the film material to obtain a degumming film; and performing a sintering process to the degumming film to obtain the metal electrode. By mixing specific amount of barium titanate organic-precursor with the metal powders, the barium titanate metallic organic-precursor can be transformed to barium titanate in the following process, and barium titanate can be dispersed between the metals homogeneously. Therefore, electrode continuity can be increased.
    Type: Application
    Filed: February 24, 2023
    Publication date: May 23, 2024
    Inventors: Hsing-I HSIANG, Fu-Su YEN, Chi-Yuen HUANG, Chun-Te LEE, Kai-Hsun YANG, Shih-Ming WANG
  • Publication number: 20240169910
    Abstract: A pixel circuit includes a light-emitting element, a driving circuit, a first light-emitting control circuit, a compensation control circuit and a resetting circuit. The resetting circuit is configured to write an initial voltage into the first electrode of the light-emitting element under the control of a first light-emitting control signal, the first light-emitting control circuit is configured to control the first electrode of the light-emitting element to be electrically connected to the first terminal of the driving circuit under the control of a second light-emitting control signal, and the compensation control circuit is configured to control the control terminal of the driving circuit to be electrically connected to the first terminal of the driving circuit under the control of a first scanning signal.
    Type: Application
    Filed: June 23, 2021
    Publication date: May 23, 2024
    Inventors: Yao HUANG, Tianyi CHENG, Ming HU, Weiyun HUANG, Benlian WANG, Doyoung KIM, Long MA
  • Patent number: 11990375
    Abstract: Methods of cutting fins, and structures formed thereby, are described. In an embodiment, a structure includes a first fin on a substrate, a second fin on the substrate, and a fin cut-fill structure disposed between the first fin and the second fin. The first fin and the second fin are longitudinally aligned. The fin cut-fill structure includes an insulating liner and a fill material on the insulating liner. The insulating liner abuts a first sidewall of the first fin and a second sidewall of the second fin. The insulating liner includes a material with a band gap greater than 5 eV.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: May 21, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shih-Wen Huang, Jaming Chang, Kai Hung Cheng, Chia-Hui Lin, Jei Ming Chen
  • Patent number: 11989005
    Abstract: A system performs adaptive thermal ceiling control at runtime. The system includes computing circuits and a thermal management module. When detecting a runtime condition change that affects power consumption in the system, the thermal management module determines an adjustment to the thermal ceiling of a computing circuit, and increases the thermal ceiling of the computing circuit according to the adjustment.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: May 21, 2024
    Assignee: MediaTek Inc.
    Inventors: Bo-Jr Huang, Jia-Wei Fang, Jia-Ming Chen, Ya-Ting Chang, Chien-Yuan Lai, Cheng-Yuh Wu, Yi-Pin Lin, Wen-Wen Hsieh, Min-Shu Wang
  • Patent number: 11988866
    Abstract: A light guide plate including a light emitting surface, a bottom surface, a light incident surface, multiple protrusion structures, and multiple grooves is provided. The light incident surface is connected between the light emitting surface and the bottom surface. The protrusion structures are disposed along a first direction and extend toward a second direction. The protrusion structures have a light condensing angle along the first direction, and the light condensing angle ranges from 10 degrees to 40 degrees. The grooves are disposed in the protrusion structures of the light guide plate. The grooves extend toward the first direction. The protrusion structures have a light receiving surface that defines each groove and is closer to the light incident surface. An angle between the light receiving surface and the bottom surface ranges from 35 degrees to 65 degrees. A display apparatus adopting the light guide plate is also provided.
    Type: Grant
    Filed: August 25, 2022
    Date of Patent: May 21, 2024
    Assignees: Nano Precision (SuZhou) CO., LTD., Coretronic Corporation
    Inventors: Ming-Yu Chou, Hsin Huang, Hao-Jan Kuo, Kuan-Wen Liu, Yun-Chao Chen
  • Patent number: 11986763
    Abstract: A remote control system for gas detection and purification is disclosed and includes a remote control device, a gas detection module and a gas purification device. The remote control device includes a gas inlet and a gas outlet. The gas detection module is disposed in the remote control device and in communication with the gas outlet to detect the gas located in an indoor space. The gas detection module provides and outputs a gas detection datum, and the remote control device transmits an operation command via wireless transmission. The gas purification device is disposed in the indoor space and receives the operating instruction transmitted from the remote control device to be operated. When the gas purification device is under the activated state, the gas in the indoor space is purified, and the purification operation mode of the gas purification device is adjusted according to the first gas detection datum.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: May 21, 2024
    Assignee: MICROJET TECHNOLOGY CO., LTD.
    Inventors: Hao-Jan Mou, Yung-Lung Han, Chi-Feng Huang, Chun-Yi Kuo, Yang Ku, Chang-Yen Tsai, Wei-Ming Lee
  • Publication number: 20240162291
    Abstract: A transistor with a fin structure and a nanosheet includes a fin structure. A first gate device is disposed on the fin structure. A first source/drain layer is disposed at one side of the first gate device. A first source/drain layer is on the fin structure and extends into the fin structure. A second source/drain layer is disposed at another side of the first gate device. The second source/drain layer is on the fin structure and extends into the fin structure. A nanosheet is disposed above the first gate device, between the first source/drain layer and the second source/drain layer, and contacts the first source/drain layer and the second source/drain layer. A second gate device surrounds the nanosheet.
    Type: Application
    Filed: December 7, 2022
    Publication date: May 16, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Ching-In Wu, Yu-Ming Lin, Cheng-Tung Huang
  • Publication number: 20240162317
    Abstract: A non-volatile memory device includes a memory cell including a substrate, a select gate, a control gate, a planar floating gate, a coupling dielectric layer, an erase gate dielectric layer, and an erase gate. The select gate and the control gate are disposed on the substrate and laterally spaced apart from each other, and the control gate includes a non-vertical surface. The planar floating gate includes a lateral tip laterally spaced apart from the control gate. The coupling dielectric layer includes a first thickness (T1). The erase gate dielectric layer covers the non-vertical surface of the control gate and the lateral tip of the planar floating gate, and includes a second thickness (T2). The erase gate covers the erase gate dielectric layer and the lateral tip of the planar floating gate. The first thickness and the second thickness satisfy the following relation: (T2)<(T1)<2(T2).
    Type: Application
    Filed: October 20, 2023
    Publication date: May 16, 2024
    Inventors: Der-Tsyr Fan, I-Hsin Huang, Tzung-Wen Cheng, Yu-Ming Cheng, Chen-Ming Tsai
  • Publication number: 20240161250
    Abstract: Techniques are disclosed herein for generating a content item. The techniques include performing one or more first denoising operations based on an input and a first machine learning model to generate a first content item, and performing one or more second denoising operations based on the input, the first content item, and a second machine learning model to generate a second content item, where the first machine learning model is trained to denoise content items having an amount of corruption within a first corruption range, the second machine learning model is trained to denoise content items having an amount of corruption within a second corruption range, and the second corruption range is lower than the first corruption range.
    Type: Application
    Filed: October 11, 2023
    Publication date: May 16, 2024
    Inventors: Yogesh BALAJI, Timo Oskari AILA, Miika AITTALA, Bryan CATANZARO, Xun HUANG, Tero Tapani KARRAS, Karsten KREIS, Samuli LAINE, Ming-Yu LIU, Seungjun NAH, Jiaming SONG, Arash VAHDAT, Qinsheng ZHANG
  • Publication number: 20240161403
    Abstract: Text-to-image generation generally refers to the process of generating an image from one or more text prompts input by a user. While artificial intelligence has been a valuable tool for text-to-image generation, current artificial intelligence-based solutions are more limited as it relates to text-to-3D content creation. For example, these solutions are oftentimes category-dependent, or synthesize 3D content at a low resolution. The present disclosure provides a process and architecture for high-resolution text-to-3D content creation.
    Type: Application
    Filed: August 9, 2023
    Publication date: May 16, 2024
    Inventors: Chen-Hsuan Lin, Tsung-Yi Lin, Ming-Yu Liu, Sanja Fidler, Karsten Kreis, Luming Tang, Xiaohui Zeng, Jun Gao, Xun Huang, Towaki Takikawa
  • Publication number: 20240162316
    Abstract: A non-volatile memory device includes at least one memory cell and the memory cell includes a substrate, a select gate, a control gate, a floating gate, and an erase gate. The select gate is disposed on the substrate, and the control gate is disposed on the substrate and laterally spaced apart from the select gate. The control gate comprises a non-vertical surface. The floating gate includes a vertical portion and a horizontal portion. The vertical portion disposed between the select gate and the control gate and includes a first top tip laterally spaced apart from the control gate. The horizontal portion is disposed between the substrate and the control gate, where the horizontal portion includes a lateral tip laterally and vertically spaced apart from the control gate. The erase gate covers the non-vertical surface of the control gate and the lateral tip of the horizontal portion of the floating gate.
    Type: Application
    Filed: October 6, 2023
    Publication date: May 16, 2024
    Inventors: Der-Tsyr Fan, I-Hsin Huang, Tzung-Wen Cheng, Yu-Ming Cheng
  • Publication number: 20240161797
    Abstract: An integrated circuit (IC) device includes memory cells each including first through fourth memory elements. The first memory element is physically arranged, along a first axis, between a bit line and a first auxiliary conductive line. The second memory element is physically arranged, along the first axis, between a second auxiliary conductive line and a first conductor. The first and second memory elements are arranged in a first row along the first axis. The third memory element is physically arranged, along the first axis, between the first auxiliary conductive line and a second conductor electrically coupled to the first conductor. The fourth memory element is physically arranged, along the first axis, between the bit line and the second auxiliary conductive line. The third and fourth memory elements are arranged, along the first axis, in a second row spaced from the first row along an axis transverse to the first axis.
    Type: Application
    Filed: January 24, 2024
    Publication date: May 16, 2024
    Inventors: Bo-Feng YOUNG, Yu-Ming LIN, Shih-Lien Linus LU, Han-Jong CHIA, Sai-Hooi YEONG, Chia-En HUANG, Yih WANG
  • Publication number: 20240162455
    Abstract: A battery cell including a membrane electrode assembly, a cathode bipolar plate and an anode bipolar plate. The anode bipolar plate includes a metal layer and a thermally conductive layer. The metal layer is stacked on a side of the membrane electrode assembly that is located farthest away from the cathode bipolar plate. The metal layer has a bottom surface, a top surface, a first side surface and a second side surface. The bottom surface faces the membrane electrode assembly. The thermally conductive layer includes a first cover layer and two second cover layers. The first cover layer covers the top surface of the metal layer. The two second cover layers protrude from two opposite sides of the first cover layer, respectively. The two second cover layers at least partially cover the first side surface and the second side surface of the metal layer, respectively.
    Type: Application
    Filed: March 16, 2023
    Publication date: May 16, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chien-Ming LAI, Sung-Chun CHANG, Chiu-Ping HUANG, Li-Duan TSAI
  • Publication number: 20240162349
    Abstract: A device includes a semiconductor fin, and a gate stack on sidewalls and a top surface of the semiconductor fin. The gate stack includes a high-k dielectric layer, a work-function layer overlapping a bottom portion of the high-k dielectric layer, and a blocking layer overlapping a second bottom portion of the work-function layer. A low-resistance metal layer overlaps and contacts the work-function layer and the blocking layer. The low-resistance metal layer has a resistivity value lower than second resistivity values of both of the work-function layer and the blocking layer. A gate spacer contacts a sidewall of the gate stack.
    Type: Application
    Filed: January 24, 2024
    Publication date: May 16, 2024
    Inventors: Chung-Chiang Wu, Po-Cheng Chen, Kuo-Chan Huang, Hung-Chin Chung, Hsien-Ming Lee, Chien-Hao Chen
  • Publication number: 20240162315
    Abstract: A non-volatile memory device includes at least one memory cell, and the memory cell includes a substrate, an assist gate structure, a tunneling dielectric layer, a floating gate, and an upper gate structure. The assist gate structure is disposed on the substrate. The floating gate includes two opposite first top edges arranged along a first direction, two opposite first sidewalls arranged along the first direction, and two opposite second sidewalls arranged along a second direction different from the first direction. The upper gate structure covers the assist gate structure and the floating gate, where at least one of the first top edges of the floating gate is embedded in the upper gate structure. Portions of the upper gate structure extend beyond the second sidewalls of the floating gate in the second direction, and the portions of the upper gate structure are disposed above the substrate.
    Type: Application
    Filed: December 28, 2022
    Publication date: May 16, 2024
    Applicant: IOTMEMORY TECHNOLOGY INC.
    Inventors: Der-Tsyr Fan, I-Hsin Huang, Tzung-Wen Cheng, Yu-Ming Cheng
  • Publication number: 20240161652
    Abstract: A method includes determining one or more metrics of a surgical task being performed by a surgeon based at least partially upon a type of the surgical task being performed and a video of the surgical task being performed. The method also includes determining a surgical skill of the surgeon during the surgical task based at least partially upon the video, the one or more metrics, or a combination thereof.
    Type: Application
    Filed: March 22, 2022
    Publication date: May 16, 2024
    Applicant: THE JOHNS HOPKINS UNIVERSITY
    Inventors: Satyanarayana S. VEDULA, Shameema SIKDER, Gregory D. HAGER, Tae Soo KIM, Chien-Ming HUANG, Anand MALPANI, Kristen H. PARK, Bohua WAN
  • Publication number: 20240162185
    Abstract: An electronic device including a circuit structure, a bonding element and an electronic unit is disclosed. The circuit structure includes a conductive pad, and the conductive pad has an accommodating recess. At least a portion of the bonding element is disposed in the accommodating recess. The electronic unit is electrically connected to the conductive pad through the bonding element. The accommodating recess has a bottom surface and an opening opposite to the bottom surface, and a width of the bottom surface is greater than a width of the opening.
    Type: Application
    Filed: December 25, 2022
    Publication date: May 16, 2024
    Applicant: InnoLux Corporation
    Inventors: Chin-Ming HUANG, Cheng-Chi WANG, Kuan-Hsueh LIN
  • Patent number: 11983640
    Abstract: Techniques for generating a natural language question template for an artificial intelligence question and answer (QA) system are disclosed. A graph database query relating to a QA system is parsed using a predefined schema. The parsing includes extracting a first plurality of values from the graph database query relating to a where clause in the graph database query, extracting a second plurality of values from the graph database query relating to a return clause in the graph database query, identifying a QA template rule relating to the graph database query, based on a match clause in the graph database query. A natural language question template is generated based on the first plurality of values, the second plurality of values, and the identified QA template rule. The natural language question template is suitable for use by the QA system as part of generating a response to a natural language question.
    Type: Grant
    Filed: December 30, 2019
    Date of Patent: May 14, 2024
    Assignee: International Business Machines Corporation
    Inventors: Zi Ming Huang, Jian Wang, Jing Li, Jian Min Jiang, Ke Wang, Xin Ni
  • Patent number: 11985314
    Abstract: Video processing methods and apparatuses in a video encoding or decoding system for processing out-of-bounds nodes in a current picture. An out-of-bounds node is a coding tree node with a block region across a current picture boundary. The video processing method or apparatus determines an inferred splitting type, applies the inferred splitting type to split the out-of-bounds node into child blocks, adaptively splits each child block into one or multiple leaf blocks, and encodes or decodes the leaf blocks in the out-of-bounds node inside the current picture. The inferred splitting type for partitioning out-of-bounds nodes in an inter slice, picture, or tile is the same as the inferred splitting type for partitioning out-of-bounds nodes in an intra slice, picture, or tile.
    Type: Grant
    Filed: December 24, 2019
    Date of Patent: May 14, 2024
    Assignee: HFI INNOVATION INC.
    Inventors: Chia-Ming Tsai, Chih-Wei Hsu, Tzu-Der Chuang, Ching-Yeh Chen, Yu-Wen Huang, Shih-Ta Hsiang