Patents by Inventor Motoyasu Terao

Motoyasu Terao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080121860
    Abstract: A semiconductor memory cell and forming method thereof utilizes a vertical select transistor to eliminate the problem of a large cell surface area in memory cells of the related art utilizing phase changes. A memory cell with a smaller surface area than the DRAM device of the related art is achieved by the present invention. Besides low power consumption during read operation, the invention also provides phase change memory having low power consumption even during write operation. Phase change memory also has stable read-out operation.
    Type: Application
    Filed: January 16, 2008
    Publication date: May 29, 2008
    Inventors: Hideyuki Matsuoka, Kiyoo Itoh, Motoyasu Terao, Satoru Hanzawa, Takeshi Sakata
  • Publication number: 20080089154
    Abstract: A memory device is provided which includes a substrate, lower electrodes, selecting elements, memory elements formed of chalcogenide material and upper electrodes. The selecting elements and the memory elements are arranged to be disposed between the upper electrodes and the lower electrodes. In addition, the lower electrodes, the memory elements and the upper electrodes are disposed along lines perpendicular to the substrate surface when the memory device is viewed in a first direction.
    Type: Application
    Filed: December 7, 2007
    Publication date: April 17, 2008
    Inventors: Motoyasu Terao, Norikatsu Takaura, Kenzp Kurotsuchi, Hideyuki Matsuoka, Tsuyoshi Yamauchi
  • Patent number: 7351460
    Abstract: An information recording medium includes an insulating member, first and second electrodes formed in one plane of the insulating member, and a conductive layer having an electrochromic material providing continuity with the first and second electrodes. A gap between the first and second electrodes is insulated.
    Type: Grant
    Filed: August 30, 2004
    Date of Patent: April 1, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Kyoko Kojima, Motoyasu Terao
  • Patent number: 7349319
    Abstract: An information recording apparatus includes a multilayer information recording medium having a first layer containing an electro-chromic material, an electrode layer applying a voltage to the first layer to color the first layer, a second layer containing an electro-chromic material, a unit for applying the voltage to the first layer, a first optical irradiating unit for irradiating a first optical spot onto the first layer, and a second optical irradiating unit for irradiating a second optical spot onto the second layer after irradiating the first optical spot onto the first layer.
    Type: Grant
    Filed: January 26, 2004
    Date of Patent: March 25, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Motoyasu Terao, Kyoko Kojima, Hiroyuki Minemura, Takeshi Maeda, Takeshi Shimano
  • Publication number: 20080062736
    Abstract: The object of the invention is to avoid an unselected data line being driven in a memory array composed of memory cells each of which uses a storage element depending upon variable resistance and a selection transistor when the selection transistors in all memory cells on a selected wordline conduct. To achieve the object, a source line parallel to a data line is provided, a precharge circuit for equipotentially driving both and a circuit for selectively driving the source line are arranged. Owing to this configuration, a current path is created in only a cell selected by a row decoder and a column decoder and a read-out signal can be generated. Therefore, a lower-power, lower-noise and more highly integrated nonvolatile memory such as a phase change memory can be realized, compared with a conventional type.
    Type: Application
    Filed: October 25, 2007
    Publication date: March 13, 2008
    Inventors: Satoru Hanzawa, Kiyoo Itoh, Hideyuki Matsuoka, Motoyasu Terao, Takeshi Sakata
  • Patent number: 7341892
    Abstract: A semiconductor memory cell and forming method thereof utilizes a vertical select transistor to eliminate the problem of a large cell surface area in memory cells of the related art utilizing phase changes. A memory cell with a smaller surface area than the DRAM device of the related art is achieved by the present invention. Besides low power consumption during read operation, the invention also provides phase change memory having low power consumption even during write operation. Phase change memory also has stable read-out operation.
    Type: Grant
    Filed: March 7, 2006
    Date of Patent: March 11, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Hideyuki Matsuoka, Kiyoo Itoh, Motoyasu Terao, Satoru Hanzawa, Takeshi Sakata
  • Publication number: 20080048166
    Abstract: With a high-speed nonvolatile phase change memory, reliability in respect of the number of refresh times is enhanced. In a memory cell forming area of a phase change memory using a MISFET as a transistor for selection of memory cells, a phase change material layer of a memory cell comprising a resistor element, using a phase change material, is formed for common use. As a result, variation in shape and a change in composition of the phase change material, caused by isolation of memory cell elements by etching, are reduced, thereby enhancing reliability of memory cells, in respect of the number of refresh times.
    Type: Application
    Filed: October 19, 2007
    Publication date: February 28, 2008
    Inventors: Norikatsu Takaura, Hideyuki Matsuoka, Motoyasu Terao, Kenzo Kurotsuchi, Tsuyoshi Yamauchi
  • Patent number: 7335907
    Abstract: A phase change memory device is provided which is constituted by memory cells using memory elements and select transistors and having high heat resistance to be capable of an operation at 140 degrees or higher. As a device configuration, a recording layer of which, of Zn—Ge—Te, content of Zn, Cd or the like is 20 atom percent or more, content of at least one element selected from the group consisting of Ge and Sb is less than 40 atom percent, and content of Te is 40 atom percent or more is used. It is thereby possible to implement the memory device usable for an application which may be performed at a high temperature such as an in-vehicle use.
    Type: Grant
    Filed: March 3, 2004
    Date of Patent: February 26, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Motoyasu Terao, Norikatsu Takaura, Kenzo Kurotsuchi, Hideyuki Matsuoka, Tsuyoshi Yamauchi
  • Patent number: 7324372
    Abstract: The object of the invention is to avoid an unselected data line being driven in a memory array composed of memory cells each of which uses a storage element depending upon variable resistance and a selection transistor when the selection transistors in all memory cells on a selected word line conduct. To achieve the object, a source line parallel to a data line is provided, a precharge circuit for equipotentially driving both and a circuit for selectively driving the source line are arranged. Owing to this configuration, a current path is created in only a cell selected by a row decoder and a column decoder and a read-out signal can be generated. Therefore, a lower-power, lower-noise and more highly integrated nonvolatile memory such as a phase change memory can be realized, compared with a conventional type.
    Type: Grant
    Filed: August 22, 2006
    Date of Patent: January 29, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Satoru Hanzawa, Kiyoo Itoh, Hideyuki Matsuoka, Motoyasu Terao, Takeshi Sakata
  • Publication number: 20080012934
    Abstract: A recording medium including a plurality of recording layers, including: an optional first recording layer on which a light spot at a diffraction limit is formed; and a second recording layer on which a mark string pattern is formed, said second recording layer being different from said first recording layer, wherein when said mark string pattern is formed on a light receiving plane, while information of said first recording layer is reproduced, assuming that an optical distance between said first and second recording layers is dm, an optical distance d between optional two recording layers among a plurality of said recording layers is different from said dm.
    Type: Application
    Filed: July 23, 2007
    Publication date: January 17, 2008
    Inventors: Hisataka Sugiyama, Takeshi Maeda, Kiyoshi Matsumoto, Motoyasu Terao, Shigenori Okamine, Tetsuya Nishida, Harukazu Miyamoto
  • Patent number: 7286153
    Abstract: In a three-dimensional recording and reproducing apparatus having a recording medium including a plurality of recording layers stacked on a substrate and an optical system for converging a light irradiated from the substrate side on each of the plurality of recording layers to three-dimensionally record and reproduce information, the following equation is satisfied: ?/4?(1/8NB)(1/NB2?1)NAF4?d where ?: Wavelength of the light; NB: Refractivity of the substrate 3; NAF: Numerical aperture of a focus lens 8 for converging a light; ?d: Positional range in the optical axis direction in which exists a recording layer on which the light is to be converged. A light spot is focused on each layer of the multi-layer structured disc to record and reproduce highly reliable data in a high density.
    Type: Grant
    Filed: April 26, 1995
    Date of Patent: October 23, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Hisataka Sugiyama, Takeshi Maeda, Kiyoshi Matsumoto, Motoyasu Terao, Shigenori Okamine, Tetsuya Nishida, Harukazu Miyamoto
  • Publication number: 20070235710
    Abstract: In non-volatile storage device using a variable resistance material, when a crystal state and a noncrystalline state co-exists in the variable resistance material, a crystallization time is shorted, resulting in decrease of the time to maintain information stored. Heat radiation is not rapidly performed during rewriting and thus it takes a long time to complete the rewriting due to a low thermal conductivity of a material contacting the variable resistance material. According to the present invention, a contact area between a variable resistance material and a lower electrode, and a contact area between the variable resistance material and an upper electrode are made equal to each other, thereby unifying a current path. The invention provides a structure in which a material having a high thermal conductivity is disposed so as to contact a sidewall of the variable resistance material, and its end portion is made to contact the lower electrode as well.
    Type: Application
    Filed: July 4, 2005
    Publication date: October 11, 2007
    Applicant: RENESAS TECHNOLOGY CORP.
    Inventors: Nozomu Matsuzaki, Motoyasu Terao
  • Patent number: 7263053
    Abstract: An information recording method and information recording apparatus is capable of resolving the trade-off relation between recording density and transmittance, wherein either the reproduction (playback) signal quality or the recording sensitivity is lowered. For this purpose, a voltage is applied by way of ball bearings or slip rings to a specified layer of a medium having multiple layers. The light transmittance of the recording layer is changed by application of this voltage. The tradeoff relationship between recording density and transmittance is eliminated thereby, and the recording density and transmittance levels are both improved, so as to enhance the recording reliability.
    Type: Grant
    Filed: April 6, 2004
    Date of Patent: August 28, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Motoyasu Terao, Katsuhiko Yamaguchi, Tadao Ino, Kyoko Kojima, Harukazu Miyamoto, Takeshi Maeda, Yuko Tsuchiya
  • Patent number: 7247357
    Abstract: The image display device has a display section formed of plural pixels and a control section which controls the display section, and is provided with nonvolatile phase-change type pixel memories in respective ones of the pixels, or is provided with a nonvolatile phase-change type frame memory in the control section. Each of the nonvolatile phase-change type pixel memories is formed of one or more switches and a variable-resistance memory element fabricated from a chalcogenide material for storing display data for at least a specified period of time. The nonvolatile phase-change type frame memory is formed of one or more switches and a variable-resistance memory element fabricated from a chalcogenide material for retaining display data for one frame.
    Type: Grant
    Filed: February 6, 2004
    Date of Patent: July 24, 2007
    Assignee: Hitachi Displays, Ltd.
    Inventors: Takeo Shiba, Motoyasu Terao, Hideyuki Matsuoka
  • Patent number: 7229709
    Abstract: The magnetic recording medium provided is produced by forming a substrate having a nanoparticle layer comprising an array of nanoparticles, and an organic compound between said array of nanoparticles; irradiating the nanoparticle layer with an infrared beam to magnetize the nanoparticles; applying a magnetic field to the nanoparticle layer to orient easy axis of magnetization of the magnetic nanoparticles in a substantially uniform direction; and irradiating the nanoparticle layer with an ultraviolet beam to bind said organic compound to thereby produce a magnetic recording medium wherein easy axis of magnetization of the nanoparticles has been oriented in a direction substantially parallel to a direction at a particular angle with the substrate. The resulting magnetic recording medium experiences no deterioration of the underlying layer or the soft magnetic layer, and exhibits good magnetic properties.
    Type: Grant
    Filed: January 5, 2004
    Date of Patent: June 12, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Yuko Tsuchiya, Motoyasu Terao
  • Publication number: 20070058518
    Abstract: In an optical disk in which a recording layer is selected by applying voltages, a different address pit is formed in each recording layer. To this end, a plurality of recording layers are formed in a way that the plurality of recording layers follow a concavo-convex shape formed in a substrate, and thus the plurality of recording layers keep the concavo-convex shape even after the formation; mutually different address marks are add-on written, as a part of the address information, respectively to recording layer so that the address and track information can be confirmed in each layer.
    Type: Application
    Filed: August 9, 2006
    Publication date: March 15, 2007
    Inventors: Akemi Hirotsune, Motoyasu Terao, Takeshi Maeda, Masaki Mukoh, Toshimichi Shintani
  • Patent number: 7169334
    Abstract: A compound constructed by N (N is an integer of 2 or more) kinds of phases containing at least one kind of elements selected from a group consisting of Co, Ti, V, Cr, Mn, Fe, Ni, Si, Pb, Bi and Al. At least one kind to (N?1) kinds among the N kinds of phases are continuous phases, and the other phases are discontinuous phases.
    Type: Grant
    Filed: September 26, 2003
    Date of Patent: January 30, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Hiroki Yamamoto, Takashi Naito, Takashi Namekawa, Yasuo Imanishi, Motoyasu Terao, Toshimichi Shintani, Ken Takahashi
  • Publication number: 20060291360
    Abstract: A recording and reproduction method utilized for multilayer optical disks, wherein a light source for the servo layer and a light source for the recording layer are modulated at different frequencies or made to irradiate by time division onto a multilayer optical disk formed from a combination of a plurality of recording layers and one servo layer, so that information from each layer can be separated by even just one optical sensor.
    Type: Application
    Filed: August 24, 2005
    Publication date: December 28, 2006
    Inventors: Takeshi Maeda, Motoyasu Terao
  • Patent number: 7154842
    Abstract: A recording apparatus for recording information to an optical recording medium having an aligned prepit portion straddled on a plurality of tracks in a radial direction, which prepit portion includes first and second prepit portions divided in a track direction. A prepit of the respective first and second prepit portions is arranged on a boundary of the respective tracks. The first prepit portion has an address information prepit and a synchronous information prepit and the second prepit portion has synchronous information prepit, the prepit of the first and second prepit portions being arranged at every two-track pitch in the radial direction and with one track displaced in the radial direction. The apparatus includes an irradiation source for irradiating a light spot on the optical recording medium, and a controller for controlling an irradiation position of an optical spot from the irradiation source.
    Type: Grant
    Filed: July 12, 2005
    Date of Patent: December 26, 2006
    Assignees: Hitachi, Ltd., Hitachi Maxell, Ltd.
    Inventors: Harukazu Miyamoto, Hirofumi Sukeda, Motoyasu Terao, Hiroyuki Minemura, Tetsuo Andou
  • Publication number: 20060280010
    Abstract: The object of the invention is to avoid an unselected data line being driven in a memory array composed of memory cells each of which uses a storage element depending upon variable resistance and a selection transistor when the selection transistors in all memory cells on a selected word line conduct. To achieve the object, a source line parallel to a data line is provided, a precharge circuit for equipotentially driving both and a circuit for selectively driving the source line are arranged. Owing to this configuration, a current path is created in only a cell selected by a row decoder and a column decoder and a read-out signal can be generated. Therefore, a lower-power, lower-noise and more highly integrated nonvolatile memory such as a phase change memory can be realized, compared with a conventional type.
    Type: Application
    Filed: August 22, 2006
    Publication date: December 14, 2006
    Inventors: Satoru Hanzawa, Kiyoo Itoh, Hideyuki Matsuoka, Motoyasu Terao, Takeshi Sakata