Abstract: Various embodiments are directed to fine pattern structures, such as fine pattern structures having block co-polymer materials, methods of forming fine pattern structures with block co-polymer materials, and methods of fabricating semiconductor devices including fine pattern structures with block co-polymer materials. According to some embodiments, a method of fabricating a fine pattern structure includes providing a layer of alternating protrusion portions and recess portions, forming polymer patterns in recess regions formed in the recess portions, forming brush patterns on top surfaces of the protrusion portions, forming first polymer block patterns on the brush patterns and second polymer block patterns on the polymer patterns, and removing the second polymer block patterns and the polymer patterns.

Abstract: A method of driving light source includes detecting a frequency of a dimming signal, which controls a luminance of a light source, to output a frequency detection signal, and outputting a current control signal, which controls a current flow in the light source, based on the frequency detection signal, where the current control signal has a frequency substantially the same as the frequency of the dimming signal.

Abstract: A nanoscale structure includes an array of pillars over an underlying layer, a separation wall layer including first separation walls formed over sidewalls of the pillars, and a block co-polymer (BCP) layer formed over the separation wall layer and filling gaps between the pillars. The BCP layer is phase-separated to include first domains that provide second separation walls formed over the first separation walls and second domains that are separated from each other by the first domains.

Abstract: Provided is a large-capacity metal catalyst support and a catalytic converter using the same, in which a number of unit catalyst support blocks are changed in a form of being effectively assembled so as to be applied to a catalytic converter that is required for processing a large amount of exhaust gas such as large vessels or plants employing a number of large-scale internal combustion engines, or large food processing devices, to thus easily assemble the unit catalyst support blocks into a large-scale assembled structure. The catalyst support includes: a number of unit catalyst support blocks in which cell formation bodies formed of a number of hollow cells that are aligned in a longitudinal direction are accommodated and stacked in a polygonal supporter wherein a catalyst is coated on the surfaces of the hollow cells; and a number of assembly members each for fixing a pair of adjacent supports that mutually contact between the stacked unit catalyst support blocks.

Abstract: A method for fine pattern structures includes forming a pattern formation layer over a first region and a second region of a substrate, forming a first block co-polymer layer in the first region, forming a second block co-polymer layer in the second region, etching the first and second block co-polymer layers, and forming the fine pattern structure in the pattern formation layer in the first region without forming a pattern in the pattern formation layer in the second region.

Abstract: Various embodiments are directed to fine pattern structures, such as fine pattern structures having block co-polymer materials, methods of forming fine pattern structures with block co-polymer materials, and methods of fabricating semiconductor devices including fine pattern structures with block co-polymer materials. According to some embodiments, a method of fabricating a fine pattern structure includes providing a layer of alternating protrusion portions and recess portions, forming polymer patterns in recess regions formed in the recess portions, forming brush patterns on top surfaces of the protrusion portions, forming first polymer block patterns on the brush patterns and second polymer block patterns on the polymer patterns, and removing the second polymer block patterns and the polymer patterns.

Abstract: Methods of fabricating nano-scale structures are provided. A method includes forming a first hard mask pattern corresponding to first openings in a dense region, forming first guide elements on the first hard mask pattern aligned with the first openings, and forming second hard mask patterns in a sparse region to provide isolated patterns. A blocking layer is formed in the sparse region to cover the second hard mask patterns. A first domain and second domains are formed in the dense region using a phase separation of a block co-polymer layer. Related nano-scale structures are also provided.

Abstract: The method includes forming an array of first separation walls on an underlying layer. A block co-polymer (BCP) layer is formed to fill inside regions of the first separation walls and gaps between the first separation walls. The BCP layer is phase-separated to include first domains that provide second separation walls covering inner sidewalls and outer sidewalls of the first separation walls and second domains that are separated from each other by the first domains.

Abstract: Semiconductor devices are provided. The semiconductor device includes a bit line contact plug and a storage node contact plug electrically connected to an active region of a substrate. A bit line structure is disposed on the bit line contact plug to extend in a first direction. The bit line structure is disposed in a trench pattern that intrudes into a side of the storage node contact plug. Related methods and systems are also provided.

Abstract: Methods of forming fine patterns are provided. The method includes reinforcing a hydrophobic property of a hard mask layer using a surface treatment process to form a neutral layer, forming a block co-polymer layer on the neutral layer, and phase-separating the block co-polymer layer into first domains and second domains.

Abstract: The method includes forming an array of first separation walls on an underlying layer. A block co-polymer (BCP) layer is formed to fill inside regions of the first separation walls and gaps between the first separation walls. The BCP layer is phase-separated to include first domains that provide second separation walls covering inner sidewalls and outer sidewalls of the first separation walls and second domains that are separated from each other by the first domains.

Abstract: A semiconductor device includes a cell mask pattern disposed in a cell region of a mask substrate and a vernier mask pattern disposed in a vernier region of the mask substrate. The vernier mask pattern includes a variable mask pattern portion to transfer a different shape of pattern depending on the magnitude of exposure energy.

Abstract: A backlight unit includes a power converter configured to generate a light source driving voltage in response to a voltage control signal, a plurality of light emitting diode strings, where each of the light emitting diode strings receives the light source driving voltage through a first terminal thereof, a plurality of transistors corresponding to the light emitting diode strings, where each of the transistors includes: a first electrode connected to a second terminal of a corresponding light emitting diode string thereof; a second electrode; and a control electrode, and a controller connected to the control electrode and the second electrode, where the controller outputs a plurality of current control signals to control electrodes of the transistors and generate the voltage control signal, where the controller generates an over-current detection signal when any one of the current control signals has a pulse width greater than a predetermined reference width.

Abstract: A semiconductor device includes a substrate and a plurality of active pillars disposed on the substrate and spaced apart from each other by trenches. Each of the active pillars includes a buried metal silicide pattern and an active region stacked on the buried metal silicide pattern, and the active region includes impurity junction regions.

Abstract: A semiconductor device includes a cell mask pattern disposed in a cell region of a mask substrate and a vernier mask pattern disposed in a vernier region of the mask substrate. The vernier mask pattern includes a variable mask pattern portion to transfer a different shape of pattern depending on the magnitude of exposure energy.

Abstract: A method of driving a light-source module includes adjusting a frequency of a boosting switching signal based on a dimming signal which controls luminance of a light-emitting diode (“LED”) string of the light-source module, where the LED string comprises a plurality of LEDs connected to each other in series, and controlling a main transistor in response to the boosting switching signal to transfer a driving voltage to the LED string.

Abstract: A semiconductor device includes: an element isolation region formed in a substrate that defines an active region, a conductive layer formed on the active region, a first insulating film formed between the active region and the conductive layer and having a first thickness, and a second insulating film formed between the active region and the conductive layer and spans at least part of a boundary between the active region and the element isolation region and having a second thickness which is greater than the first thickness.

Abstract: A leakage current occurring on a boundary of a trench isolation region and an active region can be prevented in a Metal Oxide Semiconductor (MOS) Field Effect transistor, and a fabricating method thereof is provided. The transistor includes the trench isolation region disposed in a predetermined portion of a semiconductor substrate to define the active region. A source region and a drain region are spaced apart from each other within the active region with a channel region disposed between the source region and the drain region. A gate electrode crosses over the channel region between the source region and the drain region, and a gate insulating layer is disposed between the gate electrode and the channel region. An edge insulating layer thicker than the gate insulating layer is disposed on a lower surface of the gate electrode around the boundary of the trench isolation region and the active region.

Abstract: Provided is a catalyst converter for purifying exhaust gas and a method for manufacturing the catalyst converter, in which a heater is disposed between inner/outer monoliths, to thereby heighten a heat transfer efficiency and induce a uniform catalytic reaction, and to thereby enhance a processing performance, and minimize an electric power consumption and miniaturize a device. The catalyst converter includes: a heater having a winding portion which is wound so as to have a space therein and a pair of electric power terminals; inner and outer monoliths which are inserted in the inner and outer circumferential portions of the heater winding portion wherein each of the inner and outer monoliths includes a number of hollow cells on the surfaces of which catalysts have been coated and which are formed in the lengthy direction; and a housing in which a support assembly is assembled.

Abstract: Methods of fabricating an organic light emitting device using plasma and/or thermal decomposition are provided. An insulating layer is formed by reacting first and second radicals. The first radical is formed by passing a first gas through a plasma generating region and a heating body, and the second radical is formed by passing a second gas through the heating body. The methods improve the characteristics of the resulting insulating layer and increase the use efficiency of the source gas by substantially decomposing the source gas. The insulating layer can be a passivation layer formed on an organic light emitting device. The methods use plasma apparatuses such as an inductively coupled plasma chemical vapor deposition (ICP-CVD) apparatuses or plasma enhanced chemical vapor deposition (PECVD) apparatuses.