Patents by Inventor Naoaki Nakamura
Naoaki Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9704775Abstract: A thermal interface sheet includes a peripheral portion, in a surface direction, configured to have a melting point higher than the melting point of a central portion in the surface direction.Type: GrantFiled: October 4, 2016Date of Patent: July 11, 2017Assignee: FUJITSU LIMITEDInventor: Naoaki Nakamura
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Publication number: 20170186719Abstract: A semiconductor device includes a first substrate, a second substrate, a connection portion, and resin. The second substrate faces the first substrate, and has a recess at a position corresponding to an edge portion of the first substrate. The connection portion is interposed between the first substrate and the second substrate, and electrically connects the first substrate and the second substrate. Resin is disposed to remain between the first substrate and the second substrate, and covers the connection portion. Part of the resin is present in the recess of the second substrate. The recess serves as a resin reservoir for resin that is caused to flow upon bonding, and prevents the resin from flowing along a side surface of the first substrate to a back surface thereof, thereby preventing contamination by the resin.Type: ApplicationFiled: December 5, 2016Publication date: June 29, 2017Applicant: FUJITSU LIMITEDInventors: Hidehiko Kira, Naoaki Nakamura, TAKASHI KUBOTA
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Publication number: 20170186718Abstract: An electronic device includes an electronic part including a first substrate having a group of first terminals over a first front surface and having a concavity in a back surface, a filler placed in the concavity, and a flat plate placed over the back surface with the filler therebetween, and further includes a second substrate disposed on the first front surface side of the first substrate and having a group of second terminals bonded to the group of first terminals over a second front surface opposite the first front surface. The filler and flat plate minimize deformation of the first substrate and variation in the distance between the group of first terminals and the group of second terminals caused by the deformation of the first substrate, which thereby reduces the occurrence of a failure in bonding together the group of first terminals and the group of second terminals.Type: ApplicationFiled: December 5, 2016Publication date: June 29, 2017Applicant: FUJITSU LIMITEDInventors: Hidehiko Kira, Naoaki Nakamura, Sanae IIJIMA
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Patent number: 9642287Abstract: A channel distribution type cooling plate where a space between a first coolant storage part for inflow of coolant and a second cooling storage part for outflow of coolant formed at the two ends of an upper space of a main body provided with a lower space for removing heat of a heat generating member is partitioned by a meandering type partition wall to form coolant distribution paths connected to the first coolant storage part and coolant collection paths connected to the second coolant storage part, the bottom of the coolant distribution paths and the coolant collection paths are communicated by a plurality of through holes with the lower space, and side surfaces of the partition wall at the coolant distribution path sides are formed with subchannels for running coolant from the first coolant storage part, in order to improve the cooling efficiency at the coolant outlet side.Type: GrantFiled: May 17, 2016Date of Patent: May 2, 2017Assignee: FUJITSU LIMITEDInventors: Shunichi Kikuchi, Yoshihisa Iwakiri, Naoaki Nakamura, Hiroshi Onuki
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Publication number: 20170084581Abstract: A laminated chip includes: semiconductor chips that are laminated; and multiple types of adhesive insulating resin films that include mutually different characteristics and that are filled between the semiconductor chips, wherein the multiple types of the adhesive insulating resin films are arranged in a chip plane direction, depending on a demand characteristic for each region in a chip plane.Type: ApplicationFiled: August 31, 2016Publication date: March 23, 2017Applicant: FUJITSU LIMITEDInventors: Shunichi Kikuchi, Hiroshi Onuki, Naoaki Nakamura, Yoshihisa IWAKIRI
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Publication number: 20170047269Abstract: A thermal interface sheet includes a peripheral portion, in a surface direction, configured to have a melting point higher than the melting point of a central portion in the surface direction.Type: ApplicationFiled: October 4, 2016Publication date: February 16, 2017Inventor: Naoaki Nakamura
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Publication number: 20160366793Abstract: A channel distribution type cooling plate where a space between a first coolant storage part for inflow of coolant and a second cooling storage part for outflow of coolant formed at the two ends of an upper space of a main body provided with a lower space for removing heat of a heat generating member is partitioned by a meandering type partition wall to form coolant distribution paths connected to the first coolant storage part and coolant collection paths connected to the second coolant storage part, the bottom of the coolant distribution paths and the coolant collection paths are communicated by a plurality of through holes with the lower space, and side surfaces of the partition wall at the coolant distribution path sides are formed with subchannels for running coolant from the first coolant storage part, in order to improve the cooling efficiency at the coolant outlet side.Type: ApplicationFiled: May 17, 2016Publication date: December 15, 2016Applicant: FUJITSU LIMITEDInventors: Shunichi Kikuchi, Yoshihisa IWAKIRI, Naoaki Nakamura, Hiroshi Onuki
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Publication number: 20160109913Abstract: A cooling device that is thermally connected to a heat source and cools the heat source by means of a heat medium flowing inside the cooling device, includes: a first passage configured such that the heat medium before being heated by the heat source flows through the first passage; a second passage configured such that the heat medium after being heated by the heat source flows through the second passage; a plurality of heat exchanging chambers each configured such that in the heat exchanging chamber, the heat medium is heated by heat generated by the heat source; a first communicating passage provided in each of the plurality of heat exchanging chambers and configured such that through the first communicating passage, the first passage and the heat exchanging chamber communicate with each other; a second communicating passage provided in each of the plurality of heat exchanging chambers.Type: ApplicationFiled: September 11, 2015Publication date: April 21, 2016Inventor: Naoaki Nakamura
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Patent number: 9230964Abstract: A semiconductor device includes: a first semiconductor chip having a first antenna that is formed in a first hole provided in the first semiconductor chip, has an inclined surface inclined with respect to a central line of the first hole, and transmits and receives a radio wave; and a second semiconductor chip stacked over the first semiconductor chip, the second semiconductor chip having a second antenna that is formed in a second hole provided in the second semiconductor chip, has an inclined surface inclined with respect to a central line of the second hole, and transmits and receives a radio wave, wherein the first antenna and the second antenna are disposed so that the inclined surface of the first antenna and the inclined surface of the second antenna face each other.Type: GrantFiled: November 13, 2014Date of Patent: January 5, 2016Assignee: FUJITSU LIMITEDInventors: Naoaki Nakamura, Makoto Suwada
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Patent number: 9117788Abstract: A method of repairing a semiconductor device includes turning a press member to apply pressure on an electronic component which is mounted on a substrate. A heat sink which is provided on the electronic component via a bonding layer is thus displaced with respect to the electronic component in a transverse direction. The heat sink is removed from the electronic component by shearing the bonding layer with the press member.Type: GrantFiled: July 18, 2011Date of Patent: August 25, 2015Assignee: FUJITSU LIMITEDInventors: Tsuyoshi Yamamoto, Naoaki Nakamura, Rie Takada, Kenichiro Tsubone, Yasuhide Kuroda, Harumi Yagi
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Publication number: 20150162276Abstract: A semiconductor device includes: a first semiconductor chip having a first antenna that is formed in a first hole provided in the first semiconductor chip, has an inclined surface inclined with respect to a central line of the first hole, and transmits and receives a radio wave; and a second semiconductor chip stacked over the first semiconductor chip, the second semiconductor chip having a second antenna that is formed in a second hole provided in the second semiconductor chip, has an inclined surface inclined with respect to a central line of the second hole, and transmits and receives a radio wave, wherein the first antenna and the second antenna are disposed so that the inclined surface of the first antenna and the inclined surface of the second antenna face each other.Type: ApplicationFiled: November 13, 2014Publication date: June 11, 2015Inventors: Naoaki NAKAMURA, Makoto SUWADA
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Publication number: 20150123259Abstract: A thermal interface sheet includes a peripheral portion, in a surface direction, configured to have a melting point higher than the melting point of a central portion in the surface direction.Type: ApplicationFiled: October 27, 2014Publication date: May 7, 2015Inventor: Naoaki Nakamura
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Publication number: 20130083504Abstract: An electronic device includes: a first plate; a wiring board arranged on the first plate and configured to have a plurality of first terminals on a surface opposite to a surface facing the first plate; an electronic component arranged above the wiring board and configured to have a plurality of second terminals on a surface facing the wiring board; a connecting unit arranged between the wiring board and the electronic component and configured to electrically couple the first terminals and the second terminals; a second plate arranged on the electronic component; a fixing unit arranged in an area outside of an area where the electronic component is placed and configured to pressurize the first plate and the second plate; and a pressing unit arranged below the area where the electronic component is placed and configured to press the wiring board toward the electronic component.Type: ApplicationFiled: August 16, 2012Publication date: April 4, 2013Applicant: FUJITSU LIMITEDInventors: Kenji FUKUZONO, Naoaki NAKAMURA
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Publication number: 20120083151Abstract: A method of detachment of a connector which is provided with a housing having connector pins to be inserted into a board and with a first member which is arranged between the housing and the board and through which the connector pins are inserted, the method including a process of pulling out the connector pins from the board. This process utilizes the lever principle, which uses the first member as a fulcrum and which uses any point on the housing as a point of action, so as to pull out the connector pins from the board.Type: ApplicationFiled: July 19, 2011Publication date: April 5, 2012Applicant: FUJITSU LIMITEDInventors: Rie TAKADA, Tsuyoshi YAMAMOTO, Naoaki NAKAMURA, Harumi YAGI
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Publication number: 20120024512Abstract: A method of repairing a semiconductor device includes turning a press member to apply pressure on an electronic component which is mounted on a substrate. A heat sink which is provided on the electronic component via a bonding layer is thus displaced with respect to the electronic component in a transverse direction. The heat sink is removed from the electronic component by shearing the bonding layer with the press member.Type: ApplicationFiled: July 18, 2011Publication date: February 2, 2012Applicant: FUJITSU LIMITEDInventors: Tsuyoshi Yamamoto, Naoaki Nakamura, Rie Takada, Kenichiro Tsubone, Yosuhide Kuroda, Harumi Yagi
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Patent number: 7880485Abstract: According to an aspect of an embodiment, a high-sensitive resistance measuring device of solder bumps comprises a resistance variation detection unit which detects a differential voltage (?V=V1?V2), which is obtained by subtracting a second voltage (V2) generated in a reference bump connection unit by a constant current (I) from a second constant current source from a first voltage (V1) generated in a monitored bump connection unit by the constant current I from a first constant current source, as a resistance variation voltage representing a resistance variation (?R) of the monitored bump connection unit.Type: GrantFiled: May 7, 2008Date of Patent: February 1, 2011Assignee: Fujitsu LimitedInventor: Naoaki Nakamura
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Publication number: 20090058435Abstract: According to an aspect of an embodiment, a high-sensitive resistance measuring device of solder bumps comprises a resistance variation detection unit which detects a differential voltage (?V=V1?V2), which is obtained by subtracting a second voltage (V2) generated in a reference bump connection unit by a constant current (I) from a second constant current source from a first voltage (V1) generated in a monitored bump connection unit by the constant current I from a first constant current source, as a resistance variation voltage representing a resistance variation (?R) of the monitored bump connection unit.Type: ApplicationFiled: May 7, 2008Publication date: March 5, 2009Applicant: Fujitsu LimitedInventor: Naoaki NAKAMURA
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Semiconductor package, method of production of same, printed circuit board, and electronic apparatus
Publication number: 20080006915Abstract: A semiconductor package provided with a heat radiator achieving a further improvement of reliability by reducing an influence of thermal stress. For this purpose, the heat radiator is formed by a heat radiator comprised of a heat radiation plate plus a box shaped part and comprised so that the entire semiconductor chip is enclosed in this box shaped part together with a board via a metallic bonding material.Type: ApplicationFiled: December 20, 2006Publication date: January 10, 2008Applicant: FUJITSU LIMITEDInventors: Naoaki Nakamura, Hideaki Yoshimura, Kenji Fukuzono, Toshihisa Sato -
Publication number: 20070012477Abstract: An electronic component is mounted on the surface of a printed wiring board. A heat conductive member is received on the surface of the electronic component. A joint material is interposed between the electronic component and the heat conductive member. The joint material is made of material containing Ag in a range exceeding 3 wt % and In. The inventors have demonstrated that voids decrease at the boundary between the joint material and the electronic component as well as at the boundary between the joint material and the heat conductive member as the content of Ag increases in the overall weight of the joint material. The joint material is allowed to enjoy a higher heat conductivity as compared with a conventional solder material. The joint material allows the heat conductive member to efficiently receive heat from the electronic component.Type: ApplicationFiled: September 22, 2005Publication date: January 18, 2007Inventors: Naoaki Nakamura, Hideaki Yoshimura, Kenji Fukuzono, Toshihisa Sato
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Publication number: 20060169591Abstract: A current is supplied to first and second electrically-conductive resistances located away from each other on a straight line defined on an electrically-insulating substrate in a method of making a printed wiring board. A contour of the substrate is formed along the straight line based on the detected resistance values. The method allows an increase in the resistance values of the first and second electrically-conductive resistances in response to reduction of the first and second electrically-conductive resistances, respectively. The resistance values are thus utilized to determine the contour of the electrically-insulating substrate. Any process of defining the contour can be finished based on the determination of the contour. This enables establishment of the contour as designed with a higher accuracy.Type: ApplicationFiled: May 25, 2005Publication date: August 3, 2006Inventors: Manabu Watanabe, Naoaki Nakamura