THERMAL INTERFACE SHEET AND PROCESSOR

A thermal interface sheet includes a peripheral portion, in a surface direction, configured to have a melting point higher than the melting point of a central portion in the surface direction.

Skip to: Description  ·  Claims  · Patent History  ·  Patent History
Description
CROSS-REFERENCE TO RELATED APPLICATION

This application is based upon and claims the benefit of priority of the prior Japanese Patent Application No. 2013-227997, filed on Nov. 1, 2013, the entire contents of which are incorporated herein by reference.

FIELD

The embodiments discussed herein are related to a thermal interface sheet configured to dissipate heat from a semiconductor element effectively and a processor including a thermal interface layer formed from the above-described thermal interface sheet.

BACKGROUND

In recent years, in order to cope with an increase in an amount of heat generation along with enhancement in performance of a semiconductor device, high thermal conduction of a central processing unit (CPU) package structure is realized by using solder serving as a thermal interface material (TIM) between a large scale integration (LSI) and a heat spreader.

For example, a composite material including a thermally conductive metal and silicone particles in the above-described thermally conductive metal (for example, refer to Japanese National Publication of International Patent Application No. 2010-539683), a complex including a homogeneously dispersed material of an indium metal and at least one type of ceramic material and having a thermal conductivity of at least 80 W/mK (for example, refer to Japanese Laid-open Patent Publication No. 2009-161850), and a TIM serving as a phase change portion composed of at least one type of low-melting point metal selected from the group consisting of Ga, In, and Sn or an alloy containing the above-described at least one type of low-melting point metal (for example, refer to Japanese Laid-open Patent Publication No. 2007-335742) have been proposed as the above-described TIM.

In general, it is known that voids are generated at a junction interface of soldering. In the case where the TIM is used, voids lead to reduction in the cooling efficiency and high-temperature irregularity of a device and, therefore, a junction with reduced voids is desired.

However, with respect to the thermal interface materials (TIMs) in the related art including the above-described technologies which have been proposed already, a junction with reduced voids has not been realized because removal of generated voids from the junction surface is difficult.

SUMMARY

According to an aspect of the invention, a thermal interface sheet includes a peripheral portion, in a surface direction, configured to have a melting point higher than the melting point of a central portion in the surface direction.

The object and advantages of the invention will be realized and attained by means of the elements and combinations particularly pointed out in the claims.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are not restrictive of the invention, as claimed.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1A is a schematic top view illustrating an example of a thermal interface sheet;

FIG. 1B is a sectional view of the section taken along a line IB-IB illustrated in FIG. 1A;

FIG. 2A is a schematic top view illustrating another example of the thermal interface sheet;

FIG. 2B is a sectional view of the section taken along a line IIB-IIB illustrated in FIG. 2A;

FIG. 3A is a schematic top view illustrating another example of the thermal interface sheet;

FIG. 3B is a sectional view of the section taken along a line IIIB-IIIB illustrated in FIG. 3A;

FIG. 4A is a schematic top view illustrating another example of the thermal interface sheet;

FIG. 4B is a sectional view of the section taken along a line IVB-IVB illustrated in FIG. 4A;

FIG. 5 is a schematic perspective view of an example of a thermal interface block to produce a thermal interface sheet; and

FIG. 6 is a schematic sectional view of an example of a disclosed processor.

DESCRIPTION OF EMBODIMENTS Thermal Interface Sheet

A disclosed thermal interface sheet includes a peripheral portion, in a surface direction of the above-described thermal interface sheet, configured to have a melting point higher than the melting point of a central portion in the above-described surface direction.

The above-described thermal interface sheet is favorably used for joining a semiconductor element and a heat spreader.

The above-described thermal interface sheet is a sheet having excellent thermal conductivity and may be referred to as a thermally conductive sheet.

Preferably, the melting point of the above-described thermal interface sheet may increase stepwise from the central portion in the surface direction of the above-described thermal interface sheet toward the peripheral portion in the surface direction of the above-described thermal interface sheet.

Preferably, the melting point of the above-described thermal interface sheet may increase little by little from the central portion in the surface direction of the above-described thermal interface sheet toward the peripheral portion in the surface direction of the thermal interface sheet.

The material for the above-described thermal interface sheet is not specifically limited and may be selected appropriately in accordance with the purpose, although it is preferable that solder be contained.

The above-described solder is not specifically limited and may be selected appropriately in accordance with the purpose. For example, In—Ag solder, Sn—Cu solder, Sn—Ag—Cu solder, Sn—Ag—Cu—Bi solder, and the like are mentioned.

The above-described In—Ag solder may have various melting points depending on, for example, the composition ratio of In to Ag, as disclosed in Table 1.

TABLE 1 Melting point In—15Ag 280° C. In—10Ag 231° C. In—7Ag 200° C. In—5Ag 160° C. In—3Ag 141° C.

As for the above-described solder, it is preferable that the solder be configured to contain In because In is mild and has excellent thermal conductivity. Usually, in many cases, the semiconductor element contains Si as a primary constituent component and the heat spreader contains Cu as a primary constituent component. Here, the thermal expansion coefficient of Si is 3 ppm/° C. and the thermal expansion coefficient of Cu is 17 ppm/° C. There is a difference in thermal expansion coefficient and, thereby, the thermal interface sheet may undergo thermal fatigue because of repetition of switching. In order to reduce the above-described thermal fatigue, it is preferable that In which is mild and capable of absorbing a thermal stress be used as the constituent component of the thermal interface sheet.

The above-described thermal interface sheet may be formed by using solder alloys configured to have different melting points depending on the composition ratio.

The average thickness of the above-described thermal interface sheet is not specifically limited and may be selected appropriately in accordance with the purpose. For example, 100 μm to 1 mm is mentioned.

The size and the shape of the above-described thermal interface sheet may be selected appropriately in accordance with sizes, shapes, and the like of a semiconductor element and the like to be joined.

An example of the above-described thermal interface sheet will be described with reference to drawings.

An example of the above-described thermal interface sheet is illustrated as FIG. 1A and FIG. 1B. FIG. 1A is a schematic top view of a thermal interface sheet 10. FIG. 1B is a sectional view of the section taken along a line IB-IB illustrated in FIG. 1A.

The thermal interface sheet 10 illustrated in FIG. 1A and FIG. 1B is composed of four types of solder configured to have different melting points and includes a first solder region 11, a second solder region 12, a third solder region 13, and a fourth solder region 14. The melting points of the individual solder regions satisfy the relationship represented by the first solder region 11<the second solder region 12<the third solder region 13<the fourth solder region 14. That is, the melting point of the thermal interface sheet 10 illustrated in FIG. 1A and FIG. 1B increases stepwise from the central portion in the surface direction of the thermal interface sheet 10 toward the peripheral portion in the surface direction of the thermal interface sheet 10.

The first solder region 11, the second solder region 12, and the third solder region 13 are concentric circles having different sizes in the top view.

Another example of the above-described thermal interface sheet is illustrated as FIG. 2A and FIG. 2B. FIG. 2A is a schematic top view of a thermal interface sheet 20. FIG. 2B is a sectional view of the section taken along a line IIB-IIB illustrated in FIG. 2A.

The thermal interface sheet 20 illustrated in FIG. 2A and FIG. 2B is composed of four types of solder configured to have different melting points and includes a first solder region 21, a second solder region 22, a third solder region 23, and a fourth solder region 24. The melting points of the individual solder regions satisfy the relationship represented by the first solder region 21<the second solder region 22<the third solder region 23<the fourth solder region 24. That is, the melting point of the thermal interface sheet 20 illustrated in FIG. 2A and FIG. 2B increases stepwise from the central portion in the surface direction of the thermal interface sheet 20 toward the peripheral portion in the surface direction of the thermal interface sheet 20.

The first solder region 21, the second solder region 22, the third solder region 23, and the fourth solder region 24 are squares having different sizes in the top view.

Another example of the above-described thermal interface sheet is illustrated as FIG. 3A and FIG. 3B. FIG. 3A is a schematic top view of a thermal interface sheet 30. FIG. 3B is a sectional view of the section taken along a line IIIB-IIIB illustrated in FIG. 3A.

The thermal interface sheet 30 illustrated in FIG. 3A and FIG. 3B is composed of four types of solder configured to have different melting points and includes a first solder region 31, a second solder region 32, a third solder region 33, and a fourth solder region 34. The melting points of the individual solder regions satisfy the relationship represented by the first solder region 31<the second solder region 32<the third solder region 33<the fourth solder region 34. That is, the melting point of the thermal interface sheet 30 illustrated in FIG. 3A and FIG. 3B increases stepwise from the central portion in the surface direction of the thermal interface sheet 30 toward the peripheral portion in the surface direction of the thermal interface sheet 30.

The first solder region 31, the second solder region 32, the third solder region 33, and the fourth solder region 34 are regular hexagons having different sizes in the top view.

Another example of the above-described thermal interface sheet is illustrated as FIG. 4A and FIG. 4B. FIG. 4A is a schematic top view of a thermal interface sheet 40. FIG. 4B is a sectional view of the section taken along a line IVB-IVB illustrated in FIG. 4A.

In the thermal interface sheet 40 illustrated in FIG. 4A and FIG. 4B, solder is present, where the melting point varies without exhibiting a clear boundary. That is, the melting point of the thermal interface sheet 40 illustrated in FIG. 4A and FIG. 4B increases little by little from the central portion in the surface direction of the thermal interface sheet 40 toward the peripheral portion in the surface direction of the thermal interface sheet 40.

In FIG. 4A and FIG. 4B, the gradual change in the melting point of the thermal interface sheet 40 is expressed by stippling, where as the density of dots becomes low, the melting point becomes relatively low, and as the density of dots becomes high, the melting point becomes relatively high.

A method for manufacturing the above-described thermal interface sheet is not specifically limited and may be selected appropriately in accordance with the purpose. Examples include a method in which a thermal interface block 50 illustrated as FIG. 5 is produced, and the thermal interface block 50 is cut along the alternate long and short lines illustrated in FIG. 5. A method for cutting is not specifically limited and may be selected appropriately in accordance with the purpose. For example, a method in which cutting is performed with an ultrasonic cutter is mentioned.

The thermal interface sheet block 50 illustrated as FIG. 5 includes a first solder region 51 in a central region and includes a second solder region 52 and a third solder region 53 in that order in the periphery thereof in a y-z plane. The melting points of the individual solder regions satisfy the relationship represented by the first solder region 51<the second solder region 52<the third solder region 53.

A method for manufacturing the thermal interface sheet 50 illustrated as FIG. 5 is not specifically limited and may be selected appropriately in accordance with the purpose. Examples include the following methods (1) to (4).

Method (1)

A method in which sheet-shaped second solder (solder to constitute the second solder region 52) is wound around quadratic prism-shaped solder formed from first solder to constitute the first solder region 51, and sheet-shaped third solder (solder to constitute the third solder region 53) is wound around them. In this method, when each sheet is wound, preferably, hot press is performed in such a way that each solder region is melted and is joined.

Method (2)

Quadratic prism-shaped solder formed from first solder to constitute the first solder region 51 is immersed into molten second solder (solder to constitute the second solder region 52), so that the second solder region 52 is formed around the first solder region 51. Subsequently, the quadratic prism-shaped solder provided with the second solder region 52 is immersed into molten third solder (solder to constitute the third solder region 53), so that the third solder region 53 is formed.

In immersion into the molten solder, it is preferable that the quadratic prism-shaped solder to be immersed is cooled sufficiently. Consequently, immersion may be performed while melting of the quadratic prism-shaped solder to be immersed is reduced.

According to this method, mainly, a thermal interface block may be formed, where the melting point increases stepwise from the central portion toward the peripheral portion in the y-z plane.

On the other hand, it is also possible to make the interfaces between the individual solder regions unclear by adjusting the temperature of the molten solder and the degree of cooling of the quadratic prism-shaped solder appropriately and, thereby, form a thermal interface block, where the melting point increases little by little from the central portion toward the peripheral portion in the y-z plane.

Method (3)

A quadratic prism-shaped core material having a sufficiently high melting point is immersed into molten second solder (solder to constitute the second solder region 52), so that the second solder region 52 is formed around the above-described quadratic prism-shaped core material. Subsequently, the above-described quadratic prism-shaped core material provided with the second solder region 52 is immersed into molten third solder (solder to constitute the third solder region 53), so that the third solder region 53 is formed. Thereafter, the core material is removed from the thermal interface block provided with the third solder region 53, first solder (solder to constitute the first solder region 51) is poured into the resulting central portion, and cooling is performed.

Method (4)

The inside surface of hollow quadratic prism-shaped solder made from third solder (solder to constitute the third solder region 53) is coated with molten second solder (solder to constitute the second solder region 52) and cooling is performed, so that the second solder region 52 is formed on the inside surface of the third solder region 53. Subsequently, molten first solder (solder to constitute the first solder region 51) is poured on the inside of the second solder region 52, and cooling is performed.

In the above-described method, the quadratic prism-shaped solder is used. However, the shape is not specifically limited and may be selected appropriately in accordance with the purpose. The shape of a circular column may be employed.

Processor

A disclosed processor includes at least a semiconductor element, a thermal interface layer, and a heat spreader and further includes other members, as occasion calls.

Semiconductor Element

The above-described semiconductor element is not specifically limited insofar as a circuit surface is included and may be selected appropriately in accordance with the purpose. Examples include integrated circuits and large scale integrated circuits.

Thermal Interface Layer

The above-described thermal interface layer is formed from the disclosed thermal interface sheet.

The above-described thermal interface layer is disposed on the surface opposite to the above-described circuit surface of the above-described semiconductor element.

Heat Spreader

The above-described heat spreader is not specifically limited and may be selected appropriately in accordance with the purpose. The heat spreader is formed from, for example, a material having good thermal conduction performance. The above-described heat spreader may be formed from Cu, Al, or a composite material based thereon, although oxygen-free-copper is preferable.

The above-described heat spreader is disposed on the above-described thermal interface layer.

The size and the shape of the above-described heat spreader may be selected appropriately in accordance with the size, the shape, and the like of the above-described processor.

Examples of the above-described processor include a central processing unit (CPU), a digital signal processor (DSP), and a graphics processing unit (GPU).

An example of the above-described processor will be described with reference to FIG. 6.

FIG. 6 is a schematic sectional view of an example of the processor.

The processor illustrated as FIG. 6 includes a package substrate 1, a semiconductor chip 2 serving as the above-described semiconductor element, a thermal interface layer 3, a heat spreader 4, an underfill resin 5, and a stiffener 6.

The semiconductor chip 2 is mounted on the central portion of the package substrate 1. Connection bumps is are disposed on the back of the package substrate 1.

The stiffener 6 in the shape of a frame is fixed on the chip-mounting surface of the package substrate 1 in such a way as to surround the mounting area of the semiconductor chip 2. The stiffener 6 is used as a reinforcement to reduce harmful deformations, e.g., warp, of the package substrate 1 or breakage when an external force is applied to the package, and Cu or a stainless steel having a thermal expansion coefficient close to the thermal expansion coefficient of the package substrate 1 is used.

The semiconductor chip 2 is connected to connection lands on the package substrate 1 through the use of electrodes 2a disposed on the circuit surface. As for the electrode material, Sn—Ag solder, Sn—Pb solder, or the like is used.

In order to reduce break due to thermal fatigue of the junction portion with the package substrate 1, the underfill resin 5 having an insulating property is filled in the junction portion of the electrodes 2a with the package substrate 1. As for the underfill resin 5, a synthetic resin containing an epoxy resin as a primary component and having a thermal expansion coefficient of about 20 ppm/° C. to 80 ppm/° C. is used.

The thermal interface layer 3 formed from the thermal interface sheet is disposed between the surface opposite to the circuit surface of the semiconductor chip 2 and the heat spreader 4. The thermal interface layer 3 is formed by heating and melting the thermal interface sheet and is configured to solder-joining the semiconductor chip 2 and the heat spreader 4 and transfer the heat of the semiconductor chip 2 from the semiconductor chip 2 to the heat spreader 4.

In the case where the thermal interface sheet and the heat spreader 4 are stacked on the semiconductor chip 2 in that order, slight gaps (voids) are generated between the semiconductor chip 2 and the thermal interface sheet and between the thermal interface sheet and the heat spreader 4, and air (bubble (void)) is present there.

As for the thermal interface sheet in the related art, if heating is performed in that state, the thermal interface sheet is melted all at once. Therefore, the air present between the semiconductor chip 2 and the thermal interface sheet and between the thermal interface sheet and the heat spreader 4 is not transferred easily and remains as bubbles at the interface between the semiconductor chip 2 and the thermal interface sheet and at the interface between the thermal interface sheet and the heat spreader 4. The thermal conductivity of the air is low, so that if the air remains at the interface between the semiconductor chip 2 and the thermal interface sheet and at the interface between the thermal interface sheet and the heat spreader 4, transfer of the heat from the semiconductor chip 2 to the heat spreader 4 is reduced.

On the other hand, in the case where the above-described disclosed thermal interface sheet is used, when heating is performed, the thermal interface sheet begins to melt from the central portion in the surface direction. Consequently, when the molten central portion of the thermal interface sheet wets and spreads to the semiconductor chip 2 and the heat spreader 4, bubbles present at the interface between the semiconductor chip 2 and the thermal interface sheet and at the interface between the thermal interface sheet and the heat spreader 4 are pushed to the outside in the surface direction. As the thermal interface sheet is melted from the central portion toward the peripheral portion in the surface direction of the thermal interface sheet, bubbles are pushed to the outside in the surface direction. As a result, the air may be removed from the interface between the semiconductor chip 2 and the thermal interface sheet and the interface between the thermal interface sheet and the heat spreader 4.

All examples and conditional language recited herein are intended for pedagogical purposes to aid the reader in understanding the invention and the concepts contributed by the inventor to furthering the art, and are to be construed as being without limitation to such specifically recited examples and conditions, nor does the organization of such examples in the specification relate to a showing of the superiority and inferiority of the invention. Although the embodiments of the present invention have been described in detail, it should be understood that the various changes, substitutions, and alterations could be made hereto without departing from the spirit and scope of the invention.

Claims

1. A thermal interface sheet comprising a peripheral portion, in a surface direction, configured to have a melting point higher than the melting point of a central portion in the surface direction.

2. The thermal interface sheet according to claim 1, wherein the melting point increases stepwise from the central portion in the surface direction toward the peripheral portion in the surface direction.

3. The thermal interface sheet according to claim 1, wherein the melting point increases little by little from the central portion in the surface direction toward the peripheral portion in the surface direction.

4. The thermal interface sheet according to claim 1, wherein the material contains solder.

5. A processor comprising:

a semiconductor element configured to include a circuit surface;
a thermal interface layer which is formed from the thermal interface sheet according to any one of claims 1 to 4 and which is disposed on the surface opposite to the circuit surface of the semiconductor element; and
a heat spreader disposed on the thermal interface layer.
Patent History
Publication number: 20150123259
Type: Application
Filed: Oct 27, 2014
Publication Date: May 7, 2015
Inventor: Naoaki Nakamura (Kawasaki)
Application Number: 14/524,047
Classifications
Current U.S. Class: For Integrated Circuit (257/713); Having Composition, Density, Or Hardness Gradient (428/610)
International Classification: H01L 23/373 (20060101); H01L 23/367 (20060101);