Patents by Inventor Narumi Ohkawa
Narumi Ohkawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230215913Abstract: A semiconductor device includes a semiconductor substrate, a fin-shaped structure, a gate structure, a first doped region, a second doped region, and an intermediate region. The fin-shaped structure is disposed on and extends upwards from a top surface of the semiconductor substrate in a vertical direction. The gate structure is disposed straddling a part of the fin-shaped structure. At least a part of the first doped region is disposed in the fin-shaped structure. The second doped region is disposed in the fin-shaped structure and disposed above the first doped region in the vertical direction. The intermediate region is disposed in the fin-shaped structure. The second doped region is separated from the first doped region by the intermediate region, and a bottom surface of the gate structure is lower than or coplanar with a top surface of the first doped region in the vertical direction.Type: ApplicationFiled: March 1, 2023Publication date: July 6, 2023Applicant: United Semiconductor Japan Co., Ltd.Inventor: Narumi Ohkawa
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Publication number: 20230187445Abstract: A semiconductor device having a transistor with fin structure includes a channel layer that is disposed over a substrate and is connected to the substrate via a semiconductor layer, a source layer that is disposed on a first side surface of the channel layer over the substrate and is separated from the substrate via a first insulating layer, a drain layer that is disposed on a second side surface of the channel layer opposite to the first side surface over the substrate and is separated from the substrate via a second insulating layer, and a gate electrode including a first portion disposed over the channel layer and a second portion which is disposed between the substrate and the channel layer and whose third side surface or fourth side surface faces the semiconductor layer.Type: ApplicationFiled: November 17, 2022Publication date: June 15, 2023Applicant: United Semiconductor Japan Co., Ltd.Inventor: Narumi Ohkawa
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Patent number: 11670675Abstract: A semiconductor device includes a semiconductor substrate, a fin-shaped structure, a gate structure, a first doped region, a second doped region, and an intermediate region. The fin-shaped structure is disposed on and extends upwards from a top surface of the semiconductor substrate in a vertical direction. The gate structure is disposed straddling a part of the fin-shaped structure. At least a part of the first doped region is disposed in the fin-shaped structure. The second doped region is disposed in the fin-shaped structure and disposed above the first doped region in the vertical direction. The intermediate region is disposed in the fin-shaped structure. The second doped region is separated from the first doped region by the intermediate region, and a bottom surface of the gate structure is lower than or coplanar with a top surface of the first doped region in the vertical direction.Type: GrantFiled: December 4, 2020Date of Patent: June 6, 2023Assignee: United Semiconductor Japan Co., Ltd.Inventor: Narumi Ohkawa
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Publication number: 20220181437Abstract: A semiconductor device includes a semiconductor substrate, a fin-shaped structure, a gate structure, a first doped region, a second doped region, and an intermediate region. The fin-shaped structure is disposed on and extends upwards from a top surface of the semiconductor substrate in a vertical direction. The gate structure is disposed straddling a part of the fin-shaped structure. At least a part of the first doped region is disposed in the fin-shaped structure. The second doped region is disposed in the fin-shaped structure and disposed above the first doped region in the vertical direction. The intermediate region is disposed in the fin-shaped structure. The second doped region is separated from the first doped region by the intermediate region, and a bottom surface of the gate structure is lower than or coplanar with a top surface of the first doped region in the vertical direction.Type: ApplicationFiled: December 4, 2020Publication date: June 9, 2022Inventor: Narumi Ohkawa
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Patent number: 11349575Abstract: Two photons in an entangled state of polarization is created by parametric down conversion of a pump light. A first photon of the two photons is sent to a sender while a second photon of the two photons is sent to a receiver. The second photon is divided into a first component and a second component. The receiver makes the first component interact with an isotropic nonlinear optical medium. The sender selects the angle of a polarizer according to a signal that he wants to transmit to the receiver and measures the first photon after it passes the polarizer. The receiver mixes the first component and the second component by a half beam splitter. The receiver knows the signal by measuring the probability of photon detection of two output lights from the half beam splitter.Type: GrantFiled: November 16, 2020Date of Patent: May 31, 2022Inventor: Narumi Ohkawa
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Publication number: 20220158742Abstract: Two photons in an entangled state of polarization is created by parametric down conversion of a pump light. A first photon of the two photons is sent to a sender while a second photon of the two photons is sent to a receiver. The second photon is divided into a first component and a second component. The receiver makes the first component interact with an isotropic nonlinear optical medium. The sender selects the angle of a polarizer according to a signal that he wants to transmit to the receiver and measures the first photon after it passes the polarizer. The receiver mixes the first component and the second component by a half beam splitter. The receiver knows the signal by measuring the probability of photon detection of two output lights from the half beam splitter.Type: ApplicationFiled: November 16, 2020Publication date: May 19, 2022Inventor: Narumi Ohkawa
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Patent number: 10050719Abstract: A first photon in single-photon state is created when one of two photons created by parametric down conversion of a pump light is detected at a first detector. The first photon is divided into two components by a polarization beam splitter, and the first component is sent to a sender while the second component is sent to a receiver, with information that one of the two photons is detected. The sender selects whether he measures the first component or not according to the signal that he wants to transmit to the receiver. The second component of the first photon and a probe light enter into the second nonlinear optical medium. The receiver detects the phase modulation of the probe light caused by the interaction with the second component using homodyne detection during a first span after he receives the information from the first detector.Type: GrantFiled: July 12, 2017Date of Patent: August 14, 2018Inventor: Narumi Ohkawa
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Patent number: 8774641Abstract: The first photon in single-photon state is divided into two components by the half beam splitter, and the first component is sent to the sender while the second component is sent to the receiver. The sender measures the first component of the first photon when he sends “1”. The sender doesn't measure the first component of the first photon when he sends “0”. The receiver makes the second component of the first photon enter into the Sagnac interferometer, and the receiver also makes the reference light enter into the Sagnac interferometer at the same time. The receiver makes the second component of the first photon interact with the reference light in the nonlinear optical medium arranged in the Sagnac interferometer. The receiver knows the signal from the phase modulation of the reference light caused by the interaction with the second component of the first photon.Type: GrantFiled: April 17, 2012Date of Patent: July 8, 2014Inventor: Narumi Ohkawa
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Patent number: 8737841Abstract: The sender and the receiver prepare two photons in the entangled state of polarization. The first photon of the two photons is sent to the sender and the second photon of the two photons is sent to the receiver. The sender measures the first photon after the first photon pass the polarizer in which the vertical polarized photon can pass, when the sender sends the signal “1”. The sender measures the first photon after the first photon pass the polarizer in which the 45 degrees polarized photon can pass, when the sender sends the signal “0”. The receiver measures the second photon by the balanced homodyne measurement. And, the receiver knows the signal from the absolute value of the result of the balanced homodyne measurement.Type: GrantFiled: April 17, 2012Date of Patent: May 27, 2014Inventor: Narumi Ohkawa
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Patent number: 8610177Abstract: A CMOS imaging device formed of plural CMOS photosensors arranged in a row and column formation, wherein a first CMOS photosensor and a second CMOS photosensor adjacent with each other in a column direction are formed in a single, continuous device region defined on a semiconductor substrate by a device isolation region.Type: GrantFiled: January 16, 2007Date of Patent: December 17, 2013Assignee: Fujitsu Semiconductor LimitedInventor: Narumi Ohkawa
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Patent number: 8604557Abstract: A semiconductor memory device includes: a first n-type transistor; a first p-type transistor; a first wiring layer having a first interconnecting portion for connecting a drain of the first n-type transistor and a drain of the first p-type transistor; and a second wiring layer having a first conductive portion electrically connected to the first interconnecting portion.Type: GrantFiled: December 10, 2008Date of Patent: December 10, 2013Assignee: Fujitsu Semiconductor LimitedInventor: Narumi Ohkawa
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Publication number: 20120309164Abstract: A method including forming an insulation layer over a semiconductor substrate; burying a first conduction layer containing Cu in the insulation layer in a first region and burying an interconnection containing Cu in the insulation layer in a second region; forming a barrier film of a conductive material; forming a dielectric film over the barrier metal film; forming a second conduction layer over the dielectric film; patterning the second conduction layer to form an upper electrode formed of the second conduction layer in the first region; and patterning the dielectric film and the barrier metal film to cover an upper surface of the first conduction layer by the first barrier film formed of the barrier metal film, form a lower electrode including the first conduction layer and the first barrier film, and covering an upper surface of the interconnection by the second barrier film formed of the barrier metal film.Type: ApplicationFiled: August 3, 2012Publication date: December 6, 2012Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventor: Narumi Ohkawa
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Publication number: 20120237209Abstract: The first photon in single-photon state is divided into two components by the half beam splitter, and the first component is sent to the sender while the second component is sent to the receiver. The sender measures the first component of the first photon when he sends “1”. The sender doesn't measure the first component of the first photon when he sends “0”. The receiver makes the second component of the first photon enter into the Sagnac interferometer, and the receiver also makes the reference light enter into the Sagnac interferometer at the same time. The receiver makes the second component of the first photon interact with the reference light in the nonlinear optical medium arranged in the Sagnac interferometer. The receiver knows the signal from the phase modulation of the reference light caused by the interaction with the second component of the first photon.Type: ApplicationFiled: April 17, 2012Publication date: September 20, 2012Inventor: Narumi Ohkawa
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Publication number: 20120237210Abstract: The sender and the receiver prepare two photons in the entangled state of polarization. The first photon of the two photons is sent to the sender and the second photon of the two photons is sent to the receiver. The sender measures the first photon after the first photon pass the polarizer in which the vertical polarized photon can pass, when the sender sends the signal “1”. The sender measures the first photon after the first photon pass the polarizer in which the 45 degrees polarized photon can pass, when the sender sends the signal “0”. The receiver measures the second photon by the balanced homodyne measurement. And, the receiver knows the signal from the absolute value of the result of the balanced homodyne measurement.Type: ApplicationFiled: April 17, 2012Publication date: September 20, 2012Inventor: Narumi Ohkawa
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Patent number: 8008106Abstract: A semiconductor imaging device includes a photodetection region formed of a diffusion region of a first conductivity type formed in an active region of a silicon substrate at a first side of a gate electrode such that a top part thereof is separated from a surface of the silicon substrate and such that an inner edge part invades underneath a channel region right underneath the gate electrode, a shielding layer formed of a second conductivity type at a surface of the silicon substrate at the first side of the gate electrode such that an inner edge part thereof is aligned with a sidewall surface of the gate electrode at the first side, a floating diffusion region formed in the active region at a second side of the gate electrode, and a channel region formed right underneath said gate electrode, wherein the channel region includes a first channel region part formed adjacent to the shielding layer and a second channel region part formed adjacent to the floating diffusion region, wherein the second channel regionType: GrantFiled: November 2, 2010Date of Patent: August 30, 2011Assignee: Fujitsu Semiconductor LimitedInventor: Narumi Ohkawa
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Publication number: 20110042785Abstract: The semiconductor device includes an insulation layer formed over a semiconductor substrate; a capacitance element including a conduction layer containing Cu and formed in the insulation layer, a lower electrode including a first barrier film of a conductive material formed over the conduction layer and the insulation layer, the first dielectric film formed over the lower electrode, and an upper electrode formed over the first dielectric film; an interconnection containing Cu formed in the insulation layer; and the second barrier film of a conductive material formed over the interconnection and the insulation layer.Type: ApplicationFiled: September 17, 2010Publication date: February 24, 2011Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventor: Narumi Ohkawa
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Publication number: 20110045629Abstract: A semiconductor imaging device includes a photodetection region formed of a diffusion region of a first conductivity type formed in an active region of a silicon substrate at a first side of a gate electrode such that a top part thereof is separated from a surface of the silicon substrate and such that an inner edge part invades underneath a channel region right underneath the gate electrode, a shielding layer formed of a second conductivity type at a surface of the silicon substrate at the first side of the gate electrode such that an inner edge part thereof is aligned with a sidewall surface of the gate electrode at the first side, a floating diffusion region formed in the active region at a second side of the gate electrode, and a channel region formed right underneath said gate electrode, wherein the channel region includes a first channel region part formed adjacent to the shielding layer and a second channel region part formed adjacent to the floating diffusion region, wherein the second channel regionType: ApplicationFiled: November 2, 2010Publication date: February 24, 2011Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventor: Narumi Ohkawa
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Patent number: 7846758Abstract: A semiconductor imaging device includes a photodetection region formed of a diffusion region of a first conductivity type formed in an active region of a silicon substrate at a first side of a gate electrode such that a top part thereof is separated from a surface of the silicon substrate and such that an inner edge part invades underneath a channel region right underneath the gate electrode, a shielding layer formed of a second conductivity type at a surface of the silicon substrate at the first side of the gate electrode such that an inner edge part thereof is aligned with a sidewall surface of the gate electrode at the first side, a floating diffusion region formed in the active region at a second side of the gate electrode, and a channel region formed right underneath said gate electrode, wherein the channel region includes a first channel region part formed adjacent to the shielding layer and a second channel region part formed adjacent to the floating diffusion region, wherein the second channel regionType: GrantFiled: November 14, 2008Date of Patent: December 7, 2010Assignee: Fujitsu Semiconductor LimitedInventor: Narumi Ohkawa
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Patent number: 7767952Abstract: A semiconductor imaging device having a plurality of pixels arranged in a matrix-like pattern, each of the pixels including a first photoelectric conversion unit, a second photoelectric conversion unit, a third photoelectric conversion unit and a forth photoelectric conversion unit for converting received light into signal charge; a first signal voltage conversion unit and a second voltage conversion unit for converting the signal charge into voltage; a first transistor for controlling the signal charge to be transferred from the first photoelectric conversion unit, the second photoelectric conversion unit, the third photoelectric conversion unit and the forth photoelectric conversion unit to the first signal voltage conversion unit and the second voltage conversion unit; and a signal voltage read-out unit having second, third and forth transistors.Type: GrantFiled: June 10, 2009Date of Patent: August 3, 2010Assignee: Fujitsu Semiconductor LimitedInventor: Narumi Ohkawa
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Patent number: 7745860Abstract: A CMOS image sensor with an effectively increased aperture ratio and moreover with improved optical sensitivity, and a method of manufacture of such a CMOS image sensor is provided a first aspect of the invention is an image sensor, has a pixel region 10 in which are formed a plurality of pixels each having at least a photodiode, a reset transistor, and a source-follower transistor; and a peripheral circuit region 12 in which are formed peripheral circuits which process read-out signals read out from the pixel region, a well region PW2 in the pixel region PW1 is formed to be more shallow than a well region in the peripheral circuit region. Also, reset transistors or source-follower transistors are formed in the shallow well region PW2 of the pixel region 10, and a photodiode region PHD2 is embedded below the transistor well region PW2.Type: GrantFiled: September 10, 2007Date of Patent: June 29, 2010Assignee: Fujitsu Semiconductor LimitedInventors: Tadao Inoue, Katsuyoshi Yamamoto, Narumi Ohkawa