Patents by Inventor Norio Yasuhara
Norio Yasuhara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20160268181Abstract: A semiconductor device according to an embodiment includes a first electrode, a second electrode, a semiconductor portion connected between the first electrode and the second electrode, and a third electrode disposed in the interior of the semiconductor portion, made of metal, spaced from the first electrode, and connected to the second electrode.Type: ApplicationFiled: August 27, 2015Publication date: September 15, 2016Inventor: Norio Yasuhara
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Patent number: 9236468Abstract: According to one embodiment, a semiconductor device includes a drift layer. The device includes a base layer. The device includes a source layer selectively provided on a surface of the base layer. The device includes a gate electrode provided via a gate insulating film in a trench penetrating the source layer and the base layer to reach the drift layer. The device includes a field plate electrode provided under the gate electrode in the trench. The device includes a drain electrode electrically connected to the drift layer. The device includes a source electrode. The field plate electrode is electrically connected to the source electrode. An impurity concentration of a first conductivity type contained in the base layer is lower than an impurity concentration of the first conductivity type contained in the drift layer. And the impurity concentration of the first conductivity type contained in the drift layer is not less than 1×1016 (atoms/cm3).Type: GrantFiled: December 26, 2013Date of Patent: January 12, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Miwako Suzuki, Norio Yasuhara
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Publication number: 20150311326Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, an insulating region, and a third semiconductor region of the first conductivity type. The first semiconductor region is provided between the first electrode and the second electrode, and is in contact with the first electrode. The second semiconductor region is provided between the first semiconductor region and the second electrode. The second semiconductor region is in contact with the second electrode. The insulating region extends in a direction from the second electrode toward the first semiconductor region. The insulating region is in contact with the second electrode. The third semiconductor region is provided between the second semiconductor region and the insulating region.Type: ApplicationFiled: July 6, 2015Publication date: October 29, 2015Inventors: Tsuneo Ogura, Shinichiro Misu, Tomoko Matsudai, Norio Yasuhara
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Patent number: 9159722Abstract: A semiconductor device includes a transistor region and diode region. A plurality of transistors is in the transistor region and at least one diode is in the diode region. The transistors include first and second body regions of a first conductivity type. The dopant concentration in the second body region is greater than the dopant concentration in the first body region. The diode includes first and second anode regions of the first conductivity type. The dopant concentration in the second anode region is greater than the dopant concentration in the first anode region. A total dopant amount in the second body region within a first block portion of the semiconductor substrate is greater than a total dopant amount in the second anode layer within a second block portion of the semiconductor substrate of the same size as the first block portion.Type: GrantFiled: July 24, 2014Date of Patent: October 13, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Tsuneo Ogura, Shinichiro Misu, Ryohei Gejo, Norio Yasuhara
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Publication number: 20150263149Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a first semiconductor region, a second semiconductor region, an insulating region, and a third semiconductor region. The first semiconductor region is of a first conductivity type. The first semiconductor region is provided between the first electrode and the second electrode, and contacts the first electrode. The second semiconductor region is of a second conductivity type. The second conductor region is provided between the first semiconductor region and the second electrode. The insulating region extends from the second electrode to a side of the first semiconductor region. The third semiconductor region is of the first conductivity type. The third semiconductor region is provided in at least a portion of a region between the second semiconductor region and the insulating region, and contacts the first semiconductor region.Type: ApplicationFiled: September 12, 2014Publication date: September 17, 2015Inventors: Tsuneo Ogura, Shinichiro Misu, Tomoko Matsudai, Norio Yasuhara
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Publication number: 20150155277Abstract: A semiconductor device includes a transistor region and diode region. A plurality of transistors is in the transistor region and at least one diode is in the diode region. The transistors include first and second body regions of a first conductivity type. The dopant concentration in the second body region is greater than the dopant concentration in the first body region. The diode includes first and second anode regions of the first conductivity type. The dopant concentration in the second anode region is greater than the dopant concentration in the first anode region. A total dopant amount in the second body region within a first block portion of the semiconductor substrate is greater than a total dopant amount in the second anode layer within a second block portion of the semiconductor substrate of the same size as the first block portion.Type: ApplicationFiled: July 24, 2014Publication date: June 4, 2015Inventors: Tsuneo OGURA, Shinichiro MISU, Ryohei GEJO, Norio YASUHARA
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Patent number: 8981473Abstract: According to one embodiment, in a dielectric isolation substrate, an insulating film having a first thickness is provided on a semiconductor substrate. A semiconductor layer of a first conductivity type having a second thickness is provided on the insulating film. An impurity diffusion layer of a second conductivity type is provided partially in a lower portion of the semiconductor layer and is in contact with the insulating film.Type: GrantFiled: March 2, 2012Date of Patent: March 17, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Ryo Wada, Kaori Yoshioka, Norio Yasuhara, Tomoko Matsudai, Yuichi Goto
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Publication number: 20140103427Abstract: According to one embodiment, a semiconductor device includes a drift layer. The device includes a base layer. The device includes a source layer selectively provided on a surface of the base layer. The device includes a gate electrode provided via a gate insulating film in a trench penetrating the source layer and the base layer to reach the drift layer. The device includes a field plate electrode provided under the gate electrode in the trench. The device includes a drain electrode electrically connected to the drift layer. The device includes a source electrode. The field plate electrode is electrically connected to the source electrode. An impurity concentration of a first conductivity type contained in the base layer is lower than an impurity concentration of the first conductivity type contained in the drift layer. And the impurity concentration of the first conductivity type contained in the drift layer is not less than 1×1016 (atoms/cm3).Type: ApplicationFiled: December 26, 2013Publication date: April 17, 2014Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Miwako SUZUKI, Norio YASUHARA
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Patent number: 8643095Abstract: According to one embodiment, a semiconductor device includes a drift layer. The device includes a base layer. The device includes a source layer selectively provided on a surface of the base layer. The device includes a gate electrode provided via a gate insulating film in a trench penetrating the source layer and the base layer to reach the drift layer. The device includes a field plate electrode provided under the gate electrode in the trench. The device includes a drain electrode electrically connected to the drift layer. The device includes a source electrode. The field plate electrode is electrically connected to the source electrode. An impurity concentration of a first conductivity type contained in the base layer is lower than an impurity concentration of the first conductivity type contained in the drift layer. And the impurity concentration of the first conductivity type contained in the drift layer is not less than 1×1016 (atoms/cm3).Type: GrantFiled: September 21, 2011Date of Patent: February 4, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Miwako Suzuki, Norio Yasuhara
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Publication number: 20130248995Abstract: A semiconductor device includes a first semiconductor layer of a first conductivity type, a base layer of a second conductivity type placed above the first semiconductor layer, a second semiconductor layer of the first conductivity type placed above the base layer, multiple gate electrodes having upper end is positioned above the upper surface of the base layer, a lower end positioned below the bottom of the base layer, and contacting the first semiconductor layer, the second semiconductor layer, and the base layer through a gate insulating film, insulating component arranged above the gate electrode in which the upper surface is positioned below the upper surface of the second semiconductor layer, and a conductive layer covering the second semiconductor layer from the upper end to the bottom end.Type: ApplicationFiled: September 7, 2012Publication date: September 26, 2013Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Tatsuya NISHIWAKI, Tsuyoshi Ota, Norio Yasuhara, Masatoshi Arai, Takahiro Kawano
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Patent number: 8502309Abstract: A body layer of a first conductivity type is formed on a semiconductor substrate, and a source layer of a second conductivity type is formed in a surface region of the body layer. An offset layer of the second conductivity type is formed on the semiconductor substrate, and a drain layer of the second conductivity type is formed in a surface region of the offset layer. An insulating film is embedded in a trench formed in the surface region of the offset layer between the source layer and the drain layer. A gate insulating film is formed on the body layer and the offset layer between the source layer and the insulating film. A gate electrode is formed on the gate insulating film. A first peak of an impurity concentration profile in the offset layer is formed at a position deeper than the insulating film.Type: GrantFiled: December 22, 2009Date of Patent: August 6, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Yusuke Kawaguchi, Norio Yasuhara, Tomoko Matsudai, Kenichi Matsushita
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Patent number: 8502305Abstract: According to an embodiment, a semiconductor device includes a semiconductor layer of a first conductive type, a base region of a second conductive type provided on the semiconductor layer and a first contact region of a second conductive type provided on the base region. The device includes a gate electrode provided in a trench piercing through the first contact region and the base region, and an interlayer insulating film provided on the gate electrode and containing a first conductive type impurity element. The device further includes a source region of a first conductive type provided between the interlayer insulating film and the first contact region, the source region being in contact with a side face of the interlayer insulating film and extending in the base region.Type: GrantFiled: March 15, 2012Date of Patent: August 6, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Tsuyoshi Ohta, Tatsuya Nishiwaki, Norio Yasuhara, Masatoshi Arai, Takahiro Kawano
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Patent number: 8466516Abstract: According to one embodiment, a semiconductor device includes a semiconductor substrate of a first conductivity type, an element isolation insulator, a source layer of a second conductivity type, a drain layer of the second conductivity type, a contact layer of the first conductivity type and a gate electrode. The element isolation insulator is formed on the semiconductor substrate. The source layer is formed on the semiconductor substrate and is in contact with a side surface of the element isolation insulator. The drain layer is formed on the semiconductor substrate, is in contact with the side surface, and is spaced from the source layer. The contact layer is formed between the source layer and the drain layer. The gate electrode is provided on the element isolation insulator along the side surface.Type: GrantFiled: September 20, 2010Date of Patent: June 18, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Kazutoshi Nakamura, Norio Yasuhara
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Publication number: 20130069147Abstract: According to an embodiment, a semiconductor device includes a semiconductor layer of a first conductive type, a base region of a second conductive type provided on the semiconductor layer and a first contact region of a second conductive type provided on the base region. The device includes a gate electrode provided in a trench piercing through the first contact region and the base region, and an interlayer insulating film provided on the gate electrode and containing a first conductive type impurity element. The device further includes a source region of a first conductive type provided between the interlayer insulating film and the first contact region, the source region being in contact with a side face of the interlayer insulating film and extending in the base region.Type: ApplicationFiled: March 15, 2012Publication date: March 21, 2013Applicant: Kabushiki Kaisha ToshibaInventors: Tsuyoshi OHTA, Tatsuya NISHIWAKI, Norio YASUHARA, Masatoshi ARAI, Takahiro KAWANO
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Publication number: 20130049111Abstract: According to one embodiment, in a dielectric isolation substrate, an insulating film having a first thickness is provided on a semiconductor substrate. A semiconductor layer of a first conductivity type having a second thickness is provided on the insulating film. An impurity diffusion layer of a second conductivity type is provided partially in a lower portion of the semiconductor layer and is in contact with the insulating film.Type: ApplicationFiled: March 2, 2012Publication date: February 28, 2013Applicant: Kabushiki Kaisha ToshibaInventors: Ryo WADA, Kaori Yoshioka, Norio Yasuhara, Tomoko Matsudai, Yuichi Goto
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Patent number: 8362554Abstract: According to one embodiment, a semiconductor device includes a drain region, a source region, a channel region, an insulating film, a gate electrode, a first semiconductor region, and a second semiconductor region. The source region includes a source layer of the first conductivity type, a first back gate layer of the second conductivity type, and a second back gate layer of the second conductivity type. The first back gate layer is adjacent to the second semiconductor region on one side in a channel length direction, and is adjacent to the source layer on one other side in the channel length direction. The second back gate layer is adjacent to the source layer on the one side in the channel length direction, and is adjacent to the second semiconductor region on the one other side in the channel length direction.Type: GrantFiled: September 9, 2010Date of Patent: January 29, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Tomoko Matsudai, Norio Yasuhara, Takashi Tsurugai, Kumiko Sato
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Publication number: 20120241851Abstract: According to one embodiment, a semiconductor device includes a drift layer. The device includes a base layer. The device includes a source layer selectively provided on a surface of the base layer. The device includes a gate electrode provided via a gate insulating film in a trench penetrating the source layer and the base layer to reach the drift layer. The device includes a field plate electrode provided under the gate electrode in the trench. The device includes a drain electrode electrically connected to the drift layer. The device includes a source electrode. The field plate electrode is electrically connected to the source electrode. An impurity concentration of a first conductivity type contained in the base layer is lower than an impurity concentration of the first conductivity type contained in the drift layer. And the impurity concentration of the first conductivity type contained in the drift layer is not less than 1×1016 (atoms/cm3).Type: ApplicationFiled: September 21, 2011Publication date: September 27, 2012Applicant: Kabushiki Kaisha ToshibaInventors: Miwako Suzuki, Norio Yasuhara
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Patent number: 8253398Abstract: A semiconductor device includes: a high-side switching element having a first switching element connected between an input voltage line and an inductive load; and a low-side switching element having a second switching element and a third switching element that are connected in parallel between the inductive load and a reference voltage line. A surge current is discharged through the third switching element to the reference voltage line when a surge is applied to a terminal connected to the inductive load in the low-side switching element.Type: GrantFiled: July 9, 2009Date of Patent: August 28, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Kazutoshi Nakamura, Norio Yasuhara
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Publication number: 20120212198Abstract: A semiconductor device includes: a high-side switching element having a first switching element connected between an input voltage line and an inductive load; and a low-side switching element having a second switching element and a third switching element that are connected in parallel between the inductive load and a reference voltage line. A surge current is discharged through the third switching element to the reference voltage line when a surge is applied to a terminal connected to the inductive load in the low-side switching element.Type: ApplicationFiled: May 2, 2012Publication date: August 23, 2012Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Kazutoshi Nakamura, Norio Yasuhara
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Patent number: 8212310Abstract: A semiconductor device includes a semiconductor layer of a first conductivity type; a deep well of a second conductivity type formed in a portion of an upper layer portion of the semiconductor layer; a well of the first conductivity type formed in a portion of an upper layer portion of the deep well; a source layer of the second conductivity type formed in the well; a drain layer of the second conductivity type formed in the well apart from the source layer; and a contact layer of the second conductivity type formed outside the well in an upper layer portion of the deep well and connected to the drain layer. The drain layer is electrically connected to the deep well via the well by applying a driving voltage between the source layer and the drain layer.Type: GrantFiled: February 7, 2011Date of Patent: July 3, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Tomoko Matsudai, Norio Yasuhara, Kazutoshi Nakamura