Abstract: A voltage supply discriminator circuit senses multiple logic voltage supply levels and produces a plurality of control signals to select either or both of an output buffer circuit and/or an input buffer circuit that is coupled to a pad or pin. The discriminator circuit utilizes an input/output ring voltage supply and a reference voltage, such as a core voltage supply, to determine the appropriate circuitry to be used for the I/O pad. The appropriate circuitry is then automatically activated.

Abstract: An extraneous voltage protection circuit and method transforms an overvoltage input signal or undervoltage input signal to a suitable voltage level for a protected circuit. An input voltage dependent variable reference voltage is used to protect overvoltage protection circuitry against unsuitable undervoltage conditions. In one embodiment, an overvoltage protection circuit, an undervoltage protection circuit, and an input voltage dependent variable reference voltage source is made of single gate oxide MOS devices.

Abstract: A buffer circuit utilizes a single gate oxide pre-buffer voltage level shifting circuit on, for example, an output buffer of an I/O pad, to accommodate different I/O pad supply voltages while maintaining normal operating voltages (degradation levels) across boundaries of single gate oxide devices that form the buffer. The single gate oxide output buffer can operate at several different supply voltages. A pre-buffer voltage level shifting circuit includes a multi-supply voltage level shifting circuit having signal gate oxide devices coupled to produce a pre-buffer output signal to an output buffer. A single gate oxide cross coupled active load is coupled to the multi-supply voltage level shifting circuit and provides suitable drive voltages to at least one of cascaded buffer transistors.

Abstract: A deceleration circuit is operatively coupled to a first and second voltage to reduce noise on each of the voltage lines. For example, one voltage may be a supply voltage and the other voltage may be at a ground potential. The deceleration circuit may be coupled, for example, to each circuit that need not operate at a maximum or high operational speed within an integrated circuit that has other circuits that require high speed operation.

Abstract: A powerup sequencing circuit and method generates an artificial supply voltage until the actual supply voltage is at a suitable level. An artificial supply source, such as a pull up circuit, is coupled to a node that receives a first supply voltage, such as an I/O buffer voltage. The pull up circuit is also coupled to an isolatable source voltage node. The isolatable source voltage node is the node that causes the actual second supply voltage. A temporary isolation circuit is operatively coupled to the pull up circuit and is operatively interposed between the node that receives the first supply voltage and the isolatable source voltage node. The pull up circuit provides a temporary or artificial second supply voltage level to an on chip circuit, such as an I/O buffer circuit or other suitable circuit that may, for example, be multi-voltage supply dependent.

Abstract: An integrated circuit and method utilizes a differential input receiver having a first input that receives an input signal. A reference voltage adjustment circuit produces a variable reference signal for the second input of a differential input receiver. A feedback path is provided from the output of the differential input receiver to an input of the reference voltage adjustment circuit. The reference voltage adjustment circuit dynamically varies the variable reference voltage signal to facilitate hysteresis. The variable reference voltage signal is lowered in the case of a high input signal, and raised in the case of a low input signal.

Abstract: A buffer circuit utilizes a single gate oxide pre-buffer voltage level shifting circuit on, for example, an output buffer of an I/O pad, to accommodate different I/O pad supply voltages while maintaining normal operating voltages (degradation levels) across boundaries of single gate oxide devices that form the buffer. The single gate oxide output buffer can operate at several different supply voltages. A pre-buffer voltage level shifting circuit includes a multi-supply voltage level shifting circuit having single gate oxide devices coupled to produce a pre-buffer output signal to an output buffer. A single gate oxide cross coupled active load is coupled to the multi-supply voltage level shifting circuit and provides suitable drive voltages to at least one of cascaded buffer transistors.

Abstract: A voltage scaling circuit for protecting an input node to a protected circuit uses a voltage shifting circuit that includes two nmos transistors. One nmos transistor is configured as a bi-directional voltage follower and the other nmos transistor is configured as uni-directional voltage follower to facilitate input high level shifting between an input signal node, such as a pin of an integrated circuit and an input node to the protected circuit.