Abstract: A method includes identifying hardware resource requirements of a candidate workload instance, wherein the hardware resource requirements of the workload instance include a required capacity for each of a plurality of hardware resource types. The method further includes identifying, for each of the plurality of hardware resource types required by the candidate workload instance, a capacity of a hardware resource of the hardware resource type that is currently available on a server without causing a power efficiency of the hardware resource to decline below a setpoint power efficiency; and determining, for each of the plurality of hardware resource types required by the candidate workload instance, whether the identified capacity of the hardware resource on the server is greater than or equal to the required capacity for the hardware resource type. The determination may support a decision to place the workload instance on the server or another server.

Abstract: A method includes receiving a power supply unit (“PSU”) replacement signal for a power supply chassis that includes plurality of supply enclosures. Each power supply enclosure includes a plurality of power supply units (“PSUs”). Each of the PSUs in the power supply enclosures is connected to a power bus powering computing equipment. PSU redundancy policy has at least one PSU being redundant. In response to the PSU replacement signal, the method calculates a power cap limit equal to a capacity of the plurality of supply enclosures that are not being removed. Power consumption of the computing equipment is limited to the power cap limit. In response to detecting a replacement power supply enclosure, the method recalculates the power cap limit based on all of the PSUs according to the PSU redundancy policy. Power consumption of the computing equipment is limited to the recalculated power cap limit.

Abstract: A method includes receiving a power supply unit (“PSU”) replacement signal for a power supply chassis that includes plurality of supply enclosures. Each power supply enclosure includes a plurality of power supply units (“PSUs”). Each of the PSUs in the power supply enclosures is connected to a power bus powering computing equipment. PSU redundancy policy has at least one PSU being redundant. In response to the PSU replacement signal, the method calculates a power cap limit equal to a capacity of the plurality of supply enclosures that are not being removed. Power consumption of the computing equipment is limited to the power cap limit. In response to detecting a replacement power supply enclosure, the method recalculates the power cap limit based on all of the PSUs according to the PSU redundancy policy. Power consumption of the computing equipment is limited to the recalculated power cap limit.

Abstract: An interposer includes a planar substrate and a pad array formed on a bottom side of the planar substrate to connect with a pin array within a CPU socket. A serial computer expansion bus connector is formed on the top side of the planar substrate and is electronically coupled to a portion of the pad array. The interposer further includes a perimeter structure adapted for securing to a CPU carrier. The interposer may be included in a kit with a heatsink securable to the CPU socket, wherein the heatsink includes a contact area for contacting the interposer and applying a load to the interposer. A printed circuit board assembly may include first and second CPU sockets that are connected by a CPU interconnect, where the interposer may be installed in the first CPU socket and a CPU may be installed in the second CPU socket.

Abstract: An interposer includes a planar substrate and a pad array formed on a bottom side of the planar substrate to connect with a pin array within a CPU socket. A serial computer expansion bus connector is formed on the top side of the planar substrate and is electronically coupled to a portion of the pad array. The interposer further includes a perimeter structure adapted for securing to a CPU carrier. The interposer may be included in a kit with a heatsink securable to the CPU socket, wherein the heatsink includes a contact area for contacting the interposer and applying a load to the interposer. A printed circuit board assembly may include first and second CPU sockets that are connected by a CPU interconnect, where the interposer may be installed in the first CPU socket and a CPU may be installed in the second CPU socket.

Abstract: An IHS includes an IHS chassis. A processor is located in the IHS chassis. At least one fan is located in the IHS chassis and in fluid communication with the processor. A temperature sensor is located in the IHS chassis. A fan controller is coupled to the processor, the at least one fan, the temperature sensor, and a storage device that includes a plurality of processor target temperatures that are each associated with a different ambient temperature. The fan controller is operable to receive a first ambient temperature from the temperature sensor, determine a first processor target temperature that is associated with the first ambient temperature, receive a temperature of the processor, and operate the at least one fan in order to reduce the temperature of the processor to the first processor target temperature.

Abstract: An information handling system includes a power supply coupled to a processor that includes a plurality of cores. A power system controller is coupled to the power supply and the processor. The power system controller may set each of the plurality of cores to a performance state that is below a highest performance state. The power system controller may then determine whether the power supplied from the power supply to the processor during operation is sufficient to operate each of the plurality of cores at the highest performance state. In response to the power being insufficient to operate each of the plurality of cores at the highest performance state, the power system controller may control the plurality of cores such that a subset operate at the highest performance state and the remainder operate at a performance state that is lower than the highest performance state.

Abstract: Acoustics management at an information handling system provides reduced acoustic noise with limited performance impact by dynamically changing power dissipation as a function of cooling fan speed and ambient temperature so that preemptive power restrictions prevent excessive thermal conditions that lead to excessive cooling fan speeds and associated acoustics. A maximum cooling fan speed of less than an available maximum is set and maintained by reducing power dissipation unless power dissipation reaches a minimum, after which the minimum power dissipation is maintained and cooling fan speed is allowed to increase.

Abstract: An information handling system includes a power supply coupled to a processor that includes a plurality of cores. A power system controller is coupled to the power supply and the processor. The power system controller may set each of the plurality of cores to a performance state that is below a highest performance state. The power system controller may then determine whether the power supplied from the power supply to the processor during operation is sufficient to operate each of the plurality of cores at the highest performance state. In response to the power being insufficient to operate each of the plurality of cores at the highest performance state, the power system controller may control the plurality of cores such that a subset operate at the highest performance state and the remainder operate at a performance state that is lower than the highest performance state.

Abstract: An information handling system includes a power supply coupled to a processor that includes a plurality of cores. A power system controller is coupled to the power supply and the processor. The power system controller may set each of the plurality of cores to a performance state that is below a highest performance state. The power system controller may then determine whether the power supplied from the power supply to the processor during operation is sufficient to operate each of the plurality of cores at the highest performance state. In response to the power being insufficient to operate each of the plurality of cores at the highest performance state, the power system controller may control the plurality of cores such that a subset operate at the highest performance state and the remainder operate at a performance state that is lower than the highest performance state.

Abstract: A cooling system includes a chassis. A thermal sensor is located in the chassis. A plurality of fan zones are located in the chassis. Each of the plurality of fan zones includes at least one fan. A first mapping is provided between the thermal sensor and a first fan zone of the plurality of fans zone, and a second mapping is provided between the first fan zone and a second fan zone in the plurality of fan zones. A controller is coupled to the thermal sensor and the at least one fan in each of the plurality of fan zones. In response to receiving a signal from the thermal sensor, the controller is operable to activate the at least one fan in the first fan zone according to the first mapping and activate the at least one fan in the second fan zone according to the second mapping.

Abstract: An IHS includes an IHS chassis. A processor is located in the IHS chassis. At least one fan is located in the IHS chassis and in fluid communication with the processor. A temperature sensor is located in the IHS chassis. A fan controller is coupled to the processor, the at least one fan, the temperature sensor, and a storage device that includes a plurality of processor target temperatures that are each associated with a different ambient temperature. The fan controller is operable to receive a first ambient temperature from the temperature sensor, determine a first processor target temperature that is associated with the first ambient temperature, receive a temperature of the processor, and operate the at least one fan in order to reduce the temperature of the processor to the first processor target temperature.

Abstract: An information handling system includes a processor, an air moving system, a power system, and power demand reduction circuit. The air moving system is operable to cool the processor. The power system is operable to power the processor and the air moving system. The power demand reduction circuit is operable to detect a total power system power demand that will exceed a power system output capacity of the power system in response to a processor power demand from the processor and, in response, reduce an air moving system power provided to the air moving system such that the processor power demand will no longer cause the total power system power demand to exceed the power system output capacity. The air moving system power may be increased when a decrease in the processor power demand results in the two contributing to a total power system power that will not exceed the power system output capacity.

Abstract: Power resource allocation at a chassis that supports plural server information handling systems is enhanced with modifications to power consumption by plural cooling fans based upon available power resources. As available power decreases, at least some of the cooling fans operate at reduced speeds for a given thermal condition to consume less power. In one embodiment, a maximum allowed cooling fan speed is set with a delta value over the fan speed of one or more other cooling fans, such as a delta over the lowest commanded cooling fan speed of the chassis.

Abstract: An IHS includes an IHS chassis. A processor is located in the IHS chassis. At least one fan is located in the IHS chassis and in fluid communication with the processor. A temperature sensor is located in the IHS chassis. A fan controller is coupled to the processor, the at least one fan, the temperature sensor, and a storage device that includes a plurality of processor target temperatures that are each associated with a different ambient temperature. The fan controller is operable to receive a first ambient temperature from the temperature sensor, determine a first processor target temperature that is associated with the first ambient temperature, receive a temperature of the processor, and operate the at least one fan in order to reduce the temperature of the processor to the first processor target temperature.

Abstract: Acoustics management at an information handling system provides reduced acoustic noise with limited performance impact by dynamically changing power dissipation as a function of cooling fan speed and ambient temperature so that preemptive power restrictions prevent excessive thermal conditions that lead to excessive cooling fan speeds and associated acoustics. A maximum cooling fan speed of less than an available maximum is set and maintained by reducing power dissipation unless power dissipation reaches a minimum, after which the minimum power dissipation is maintained and cooling fan speed is allowed to increase.

Abstract: Power resource allocation at a chassis that supports plural server information handling systems is enhanced with modifications to power consumption by plural cooling fans based upon available power resources. As available power decreases, at least some of the cooling fans operate at reduced speeds for a given thermal condition to consume less power. In one embodiment, a maximum allowed cooling fan speed is set with a delta value over the fan speed of one or more other cooling fans, such as a delta over the lowest commanded cooling fan speed of the chassis.

Abstract: An information handling system includes a processor, an air moving system, a power system, and power demand reduction circuit. The air moving system is operable to cool the processor. The power system is operable to power the processor and the air moving system. The power demand reduction circuit is operable to detect a total power system power demand that will exceed a power system output capacity of the power system in response to a processor power demand from the processor and, in response, reduce an air moving system power provided to the air moving system such that the processor power demand will no longer cause the total power system power demand to exceed the power system output capacity. The air moving system power may be increased when a decrease in the processor power demand results in the two contributing to a total power system power that will not exceed the power system output capacity.

Abstract: An information handling system includes a power supply coupled to a processor that includes a plurality of cores. A power system controller is coupled to the power supply and the processor. The power system controller may set each of the plurality of cores to a performance state that is below a highest performance state. The power system controller may then determine whether the power supplied from the power supply to the processor during operation is sufficient to operate each of the plurality of cores at the highest performance state. In response to the power being insufficient to operate each of the plurality of cores at the highest performance state, the power system controller may control the plurality of cores such that a subset operate at the highest performance state and the remainder operate at a performance state that is lower than the highest performance state.

Abstract: A system and method for indirect throttling of a system resource by a processor are disclosed. An information handling system includes a chassis that receives modular components, a processor disposed in the chassis and a system resource in communication with the processor. A management module associated with the chassis generates a throttle signal that throttles operation of the processor in response to receiving an alarm such that the processor reduces the throughput of the system resource.