Abstract: Provided herein are dosing and combination therapies with a CD39 antibody, a PD-1 antibody, and FOLFOX or CAPDX in gastric cancer.

Abstract: A compound having the following formula is disclosed. The compound is useful as an emitter in OLED applications.

Abstract: A slide processing apparatus controls the temperature and orientation of a microscope slide carrying one or more specimens. The apparatus heats the specimen-bearing microscope slide while the slide is oriented to both facilitate adhesion between the specimens and the slide and control movement of the specimens relative to the microscope slide. A slide dryer of the apparatus conductively heats the specimens using a conductive slide heater that physically engages the microscope slide.

Abstract: A slide processing apparatus controls the temperature and orientation of a microscope slide carrying one or more specimens. The apparatus heats the specimen-bearing microscope slide while the slide is oriented to both facilitate adhesion between the specimens and the slide and control movement of the specimens relative to the microscope slide. A slide dryer of the apparatus conductively heats the specimens using a conductive slide heater that physically engages the microscope slide.

Abstract: A slide processing apparatus controls the temperature and orientation of a microscope slide carrying one or more specimens. The apparatus heats the specimen-bearing microscope slide while the slide is oriented to both facilitate adhesion between the specimens and the slide and control movement of the specimens relative to the microscope slide. A slide dryer of the apparatus conductively heats the specimens using a conductive slide heater that physically engages the microscope slide.

Abstract: A slide processing apparatus controls the temperature and orientation of a microscope slide carrying one or more specimens. The apparatus heats the specimen-bearing microscope slide while the slide is oriented to both facilitate adhesion between the specimens and the slide and control movement of the specimens relative to the microscope slide. A slide dryer of the apparatus conductively heats the specimens using a conductive slide heater that physically engages the microscope slide.

Abstract: A slide processing apparatus controls the temperature and orientation of a microscope slide carrying one or more specimens. The apparatus heats the specimen-bearing microscope slide while the slide is oriented to both facilitate adhesion between the specimens and the slide and control movement of the specimens relative to the microscope slide. A slide dryer of the apparatus conductively heats the specimens using a conductive slide heater that physically engages the microscope slide.

Abstract: A slide processing apparatus controls the temperature and orientation of a microscope slide carrying one or more specimens. The apparatus heats the specimen-bearing microscope slide while the slide is oriented to both facilitate adhesion between the specimens and the slide and control movement of the specimens relative to the microscope slide. A slide dryer of the apparatus conductively heats the specimens using a conductive slide heater that physically engages the microscope slide.

Abstract: A slide processing apparatus controls the temperature and orientation of a microscope slide carrying one or more specimens. The apparatus heats the specimen-bearing microscope slide while the slide is oriented to both facilitate adhesion between the specimens and the slide and control movement of the specimens relative to the microscope slide. A slide dryer of the apparatus conductively heats the specimens using a conductive slide heater that physically engages the microscope slide.

Abstract: The invention relates to a system and a method for automated transfer and subsequent evaluation of the quality of mass data of a technical process or a technical project in a standardized environment (70) of one or more data processing devices with an assignment module (20) for allocating the mass data from one or more data sources (10) to structure elements in the standardized environment of the data processing device (70) and for generating a defined mapping of the mass data to be read in. The assignment module (20) interacts with a read-in module (30), into which the mass data can be read in an automated operation according to the selected assignment. The data read in can be fed to a checking module (40) for automated checking and/or for generation of a report for evaluation of the quality of the measured data read in.

Abstract: A slide processing apparatus controls the temperature and orientation of a microscope slide carrying one or more specimens. The apparatus heats the specimen-bearing microscope slide while the slide is oriented to both facilitate adhesion between the specimens and the slide and control movement of the specimens relative to the microscope slide. A slide dryer of the apparatus conductively heats the specimens using a conductive slide heater that physically engages the microscope slide.

Abstract: In an embodiment, an integrated semiconductor memory includes a plurality of data lines via which data read out or to be read out from memory cells can be communicated, wherein the data lines comprise redundant data lines and non-redundant data lines, wherein the semiconductor memory has at least one data distributor line, and wherein a plurality of redundant data lines are connected up to the at least one data distributor line in such a way that in each case a redundant data line or a group of redundant data lines from the plurality of redundant data lines can be selected and can be connected to the at least one data distributor line.

Abstract: A memory device comprising a memory cell and an evaluation circuit, the memory cell being coupled with the evaluation circuit via a bit line. The memory device further comprises a reference line coupled with the evaluation circuit, the evaluation circuit being designed for amplifying a difference between electric potentials of the bit line and the reference line. Inputs of the evaluation circuit are directly connected to the bit line. Outputs of the evaluation circuit are coupled to the bit line via a switch.

Abstract: According to one embodiment of the present invention, a method of operating an integrated circuit including a plurality of resistivity changing memory cells connected in parallel is provided. The method includes: choosing a resistivity changing memory cell having a first memory state out of the plurality of resistivity changing memory cells; measuring a first total resistance of the plurality of resistivity changing memory cells; setting the chosen resistivity changing memory cell to a second memory state, measuring a second total resistance of the plurality of resistivity changing memory cells; and determining the first memory state of the chosen resistivity changing memory cell in dependence on the first total resistance and the second total resistance.

Abstract: An integrated electrical module has a set of regular elements and a set of redundant elements, the elements being split over at least two blocks which are individually selectable by an input address and respectively containing regular elements and redundant elements. The integrated electrical module further has two repair circuits, each repair circuit being associated to a block, the two repair circuits being conditioned as a pair for a partner mode of operation, in which the addressing of an element from a first half-group of regular elements in the first block is diverted to a first half-group of elements in the second block and the addressing of an element from a second half-group of regular elements in the first block is diverted to a second half-group of elements in the second block.

Abstract: A memory device comprising a memory cell and an evaluation circuit, the memory cell being coupled with the evaluation circuit via a bit line. The memory device further comprises a reference line coupled with the evaluation circuit, the evaluation circuit being designed for amplifying a difference between electric potentials of the bit line and the reference line. Inputs of the evaluation circuit are directly connected to the bit line. Outputs of the evaluation circuit are coupled to the bit line via a switch.

Abstract: Embodiments of the present invention generally provide methods and apparatus for testing memory devices having normal memory elements and redundant memory elements. During a front-end testing procedure, normal memory elements that are found to be defective are replaced by redundant memory elements. During the front-end test, redundant memory elements that are found to be defective may be marked as defective by blowing associated mask fuses. During a back-end testing procedure, the results of testing a normal memory element may be masked (e.g., forced to a passing result) if the normal memory element has been replaced by a redundant memory element. Similarly, the results of testing a redundant memory element may be masked if the redundant memory element was previously found to be defective, as indicated by an associated mark fuse.

Abstract: Method and apparatus for accessing a memory, wherein the memory has a cell array having a number of memory cells arranged in cell array elements. A cell array element determined to be defective is deactivate. After the cell array element is deactivated, an address of a cell array element is applied to an activation apparatus of the memory in order to activate the cell array element for a given memory access. The applied address is compared with stored error addresses which are assigned to defective cell array elements. In the event of a match between the applied address and one of the error addresses, a redundant cell array element is activated instead of the cell array element.

Abstract: Apparatus and method for checking output signals of an integrated circuit are provided. One embodiment provides a method for checking whether signals are output by a write circuit of an integrated circuit according to a predefined specification. In this context, the high precision of an external test device which is inherent to the system is used to check, within a module, that a data signal and a data sampling signal of the integrated circuit are output according to a specification.

Abstract: In an embodiment, an integrated semiconductor memory includes a plurality of data lines via which data read out or to be read out from memory cells can be communicated, wherein the data lines comprise redundant data lines and non-redundant data lines, wherein the semiconductor memory has at least one data distributor line, and wherein a plurality of redundant data lines are connected up to the at least one data distributor line in such a way that in each case a redundant data line or a group of redundant data lines from the plurality of redundant data lines can be selected and can be connected to the at least one data distributor line.