Patents by Inventor Phaedon Avouris

Phaedon Avouris has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8084012
    Abstract: The present invention provides a method for selectively placing carbon nanotubes on a substrate surface by using functionalized carbon nanotubes having an organic compound that is covalently bonded to such carbon nanotubes. The organic compound comprises at least two functional groups, the first of which is capable of forming covalent bonds with carbon nanotubes, and the second of which is capable of selectively bonding metal oxides. Such functionalized carbon nanotubes are contacted with a substrate surface that has at least one portion containing a metal oxide. The second functional group of the organic compound selectively bonds to the metal oxide, so as to selectively place the functionalized carbon nanotubes on the at least one portion of the substrate surface that comprises the metal oxide.
    Type: Grant
    Filed: August 14, 2009
    Date of Patent: December 27, 2011
    Assignee: International Business Machines Corporation
    Inventors: Alina Afzali-Ardakani, Phaedon Avouris, James B. Hannon, Christian Klinke
  • Publication number: 20110284818
    Abstract: Graphene-channel based devices and techniques for the fabrication thereof are provided. In one aspect, a semiconductor device includes a first wafer having at least one graphene channel formed on a first substrate, a first oxide layer surrounding the graphene channel and source and drain contacts to the graphene channel that extend through the first oxide layer; and a second wafer having a CMOS device layer formed in a second substrate, a second oxide layer surrounding the CMOS device layer and a plurality of contacts to the CMOS device layer that extend through the second oxide layer, the wafers being bonded together by way of an oxide-to-oxide bond between the oxide layers. One or more of the contacts to the CMOS device layer are in contact with the source and drain contacts. One or more other of the contacts to the CMOS device layer are gate contacts for the graphene channel.
    Type: Application
    Filed: May 20, 2010
    Publication date: November 24, 2011
    Applicant: International Business Machines Corporation
    Inventors: Phaedon Avouris, Kuan-Neng Chen, Damon Farmer, Yu-Ming Lin
  • Patent number: 8053782
    Abstract: A photodetector which uses single or multi-layer graphene as the photon detecting layer is disclosed. Multiple embodiments are disclosed with different configurations of electrodes. In addition, a photodetector array comprising multiple photodetecting elements is disclosed for applications such as imaging and monitoring.
    Type: Grant
    Filed: August 24, 2009
    Date of Patent: November 8, 2011
    Assignee: International Business Machines Corporation
    Inventors: Phaedon Avouris, Yu-Ming Lin, Thomas Mueller, Fengnian Xia
  • Publication number: 20110256675
    Abstract: A complementary metal oxide semiconductor (CMOS) device, e.g., a field effect transistor (FET), that includes at least one one-dimensional nanostructure that is typically a carbon-based nanomaterial, as the device channel, and a metal carbide contact that is self-aligned with the gate region of the device is described. The present invention also provides a method of fabricating such a CMOS device.
    Type: Application
    Filed: June 3, 2011
    Publication date: October 20, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Phaedon Avouris, Roy A. Carruthers, Jia Chen, Christophe G.M.M. Detavernier, Christian Lavoie, Hon-Sum Philip Wong
  • Patent number: 8003453
    Abstract: A complementary metal oxide semiconductor (CMOS) device, e.g., a field effect transistor (FET), that includes at least one one-dimensional nanostructure that is typically a carbon-based nanomaterial, as the device channel, and a metal carbide contact that is self-aligned with the gate region of the device is described. The present invention also provides a method of fabricating such a CMOS device.
    Type: Grant
    Filed: May 22, 2008
    Date of Patent: August 23, 2011
    Assignee: International Business Machines Corporation
    Inventors: Phaedon Avouris, Roy A. Carruthers, Jia Chen, Christopher G. M. M. Detavernier, Christian Lavoie, Hon-Sum Philip Wong
  • Patent number: 7955931
    Abstract: A method of fabricating a nanotube field-effect transistor having unipolar characteristics and a small inverse sub-threshold slope includes forming a local gate electrode beneath the nanotube between drain and source electrodes of the transistor and doping portions of the nanotube. In a further embodiment, the method includes forming at least one trench in the gate dielectric (e.g., a back gate dielectric) and back gate adjacent to the local gate electrode. Another aspect of the invention is a nanotube field-effect transistor fabricated using such a method.
    Type: Grant
    Filed: March 19, 2010
    Date of Patent: June 7, 2011
    Assignee: International Business Machines Corporation
    Inventors: Joerg Appenzeller, Phaedon Avouris, Yu-Ming Lin
  • Publication number: 20110101308
    Abstract: A fabrication process for a nanoelectronic device and a device are provided. Channel material is deposited on a substrate to form a channel. A source metal contact and a drain metal contact are deposited on the channel material, and the source metal contact and the drain metal contact are on opposing ends of the channel material. A polyhydroxystyrene derivative is deposited on the channel material. A top gate oxide is deposited on the polymer layer. A top gate metal is deposited on the top gate oxide.
    Type: Application
    Filed: November 3, 2009
    Publication date: May 5, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Phaedon Avouris, Damon B. Farmer, Fengnian Xia
  • Patent number: 7897960
    Abstract: A self-aligned carbon-nanotube field effect transistor semiconductor device comprises a carbon-nanotube deposited on a substrate, a source and a drain formed at a first end and a second end of the carbon-nanotube, respectively, and a gate formed substantially over a portion of the carbon-nanotube, separated from the carbon-nanotube by a dielectric film.
    Type: Grant
    Filed: August 20, 2009
    Date of Patent: March 1, 2011
    Assignee: International Business Machines Corporation
    Inventors: Joerg Appenzeller, Phaedon Avouris, Kevin K. Chan, Philip G. Collins, Richard Martel, Hon-Sum Philip Wong
  • Publication number: 20110042650
    Abstract: A photodetector which uses single or multi-layer graphene as the photon detecting layer is disclosed. Multiple embodiments are disclosed with different configurations of electrodes. In addition, a photodetector array comprising multiple photodetecting elements is disclosed for applications such as imaging and monitoring.
    Type: Application
    Filed: August 24, 2009
    Publication date: February 24, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Phaedon Avouris, Yu-Ming Lin, Thomas Mueller, Fengnian Xia
  • Patent number: 7851783
    Abstract: A method of fabricating a nanotube field-effect transistor having unipolar characteristics and a small inverse sub-threshold slope includes forming a local gate electrode beneath the nanotube between drain and source electrodes of the transistor and doping portions of the nanotube. In a further embodiment, the method includes forming at least one trench in the gate dielectric (e.g., a back gate dielectric) and back gate adjacent to the local gate electrode. Another aspect of the invention is a nanotube field-effect transistor fabricated using such a method.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: December 14, 2010
    Assignee: International Business Machines Corporation
    Inventors: Joerg Appenzeller, Phaedon Avouris, Yu-Ming Lin
  • Publication number: 20100173462
    Abstract: A method of fabricating a nanotube field-effect transistor having unipolar characteristics and a small inverse sub-threshold slope includes forming a local gate electrode beneath the nanotube between drain and source electrodes of the transistor and doping portions of the nanotube. In a further embodiment, the method includes forming at least one trench in the gate dielectric (e.g., a back gate dielectric) and back gate adjacent to the local gate electrode. Another aspect of the invention is a nanotube field-effect transistor fabricated using such a method.
    Type: Application
    Filed: March 19, 2010
    Publication date: July 8, 2010
    Applicant: International Business Machines Corporation
    Inventors: Joerg Appenzeller, Phaedon Avouris, Yu-Ming Lin
  • Publication number: 20100145034
    Abstract: The present invention provides a method for selectively placing carbon nanotubes on a substrate surface by using functionalized carbon nanotubes having an organic compound that is covalently bonded to such carbon nanotubes. The organic compound comprises at least two functional groups, the first of which is capable of forming covalent bonds with carbon nanotubes, and the second of which is capable of selectively bonding metal oxides. Such functionalized carbon nanotubes are contacted with a substrate surface that has at least one portion containing a metal oxide. The second functional group of the organic compound selectively bonds to the metal oxide, so as to selectively place the functionalized carbon nanotubes on the at least one portion of the substrate surface that comprises the metal oxide.
    Type: Application
    Filed: August 14, 2009
    Publication date: June 10, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Alina Afzali-Ardakani, Phaedon Avouris, James B. Hannon, Christian Klinke
  • Publication number: 20100038628
    Abstract: A method is provided for doping nano-components, including nanotubes, nanocrystals and nanowires, by exposing the nano-components to an organic amine-containing dopant. A method is also provided for forming a field effect transistor comprising a nano-component that has been doped using such a dopant.
    Type: Application
    Filed: August 31, 2009
    Publication date: February 18, 2010
    Applicant: International Business Machines Corporation
    Inventors: Ali Afzali-Ardakani, Phaedon Avouris, Jia Chen, Christian Klinke, Christopher B. Murray, Dmitri V. Talapin
  • Publication number: 20100001260
    Abstract: A self-aligned carbon-nanotube field effect transistor semiconductor device comprises a carbon-nanotube deposited on a substrate, a source and a drain formed at a first end and a second end of the carbon-nanotube, respectively, and a gate formed substantially over a portion of the carbon-nanotube, separated from the carbon-nanotube by a dielectric film.
    Type: Application
    Filed: August 20, 2009
    Publication date: January 7, 2010
    Inventors: Joerg Appenzeller, Phaedon Avouris, Kevin K. Chan, Philip G. Collins, Richard Martel, Hon-Sum Philip Wong
  • Patent number: 7635856
    Abstract: A self-aligned carbon-nanotube field effect transistor semiconductor device comprises a carbon-nanotube deposited on a substrate, a source and a drain formed at a first end and a second end of the carbon-nanotube, respectively, and a gate formed substantially over a portion of the carbon-nanotube, separated from the carbon-nanotube by a dielectric film.
    Type: Grant
    Filed: August 7, 2007
    Date of Patent: December 22, 2009
    Assignee: International Business Machines Corporation
    Inventors: Joerg Appenzeller, Phaedon Avouris, Kevin K. Chan, Philip G. Collins, Richard Martel, Hon-Sum Philip Wong
  • Publication number: 20090309092
    Abstract: A self-aligned carbon-nanotube field effect transistor semiconductor device comprises a carbon-nanotube deposited on a substrate, a source and a drain formed at a first end and a second end of the carbon-nanotube, respectively, and a gate formed substantially over a portion of the carbon-nanotube, separated from the carbon-nanotube by a dielectric film.
    Type: Application
    Filed: August 20, 2009
    Publication date: December 17, 2009
    Inventors: JOERG APPENZELLER, Phaedon Avouris, Kevin K. Chan, Philip G. Collins, Richard Martel, Hon-Sum Philip Wong
  • Publication number: 20090301349
    Abstract: The present invention provides a method for selectively placing carbon nanotubes on a substrate surface by using functionalized carbon nanotubes having an organic compound that is covalently bonded to such carbon nanotubes. The organic compound comprises at least two functional groups, the first of which is capable of forming covalent bonds with carbon nanotubes, and the second of which is capable of selectively bonding metal oxides. Such functionalized carbon nanotubes are contacted with a substrate surface that has at least one portion containing a metal oxide. The second functional group of the organic compound selectively bonds to the metal oxide, so as to selectively place the functionalized carbon nanotubes on the at least one portion of the substrate surface that comprises the metal oxide.
    Type: Application
    Filed: August 14, 2009
    Publication date: December 10, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ali Afzali-Ardakani, Phaedon Avouris, James B. Hannon, Christian Klinke
  • Patent number: 7598516
    Abstract: A complementary metal oxide semiconductor (CMOS) device, e.g., a field effect transistor (FET), that includes at least one one-dimensional nanostructure that is typically a carbon-based nanomaterial, as the device channel, and a metal carbide contact that is self-aligned with the gate region of the device is described. The present invention also provides a method of fabricating such a CMOS device.
    Type: Grant
    Filed: January 7, 2005
    Date of Patent: October 6, 2009
    Assignee: International Business Machines Corporation
    Inventors: Phaedon Avouris, Roy A. Carruthers, Jia Chen, Christophe G. M. M. Detavernier, Christian Lavoie, Hon-Sum Philip Wong
  • Patent number: 7582534
    Abstract: A method is provided for doping nano-components, including nanotubes, nanocrystals and nanowires, by exposing the nano-components to an organic amine-containing dopant. A method is also provided for forming a field effect transistor comprising a nano-component that has been doped using such a dopant.
    Type: Grant
    Filed: November 18, 2004
    Date of Patent: September 1, 2009
    Assignee: International Business Machines Corporation
    Inventors: Ali Afzali-Ardakani, Phaedon Avouris, Jia Chen, Christian Klinke, Christopher B. Murray, Dmitri V. Talapin
  • Publication number: 20090032803
    Abstract: A method of fabricating a nanotube field-effect transistor having unipolar characteristics and a small inverse sub-threshold slope includes forming a local gate electrode beneath the nanotube between drain and source electrodes of the transistor and doping portions of the nanotube. In a further embodiment, the method includes forming at least one trench in the gate dielectric (e.g., a back gate dielectric) and back gate adjacent to the local gate electrode. Another aspect of the invention is a nanotube field-effect transistor fabricated using such a method.
    Type: Application
    Filed: June 30, 2008
    Publication date: February 5, 2009
    Inventors: Joerg Appenzeller, Phaedon Avouris, Yu-Ming Lin