Patents by Inventor Pu Wang

Pu Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230050682
    Abstract: A frequency modulation continuous wave (FMCW)-based system configured to convert measurements of a linearly modulated wave from a time-domain into a frequency-domain to produce a non-linear frequency signal, where the non-linear frequency signal comprises a known linear component representing the desired linear modulation and an unknown non-linear component representing the non-linearity of the modulation. The FMCW-based system is further configured to determine coefficients of a basis function approximating a difference between the non-linear frequency signal and the linear frequency component in the frequency domain. The FMCW-based system is further configured to detect one or multiple spectrum peaks in the distorted beat signal with the distortion compensated according to the basis function with the determined coefficients to determine one or multiple distances to the one or multiple objects in the scene.
    Type: Application
    Filed: August 12, 2021
    Publication date: February 16, 2023
    Applicant: Mitsubishi Electric Research Laboratories, Inc.
    Inventors: Pu Wang, David Millar, Kieran Parsons, Philip Orlik
  • Patent number: 11567183
    Abstract: A multiple input multiple output (MIMO) radar system for detecting a moving object is based on an explicit signal model. The explicit signal model accounts for waveform separation residuals by relating measurements of the virtual array to an auto-term including a Kronecker product of object-receiver signatures and transmitter-object signatures; and a cross-term including a Kronecker product of object-receiver signatures and transmitter-object residual signatures. The radar system uses a spatial MIMO object detector that is based on the explicit signal model to detect the moving object.
    Type: Grant
    Filed: April 8, 2020
    Date of Patent: January 31, 2023
    Assignee: Mitsubishi Electric Research Laboratories, Inc.
    Inventors: Pu Wang, Petros Boufounos, Hassan Mansour, Philip Orlik
  • Publication number: 20230026141
    Abstract: A semiconductor package includes a redistribution structure, a plurality of semiconductor devices, and a plurality of heat dissipation films. The plurality of semiconductor devices mounted on the redistribution structure. The plurality of heat dissipation films are respectively disposed on and jointly covering upper surfaces of the plurality of semiconductor devices. A plurality of trenches are respectively extended between each two of the plurality of heat dissipations and extended between each two of the plurality of semiconductor devices.
    Type: Application
    Filed: July 23, 2021
    Publication date: January 26, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hao Chen, Po-Yuan Cheng, Pu Wang, Li-Hui Cheng
  • Publication number: 20230018359
    Abstract: A package assembly may include a package substrate, a package lid attached to the package substrate and including a plate portion, an outer foot extending from the plate portion, and an inner foot extending from the plate portion inside the outer foot, and an adhesive that adheres the outer foot to the package substrate and the inner foot to the package substrate.
    Type: Application
    Filed: February 23, 2022
    Publication date: January 19, 2023
    Inventors: Tsung-Fu Tsai, Pu Wang, Ying-Ching Shih, Szu-Wei Lu
  • Publication number: 20230014913
    Abstract: In an embodiment, a device includes: a package component including an integrated circuit die and conductive connectors connected to the integrated circuit die, the conductive connectors disposed at a front-side of the package component, the integrated circuit die exposed at a back-side of the package component; a heat dissipation layer on the back-side of the package component and on sidewalls of the package component; an adhesive layer on a back-side of the heat dissipation layer, a portion of a sidewall of the heat dissipation layer being free from the adhesive layer; and a package substrate connected to the conductive connectors.
    Type: Application
    Filed: March 4, 2022
    Publication date: January 19, 2023
    Applicants: Taiwan Semiconductor Manufacturing Co., Ltd., Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Hao Chen, Po-Yuan Cheng, Pu Wang, Li-Hui Cheng
  • Publication number: 20230021005
    Abstract: A semiconductor device includes a substrate, a package structure, a thermal interface material (TIM) structure, and a lid structure. The package structure is disposed on the substrate. The TIM structure is disposed on the package structure. The TIM structure includes a metallic TIM layer and a non-metallic TIM layer in contact with the metallic TIM layer, and the non-metallic TIM layer surrounds the metallic TIM layer. The lid structure is disposed on the substrate and the TIM structure.
    Type: Application
    Filed: May 6, 2022
    Publication date: January 19, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Chih Chiou, Ping-Yin Hsieh, Ying-Ching Shih, Pu Wang, Li-Hui Cheng, Yi-Huan Liao, Chih-Hao Chen
  • Publication number: 20220405794
    Abstract: A system and method for throttling communications with consumer devices is disclosed. The consumer devices are associated with consumers and consumers are associated with preferred types of electronic correspondence. The system and method transmits to a first set of the consumer devices a first electronic correspondence including a deal from a deal program comprising an offer and an expiration date. The system and method receive responses to the first electronic correspondence and based on the responses and expiration of outstanding offers at the expiration date generates an indicator used to determine to communicate with one or more additional consumers through their consumer devices. The system and method generate additional electronic correspondence of the preferred type and transmit the additional electronic correspondence to the additional consumers. In this way, additional electronic correspondence may be throttled upward or downward.
    Type: Application
    Filed: April 8, 2022
    Publication date: December 22, 2022
    Inventors: Amit Aggarwal, Kevin Chang, David Thacker, Pu Wang
  • Publication number: 20220406676
    Abstract: A semiconductor device includes a substrate, a package structure, a thermal interface material (TIM) layer, and a lid structure. The package structure is disposed on the substrate. The TIM layer is disposed on the package structure. The TIM layer includes a liquid state metal material. The lid structure is disposed on the substrate and the TIM layer. The lid structure includes a trench facing the package structure. At least a portion of the TIM layer is located in the trench.
    Type: Application
    Filed: June 18, 2021
    Publication date: December 22, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ping-Yin Hsieh, Pu Wang, Tsung-Fu Tsai, Li-Hui Cheng, Szu-Wei Lu
  • Publication number: 20220392823
    Abstract: A method of forming a semiconductor structure includes: attaching a semiconductor device to a first surface of a substrate; placing a thermal interface material (TIM) film over a first side of the semiconductor device distal from the substrate, where the TIM film is pre-formed before the placing, where after the placing, a peripheral portion of the TIM film extends laterally beyond sidewalls of the semiconductor device; and attaching a lid to the first surface of the substrate to form an enclosed space between the lid and the substrate, where after attaching the lid, the semiconductor device and the TIM film are disposed in the enclosed space, where a first side of the TIM film distal from the substrate contacts the lid.
    Type: Application
    Filed: July 14, 2021
    Publication date: December 8, 2022
    Inventors: Chih-Hao Chen, Hung-Yu Chen, Pu Wang, Li-Hui Cheng, Szu-Wei Lu
  • Patent number: 11521905
    Abstract: A package structure includes a package substrate, a first semiconductor package and a second semiconductor package, an underfill material, a gap filling structure and a heat dissipation structure. The first semiconductor package and the second semiconductor package are electrically bonded to the package substrate. The underfill material is disposed to fill a first space between the first semiconductor package and the package substrate and a second space between the second semiconductor package and the package substrate. The gap filling structure is disposed over the package substrate and in a first gap laterally between the first semiconductor package and the second semiconductor package. The heat dissipation structure is disposed on the package substrate and attached to the first semiconductor package and the second semiconductor package through a thermal conductive layer.
    Type: Grant
    Filed: October 21, 2020
    Date of Patent: December 6, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Pu Wang, Li-Hui Cheng, Szu-Wei Lu, Tsung-Fu Tsai
  • Publication number: 20220384355
    Abstract: Semiconductor devices and methods of manufacture are provided, in which an adhesive is removed from a semiconductor die embedded within an encapsulant, and an interface material is utilized to remove heat from the semiconductor device. The removal of the adhesive leaves behind a recess adjacent to a sidewall of the semiconductor, and the recess is filled.
    Type: Application
    Filed: August 10, 2022
    Publication date: December 1, 2022
    Inventors: Chih-Hao Chen, Pu Wang, Li-Hui Cheng, Szu-Wei Lu
  • Patent number: 11515267
    Abstract: A method includes bonding a second package component to a first package component, bonding a third package component to the first package component, attaching a dummy die to the first package component, encapsulating the second package component, the third package component, and the dummy die in an encapsulant, and performing a planarization process to level a top surface of the second package component with a top surface of the encapsulant. After the planarization process, an upper portion of the encapsulant overlaps the dummy die. The dummy die is sawed-through to separate the dummy die into a first dummy die portion and a second dummy die portion. The upper portion of the encapsulant is also sawed through.
    Type: Grant
    Filed: December 7, 2020
    Date of Patent: November 29, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Wei Wu, Li-Chung Kuo, Pu Wang, Ying-Ching Shih, Szu-Wei Lu, Kung-Chen Yeh
  • Publication number: 20220373671
    Abstract: A tracking system for tracking an expanded state of an object is provided. The tracking system comprises at least one processor and a memory having instructions stored thereon that, when executed by the at least one processor, cause the tracking system to execute a probabilistic filter that iteratively tracks a belief on the expanded state of the object, wherein the belief is predicted using a motion model of the object and is further updated using a compound measurement model of the object. The compound measurement model includes multiple probabilistic distributions constrained to lie on a contour of the object with a predetermined relative geometrical mapping to the center of the object. Further, the tracking system tracks the expanded state of the object based on the updated belief on the expanded state.
    Type: Application
    Filed: May 5, 2021
    Publication date: November 24, 2022
    Applicant: Mitsubishi Electric Research Laboratories, Inc.
    Inventors: Pu Wang, Gang Yao, Hassan Mansour, Karl Berntorp, Petros Boufounos, Philip Orlik
  • Patent number: 11504393
    Abstract: The invention is to provide a hydrogen sulfide sustained releasing dressing and a manufacturing method thereof. The hydrogen sulfide sustained releasing dressing includes a hydrocolloid, a surfactant and sodium hydro sulfide. The manufacturing method includes (a) heating and stirring a hydrocolloid material; (b) adding a surfactant and sodium hydrosulfide into the hydrocolloid material; and (c) injecting the hydrocolloid material containing the surfactant and the sodium hydrosulfide into a mold for thermoforming a hydrogen sulfide sustained releasing dressing.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: November 22, 2022
    Assignee: BenQ Materials Corporation
    Inventors: Lie-Sian Yap, Chih-Yuan Chao, Yu-Pu Wang
  • Publication number: 20220367383
    Abstract: A method of fabricating an integrated fan-out package is provided. A ring-shaped dummy die and a group of integrated circuit dies are mounted over a carrier, wherein the group of integrated circuit dies are surrounded by the ring-shaped dummy die. The ring-shaped dummy die and the group of integrated circuit dies over the carrier are encapsulated with an insulating encapsulation. A redistribution circuit structure is formed on the ring-shaped dummy die, the group of integrated circuit dies and the insulating encapsulation, wherein the redistribution circuit structure is electrically connected to the group of integrated circuit dies, and the ring-shaped dummy die is electrically floating.
    Type: Application
    Filed: May 13, 2021
    Publication date: November 17, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Pu Wang, Li-Hui Cheng, Szu-Wei Lu, Hsien-Ju Tsou
  • Publication number: 20220359487
    Abstract: A package structure includes a circuit substrate, a semiconductor package, a lid structure and a plurality of first spacer structures. The semiconductor package is disposed on and electrically connected to the circuit substrate. The lid structure is disposed on the circuit substrate covering the semiconductor package, wherein the lid structure is attached to the circuit substrate through an adhesive material. The plurality of first spacer structures is surrounding the semiconductor package, wherein the first spacer structures are sandwiched between the lid structure and the circuit substrate, and includes a top portion in contact with the lid structure and a bottom portion in contact with the circuit substrate.
    Type: Application
    Filed: July 27, 2022
    Publication date: November 10, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Fu Tsai, Chin-Fu Kao, Pu Wang, Szu-Wei Lu
  • Publication number: 20220359339
    Abstract: A method includes placing a package, which includes a first package component, a second package component, and an encapsulant encapsulating the first package component and the second package component therein. The method further includes attaching a first thermal interface material over the first package component, attaching a second thermal interface material different from the first thermal interface material over the second package component, and attaching a heat sink over both of the first thermal interface material and the second thermal interface material.
    Type: Application
    Filed: July 21, 2021
    Publication date: November 10, 2022
    Inventors: Ping-Yin Hsieh, Pu Wang, Li-Hui Cheng, Szu-Wei Lu
  • Publication number: 20220359345
    Abstract: A method includes bonding a first package and a second package over a package component, adhering a first Thermal Interface Material (TIM) and a second TIM over the first package and the second package, respectively, dispensing an adhesive feature on the package component, and placing a heat sink over and contacting the adhesive feature. The heat sink includes a portion over the first TIM and the second TIM. The adhesive feature is then cured.
    Type: Application
    Filed: August 3, 2021
    Publication date: November 10, 2022
    Inventors: Yu-Hsun Wang, Ping-Yin Hsieh, Pu Wang, Li-Hui Cheng, Szu-Wei Lu
  • Publication number: 20220344304
    Abstract: A semiconductor structure includes a first semiconductor package, a second semiconductor package, a heat spreader and an underfill layer. The first semiconductor package includes a plurality of lower semiconductor chips and a first dielectric encapsulation layer disposed around the plurality of the lower semiconductor chips. The second semiconductor package is disposed over and corresponds to one of the plurality of lower semiconductor chips, wherein the second semiconductor package includes a plurality of upper semiconductor chips and a second dielectric encapsulation layer disposed around the plurality of upper semiconductor chips. The heat spreader is disposed over and corresponds to another of the plurality of lower semiconductor chips. The underfill layer is disposed over the first semiconductor package and around the second semiconductor package and the heat spreader.
    Type: Application
    Filed: April 27, 2021
    Publication date: October 27, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Chien Pan, Pu Wang, Li-Hui Cheng, An-Jhih Su, Szu-Wei Lu
  • Publication number: 20220328702
    Abstract: The present application belongs to the technical field of solar cells, and relates to a p-type bifacial solar cell with partial rear surface field passivation and a preparation method therefor. The solar cell includes a p-type silicon substrate. At the bottom portion of the p-type silicon substrate are arranged, from top to bottom, a silicon oxide passivation layer, an aluminum oxide passivation layer and a rear side silicon nitride anti-reflection layer. A plurality of boron source-doped layers are embedded in the bottom portion of the p-type silicon substrate. Connected to the bottom of each of the boron source-doped layers is a rear side metal electrode layer, which penetrates each of the silicon oxide passivation layer, the aluminum oxide passivation layer and the rear side silicon nitride anti-reflection layer.
    Type: Application
    Filed: August 13, 2020
    Publication date: October 13, 2022
    Applicants: Tongwei Solar (Chengdu) Co., Ltd., Tongwei Solar (Meishan) Co., Ltd.
    Inventors: Pu WANG, Yi XIE, Peng ZHANG, Shan SUI