Abstract: A device for separating and recovering flat-plate catalyst powder and a method for determining a wear ratio are provided. The device includes a powder separation unit and a powder recovery unit, a powder accumulation bin is respectively connected with a shell and a catalyst powder outlet, a cyclone outlet is configured on an inner side of a recovery shell, and a primary filter and a secondary filter are configured on an inner side wall of the recovery shell.

Abstract: Provided is a display module. The display module includes: a display panel and a heat dissipation structure; wherein the display panel includes a substrate and a display substrate layer disposed on the substrate, and the heat dissipation structure is disposed on a side, distal from the display substrate layer, of the substrate; and a gap is formed between at least a partial region of the heat dissipation structure and the substrate.

Abstract: Methods and systems for high-resolution image manipulation are disclosed. An original high-resolution image to be manipulated is obtained, as well as a driving signal indicating a manipulation result. The original high-resolution image is down-sampled to obtain a low-resolution image to be manipulated. Using a trained manipulation generator, a low-resolution manipulated image and a motion field are generated from the low-resolution image. The motion field represent pixel displacements of the low-resolution image to obtain the manipulation indicated by the driving signal. A high-frequency residual image is computed from the original high-resolution image. A high-frequency manipulated residual image is generated using the motion field. A high-resolution manipulated image is outputted by combining the high-frequency manipulated residual image and a low-frequency manipulated image generated from the low-resolution manipulated image by up-sampling.

Abstract: A laminating device and a laminating method are disclosed. The laminating device is used for laminating a flexible panel together with a curved cover plate. The curved cover plate is provided with a central area and an edge bending area located in a first direction in the central area. The laminating device comprises a movable mechanism, which is arranged opposite the curved cover plate in a second direction and comprises: a first movable base table and a second movable base table, which are arranged opposite each other in the first direction; and an elastic supporting member, which is provided with an elastic supporting portion, the elastic supporting portion covering parts of the first movable base table station and the second movable base table station that are close to the curved cover plate, and being used for fixing the flexible panel.

Abstract: Some embodiments of the invention provide a method of sending data in a network that includes at least one worker node executing one or more sets of containers and a virtual switch, the virtual switch including a gateway interface, a virtual local area network (VLAN) tunnel interface, and a set of virtual Ethernet interfaces associated with the one or more sets of containers. The method configures the gateway interface of the worker node to associate the gateway interface with multiple subnets that are each associated with a namespace. The worker node executes at least (1) first and second sets of containers of a first namespace, and (2) a third set of containers of a second namespace. The method sends data between the first and second sets of containers through a first virtual Ethernet interface associated with the first set of containers and a second virtual Ethernet interface associated with the second set of containers.

Abstract: Several embodiments of electrical circuit devices and systems with clock distortion calibration circuitry are disclosed herein. In one embodiment, an electrical circuit device includes clock distortion calibration circuitry to calibrate a clock signal. The clock distortion calibration circuitry is configured to determine when one or more duty cycle calibration (DCC) conditions are met. When the DCC condition(s) are met, the clock distortion calibration circuitry is configured adjust a trim value associated with at least one of first and second duty cycles of first and second voltage signals, respectively. In some embodiments, the clock distortion calibration circuitry is configured to calibrate at least one of the first and the second duty cycles of the first and the second voltage signals using the adjusted trim value to account for duty cycle distortion encountered across various voltages and/or temperatures while the electrical circuit devices and/or systems remain in a powered on state.

Abstract: A method of peak power management (PPM) is provided for two NAND memory dies. each NAND memory die comprises a PPM circuit having a PPM contact pad held at an electric potential common between the two NAND memory dies. The method includes the following steps: detecting the electric potential during a first peak power check (PPC) routine for the first NAND memory die; driving the electric potential to a second voltage level if the detected electric potential is at a first voltage level higher than the second voltage level; generating a pausing signal in the electric potential to pause a second PPC routine for the second NAND memory die if no pausing signal is detected; and generating a resuming signal in the electric potential to resume the second PPC routine for the second NAND memory die after the first NAND memory die completes a first peak power operation.

Abstract: A memory device includes a plurality of input/output (I/O) nodes, a circuit, a latch, a memory, and control logic. The plurality of I/O nodes receive a predefined data pattern. The circuit adjusts a delay for each I/O node as the predefined data pattern is received. The latch latches the data received on each I/O node. The memory stores the latched data. The control logic compares the stored latched data to an expected data pattern and sets the delay for each I/O node based on the comparison.

Abstract: Provided is a display panel including a plurality of sub-pixels and includes a substrate and a pixel defining layer, a light emitting device and a color film layer disposed on the substrate. The pixel defining includes M layers and M being a positive integer equal to or greater than 2, an m-th layer of pixel defining layer is covered on a surface of an (m?1)-th layer of pixel defining layer, and a refractive index nm-1 of the (m?1)-th layer of pixel defining layer is greater than a refractive index nm of the m-th layer of pixel defining layer, and wherein 2?m?M.

Abstract: A system includes multiple memory dies. Each of the memory dies includes a PPM circuit including a first pull driver, a second pull driver, and a PPM contact pad connected between the first pull driver and the second pull driver. The PPM contact pads of the multiple memory dies are electrically connected with each other. The PPM circuits of the multiple memory dies are configured to manage peak power operations according to a first pull current flowing through a certain first pull driver of a certain PPM circuit. The first pull current is a sum of second pull currents flowing through second pull drivers of the PPM circuit. Each of the second pull currents is proportional to a current level of a corresponding memory die.

Abstract: The present disclosure provides a display apparatus, a display panel of which includes a panel chip; a second bonding region of a main circuit board is provided with second display terminals coupled with first display terminals and second touch control terminals coupled with first touch control terminals; each of segment touch control lines includes a first segment coupled between one second touch control terminal and one main connector in a first region, and a second segment coupled between a touch control chip and one main connector in a second region; a third region and a fourth region of a jumper connection circuit board are bonded with the first region and the second region respectively; the segment touch control lines are in one-to-one correspondence with jumper connection lines, each jumper connection line is coupled between one jumper connector in the third region and one jumper connector in the fourth region.

Abstract: The present disclosure relates to the technical field of display product preparation, and in particular discloses a flexible display panel lamination device which is used for laminating a to-be-laminated flexible display panel onto a cover plate, and includes a base and an elastic lamination part arranged on the base. The elastic lamination part is provided with a first surface for bearing the to-be-laminated flexible display panel and a second surface opposite to the first surface; the second surface is symmetrically provided with two supporting protruding ribs; the two supporting protruding ribs are respectively fixed in two fixation grooves formed on the base; a gap is formed between a portion, located between the two supporting protruding ribs, of the second surface of the elastic lamination part and the base; and a portion, close to the edge, of the second surface of the elastic lamination part is supported on the base.

Abstract: A method for generating a digital identity is provided, including: extracting a first preset number of short tandem repeat STRs and relevant information of each STR from whole genome data; generating a single STR digital code corresponding to each STR according to the relevant information of each STR, to obtain a plurality of single STR digital codes; performing sequence transformation on each single STR digital code with a preset rule, and generating a target STR digital code according to the single STR digital code after the sequence transformation; generating summary information of the target STR digital code, and determining the summary information as summary information of the STR to which the target STR digital code belongs; and determining the summary information of the STR as the generated digital identity.

Abstract: A laminating device includes: a plate being bendable, having a resilience characteristic and for bearing the flexible substrate; a supporting base platform for supporting the plate and driving the plate and the flexible substrate on the plate to move; a bending assembly for applying stress to drive the plate and the flexible substrate on the plate to be bent towards a side, facing away from the flexible substrate, of the plate, and for releasing stress to allow the plate and the flexible substrate to rebound; and a fixing fixture for fixing the protective cover plate. The protective cover plate is used to be laminated to the flexible substrate, a shape of the fixing fixture is same as or similar to that of the protective cover plate, the fixing fixture is bent to form an accommodating space, and the protective cover plate is fixed in the accommodating space.

Abstract: A method of peak power management (PPM) for a storage system with multiple memory dies is provided, where each of the multiple memory dies includes a PPM circuit having a PPM contact pad and PPM contact pads of the multiple memory dies are electrically connected. The PPM method includes the following steps: switching on a pull-down driver of the PPM circuit on a selected memory die of the storage system; verifying a PPM enablement signal regulated by a pull-down current flowing through the pull-down driver; and performing a peak power operation on the selected memory die when the PPM enablement signal indicates that a total current of the storage system is less than a maximum total current allowed for the storage system.

Abstract: Embodiments of three-dimensional (3D) memory devices and methods for forming the 3D memory devices are disclosed. In an example, the 3D memory device includes a film stack having a plurality of conductive and dielectric layer pairs vertically stacked on a substrate. Each conductive and dielectric layer pair includes a dielectric layer and a conductive layer. The 3D memory device also includes a staircase region having a first and a second staircase structure formed in the film stack, where the first and second staircase structures each extends laterally in a first direction and includes the plurality of conductive and dielectric layer pairs. The staircase region further includes a staircase bridge connecting the first and second staircase structures.

Abstract: A method of programming a ferroelectric memory device is disclosed. The method includes applying a first voltage to a first word line; applying a second voltage to the first word line; and applying a pass voltage to a second word line during a period of applying the first voltage to the first word line and during a period of applying the second voltage to the first word line. The pass voltage is between the first threshold voltage and the second threshold voltage.

Abstract: The present disclosure provides a display apparatus, a display panel of which includes a panel chip; a second bonding region of a main circuit board is provided with second display terminals coupled with first display terminals and second touch control terminals coupled with first touch control terminals; each of segment touch control lines includes a first segment coupled between one second touch control terminal and one main connector in a first region, and a segment coupled between a touch control chip and one main connector in a second region; a third region and a fourth region of a jumper connection circuit board are bonded with the first region and the second region respectively; the segment touch control lines are in one-to-one correspondence with jumper connection lines, each jumper connection line is coupled between one jumper connector in the third region and one jumper connector in the fourth region.

Abstract: In certain aspects, a memory device includes an array of memory cells, an input/output (I/O) circuit, and I/O control logic coupled to the I/O circuit. The array of memory cells includes a first-level memory unit which includes a plurality of second-level memory units. Each second-level memory unit includes N main banks and a redundant bank, where N is a positive integer. The I/O circuit is configured to direct N pieces of data to or from N working banks in a corresponding second-level memory unit. The I/O control logic is configured to determine the N working banks from the N main banks and the redundant bank in the corresponding second-level memory unit based on bank fail information indicative of a failed main bank of the N main banks and control the I/O circuit to direct the N pieces of data to or from the N working banks, respectively.

Abstract: A flexible printed circuit and a manufacturing method thereof, an electronic device module and an electronic device are provided.