Patents by Inventor Rahul Jain

Rahul Jain has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11651902
    Abstract: Embodiments herein relate to systems, apparatuses, processing, and techniques related to patterning one or more sides of a thin film capacitor (TFC) sheet, where the TFC sheet has a first side and a second side opposite the first side. The first side and the second side of the TFC sheet are metal and are separated by a dielectric layer, and the patterned TFC sheet is to provide at least one of a capacitor or a routing feature on a first side of a substrate that has the first side and a second side opposite the first side.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: May 16, 2023
    Assignee: Intel Corporation
    Inventors: Rahul Jain, Andrew J. Brown, Prithwish Chatterjee, Sai Vadlamani, Lauren Link
  • Patent number: 11652071
    Abstract: A substrate for an electronic device may include a first layer, a second layer, and may include a third layer. The first layer may include a capacitive material, and the capacitive material may be segmented into a first section, and a second section. Each of the first section and the second section may include a first surface and a second surface. The second layer may include a first conductor. The third layer may include a second conductor. The first surface of the second section of capacitive material may be directly coupled to the first conductor. The second surface of the second section of the capacitive material may be directly coupled to the second conductor. A first filler region may include a dielectric material and the first filler region may be located in a first gap between the first section of capacitive material and the second section of capacitive material.
    Type: Grant
    Filed: January 26, 2021
    Date of Patent: May 16, 2023
    Assignee: Intel Corporation
    Inventors: Brandon C Marin, Shivasubramanian Balasubramanian, Rahul Jain, Praneeth Akkinepally, Jeremy D Ecton
  • Publication number: 20230145762
    Abstract: A tamper resistant plug that has particular application for sealing a fill port in a hermetically sealed and gas-insulated tank associated with medium-voltage switchgear. The plug includes a body portion and a top annular rim defining a central recess and having an internal surface facing the recess, where the internal surface has a polygon shape with only rounded edges. In one embodiment, the polygon shape is a trilobe.
    Type: Application
    Filed: October 11, 2022
    Publication date: May 11, 2023
    Applicant: S&C Electric Company
    Inventors: Eliseo Navarrete, Lawrence S. Semel, James F. Fargo, Rahul Jain
  • Patent number: 11627080
    Abstract: Example methods are provided a network device to perform service insertion in a public cloud environment that includes a first virtual network and a second virtual network. In one example method, in response to receiving a first encapsulated packet from a first virtualized computing instance located in the first virtual network, the network device may generate a decapsulated packet by performing decapsulation to remove, from the first encapsulated packet. The method may also comprise identifying a service path specified by a service insertion rule, and sending the decapsulated packet to the service path to cause the service path to process the decapsulated packet according to one or more services. The method may further comprise: in response to the network device receiving the decapsulated packet processed by the service path, sending the decapsulated packet, or generating and sending a second encapsulated packet, towards a destination address.
    Type: Grant
    Filed: January 18, 2019
    Date of Patent: April 11, 2023
    Assignee: VMWARE, INC.
    Inventors: Mukesh Hira, Rahul Jain
  • Patent number: 11610706
    Abstract: A substrate for an integrated circuit package, the substrate comprising a dielectric, at least one conductor plane within the dielectric, and a planar magnetic structure comprising an organic magnetic laminate embedded within the dielectric, wherein the planar magnetic structure is integrated within the at least one conductor plane.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: March 21, 2023
    Assignee: Intel Corporation
    Inventors: Sai Vadlamani, Prithwish Chatterjee, Rahul Jain, Kyu Oh Lee, Sheng C. Li, Andrew J. Brown, Lauren A. Link
  • Patent number: 11581271
    Abstract: Embodiments include semiconductor packages. A semiconductor package includes a plurality of build-up layers and a plurality of conductive layers in the build-up layers. The conductive layers include a first conductive layer and a second conductive layer. The first conductive layer is over the second conductive layer and build-up layers, where a first via couples the first and second conductive layers. The semiconductor package also includes a thin film capacitor (TFC) in the build-up layers, where a second via couples the TFC to the first conductive layer, and the second via has a thickness less than a thickness of the first via. The first conductive layer may be first level interconnects. The build-up layers may be dielectrics. The TFC may include a first electrode, a second electrode, and a dielectric. The first electrode may be over the second electrode, and the dielectric may be between the first and second electrodes.
    Type: Grant
    Filed: March 14, 2019
    Date of Patent: February 14, 2023
    Assignee: Intel Corporation
    Inventors: Rahul Jain, Kyu-Oh Lee, Islam A. Salama, Amruthavalli P. Alur, Wei-Lun K. Jen, Yongki Min, Sheng C. Li
  • Patent number: 11570104
    Abstract: Example methods and systems are provided a network device to perform tunnel-based service insertion in a public cloud environment. An example method may comprise establishing a tunnel between the network device and a service path. The method may also comprise: in response to receiving a first encapsulated packet, identifying the service path specified by a service insertion rule; generating and sending a second encapsulated packet over the tunnel to cause the service path to process an inner packet according to one or more services. The method may further comprise: in response to receiving, from the service path via the tunnel, a third encapsulated packet that includes the inner packet processed by the service path, sending the inner packet processed by the service path, or a fourth encapsulated packet, towards a destination address of the inner packet.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: January 31, 2023
    Assignee: VMWARE, INC.
    Inventors: Rahul Jain, Kantesh Mundaragi, Pierluigi Rolando, Jayant Jain, Mukesh Hira
  • Patent number: 11557489
    Abstract: Disclosed herein are cavity structures in integrated circuit (IC) package supports, as well as related methods and apparatuses. For example, in some embodiments, an IC package support may include: a cavity in a dielectric material, wherein the cavity has a bottom and sidewalls; conductive contacts at the bottom of the cavity, wherein the conductive contacts include a first material; a first peripheral material outside the cavity, wherein the first peripheral material is at the sidewalls of the cavity and proximate to the bottom of the cavity, and the first peripheral material includes the first material; and a second peripheral material outside the cavity, wherein the second peripheral material is at the sidewalls of the cavity and on the first peripheral material, and the second peripheral material is different than the first peripheral material.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: January 17, 2023
    Assignee: Intel Corporation
    Inventors: Rahul Jain, Sai Vadlamani, Junnan Zhao, Ji Yong Park, Kyu Oh Lee, Cheng Xu
  • Patent number: 11509526
    Abstract: A first cloud extension agent that facilitates internet-based management of a first set of local computing resources of a network is provided by a remote network management platform. A first connection is established to the first cloud extension agent. A second cloud extension agent that facilitates internet-based management of a second set of local computing resources of a network is provided by the remote network management platform. A second connection is established to the second cloud extension agent. A first set of instructions is provided to the first cloud extension via the first connection and a second set of instructions is provided to the second cloud extension via the second connection.
    Type: Grant
    Filed: August 10, 2020
    Date of Patent: November 22, 2022
    Assignee: Snowflake Inc.
    Inventors: Vineeth Narasimhan, Joshua Lambert, Thomas Herchek, Ryan Elliot Hope, Nitish Jha, Rahul Jain, Sumeet Singh
  • Publication number: 20220367104
    Abstract: Embodiments include an inductor that comprises an inductor trace and a magnetic body surrounding the inductor trace. In an embodiment, the magnetic body comprises a first step surface and a second step surface. Additional embodiments include an inductor that includes a barrier layer. In an embodiment, an inductor trace is formed over a first surface of the barrier layer. Embodiments include a first magnetic body over the inductor trace and the first surface of the barrier layer, and a second magnetic body over a second surface of the barrier layer opposite the first surface. In an embodiment, a width of the second magnetic body is greater than a width of the first magnetic body.
    Type: Application
    Filed: July 26, 2022
    Publication date: November 17, 2022
    Inventors: Cheng XU, Kyu-Oh LEE, Junnan ZHAO, Rahul JAIN, Ji Yong PARK, Sai VADLAMANI, Seo Young KIM
  • Publication number: 20220359115
    Abstract: Apparatuses, systems and methods associated with a substrate assembly with an encapsulated magnetic feature for an inductor are disclosed herein. In embodiments, a substrate assembly may include a base substrate, a magnetic feature encapsulated within the base substrate, and a coil, wherein a portion of the coil extends through the magnetic feature. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: July 26, 2022
    Publication date: November 10, 2022
    Inventors: Kyu-Oh LEE, Rahul JAIN, Sai VADLAMANI, Cheng XU, Ji Yong PARK, Junnan ZHAO, Seo Young KIM
  • Publication number: 20220328431
    Abstract: Embodiments include an electronic package that includes a first layer that comprises a dielectric material and a second layer over the first layer, where the second layer comprises a magnetic material. In an embodiment, a third layer is formed over the second layer, where the third layer comprises a dielectric material. In an embodiment, the third layer entirely covers a first surface of the second layer. In an embodiment a first conductive layer and a second conductive layer are embedded within the second layer. In an embodiment, sidewalls of the first conductive layer and the second conductive layer are substantially vertical.
    Type: Application
    Filed: June 28, 2022
    Publication date: October 13, 2022
    Inventors: Cheng XU, Kyu-Oh LEE, Junnan ZHAO, Rahul JAIN, Ji Yong PARK, Sai VADLAMANI, Seo Young KIM
  • Publication number: 20220329461
    Abstract: Some embodiments provide a centralized overlay-network cloud gateway and a set of centralized services in a transit virtual cloud network (VCN) connected to multiple other compute VCNs hosting compute nodes (VMs, containers, etc.) that are part of (belong to) the overlay network. The centralized overlay-network cloud gateway provides connectivity between compute nodes of the overlay network (e.g., a logical network spanning multiple VCNs) and compute nodes in external networks. Some embodiments use the centralized overlay-network cloud gateway to provide transitive routing (e.g., routing through a transit VCN) in the absence of direct peering between source and destination VCNs. The overlay network, of some embodiments, uses the same subnetting and default gateway address for each compute node as the cloud provider network provided by the virtual private cloud provider.
    Type: Application
    Filed: June 26, 2022
    Publication date: October 13, 2022
    Inventors: Mukesh Hira, Su Wang, Rahul Jain, Ganesan Chandrashekhar, Sandeep Siroya
  • Publication number: 20220322137
    Abstract: A wireless communication utilizes robust header compression efficiently with improved improvements in packet data convergence protocol configuration for increasing channel throughput. A user equipment (UE) receives a configuration indicating a first listing of header generic options that are supported between the UE and a first base station. The UE obtains a first packet including a first uncompressed header that indicates header parameters. The UE determines whether the header parameters in the first uncompressed header corresponds to at least one header generic option in the first listing of header generic options. The UE communicates the first packet that may have a first compressed header based on a first header compression profile or an uncompressed header depending on whether the header parameters in the first uncompressed header corresponds to at least one header generic option in the first listing of header generic options.
    Type: Application
    Filed: March 30, 2021
    Publication date: October 6, 2022
    Inventors: Deepak SAH, Nagamanikandan SIVAKUMAR, Rahul JAIN
  • Patent number: 11463909
    Abstract: A wireless communication utilizes robust header compression efficiently with improved improvements in packet data convergence protocol configuration for increasing channel throughput. A user equipment (UE) receives a configuration indicating a first listing of header generic options that are supported between the UE and a first base station. The UE obtains a first packet including a first uncompressed header that indicates header parameters. The UE determines whether the header parameters in the first uncompressed header corresponds to at least one header generic option in the first listing of header generic options. The UE communicates the first packet that may have a first compressed header based on a first header compression profile or an uncompressed header depending on whether the header parameters in the first uncompressed header corresponds to at least one header generic option in the first listing of header generic options.
    Type: Grant
    Filed: March 30, 2021
    Date of Patent: October 4, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Deepak Sah, Nagamanikandan Sivakumar, Rahul Jain
  • Patent number: 11450471
    Abstract: Embodiments include an inductor that comprises an inductor trace and a magnetic body surrounding the inductor trace. In an embodiment, the magnetic body comprises a first step surface and a second step surface. Additional embodiments include an inductor that includes a barrier layer. In an embodiment, an inductor trace is formed over a first surface of the barrier layer. Embodiments include a first magnetic body over the inductor trace and the first surface of the barrier layer, and a second magnetic body over a second surface of the barrier layer opposite the first surface. In an embodiment, a width of the second magnetic body is greater than a width of the first magnetic body.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: September 20, 2022
    Assignee: Intel Corporation
    Inventors: Cheng Xu, Kyu-Oh Lee, Junnan Zhao, Rahul Jain, Ji Yong Park, Sai Vadlamani, Seo Young Kim
  • Patent number: 11443885
    Abstract: Embodiments include inductors and methods of forming inductors. In an embodiment, an inductor may include a substrate core and a conductive through-hole through the substrate core. Embodiments may also include a magnetic sheath around the conductive through hole. In an embodiment, the magnetic sheath is separated from the plated through hole by a barrier layer. In an embodiment, the barrier layer is formed over an inner surface of the magnetic sheath and over first and second surfaces of the magnetic sheath.
    Type: Grant
    Filed: March 12, 2018
    Date of Patent: September 13, 2022
    Assignee: Intel Corporation
    Inventors: Kristof Darmawikarta, Srinivas Pietambaram, Sandeep Gaan, Sri Ranga Sai Boyapati, Prithwish Chatterjee, Sameer Paital, Rahul Jain, Junnan Zhao
  • Patent number: 11443892
    Abstract: Apparatuses, systems and methods associated with a substrate assembly with an encapsulated magnetic feature for an inductor are disclosed herein. In embodiments, a substrate assembly may include a base substrate, a magnetic feature encapsulated within the base substrate, and a coil, wherein a portion of the coil extends through the magnetic feature. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: June 27, 2018
    Date of Patent: September 13, 2022
    Assignee: Intel Corporation
    Inventors: Kyu-Oh Lee, Rahul Jain, Sai Vadlamani, Cheng Xu, Ji Yong Park, Junnan Zhao, Seo Young Kim
  • Patent number: 11443087
    Abstract: A system is disclosed that includes a memory and a processor configured to perform operations stored in the memory. The processor performs the operations to select a master clock for a plurality of clocks in a design logic circuit. The processor further performs the operations to align a clock edge of a clock of the plurality of clocks with a corresponding nearest clock transition of the master clock. The aligned clock edge of the clock limits a number of emulation cycles for the design logic to a fixed number of emulation cycles required for the master clock The processor further performs the operation to determine a clock period for measuring power required for the design logic circuit and estimate, at the aligned clock edge, the power required for the design logic circuit corresponding to the determined clock period, which corresponds to a clock selected from the plurality of clocks and the master clock.
    Type: Grant
    Filed: May 15, 2020
    Date of Patent: September 13, 2022
    Assignee: SYNOPSYS, INC.
    Inventors: Alexander John Wakefield, Jitendra Gupta, Vaibhav Jain, Rahul Jain, Shweta Bansal
  • Patent number: RE49346
    Abstract: One embodiment is directed to a system for providing wireless coverage and capacity for a public land mobile network within a building. The system comprises a pico base station comprising multiple transceiver units. The pico base station is installed in the building. The system further comprises a plurality of antennas located within the building. The plurality of antennas are located remotely from the pico base station. The pico base station is communicatively coupled to the public land mobile network. The pico base station is communicatively coupled to the plurality of antennas.
    Type: Grant
    Filed: October 1, 2015
    Date of Patent: December 27, 2022
    Assignee: STRONG FORCE IoT Portfolio 2016, LLC
    Inventors: Robert D. Schmidt, Rahul Jain, Mark F. Schutzer, Lance K. Uyehara, Gilad Peleg, John O'Connell, Ilan Vardi