Patents by Inventor Rajeev Kumar

Rajeev Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240160283
    Abstract: There is provided a system for modulating user commands via command input images displayed on a graphical user interface based on a user viewing direction relative to the displayed command input images and the graphical user interface. The system uses an image capturing device for capturing real time images of a user's face, eyes and irises and determines the eye orientation. The system separates the graphical user interface into interface portions and determines a correlation between the eye orientation and one or more portions to determine if any of the foregoing are viewed portions. The system determines whether a viewed portion contains a command input image and only allows user input commands via the command input image to be processed if the image is within a viewed portion.
    Type: Application
    Filed: January 22, 2024
    Publication date: May 16, 2024
    Inventors: Rajeev KUMAR, Rakesh KUMAR
  • Publication number: 20240157812
    Abstract: A system is provided that may include one or more processors that may receive one or more signals relating to operation of an energy system of a vehicle. The processors may calculate an operational status of the energy storage system based at least in part on comparing the one or more signals with one or more designated criteria related to the energy storage system. The processors may automatically control a shutdown and a startup of an engine of the vehicle responsive to the operational status of the energy storage system being below a threshold.
    Type: Application
    Filed: October 6, 2023
    Publication date: May 16, 2024
    Inventors: Shankar Chandrasekaran, Satendra Kumar Singh, David Petersen, Jason Quigley, Jayaprakash Sabarad, Sunkara Prasanth, Rajeev Verma, Vinay Bavdekar
  • Patent number: 11985831
    Abstract: An apparatus and configuring scheme where a ferroelectric capacitive input circuit can be programmed to perform different logic functions by adjusting the switching threshold of the ferroelectric capacitive input circuit. Digital inputs are received by respective capacitors on first terminals of those capacitors. The second terminals of the capacitors are connected to a summing node. A pull-up and pull-down device are coupled to the summing node. The pull-up and pull-down devices are controlled separately. During a reset phase, the pull-up and pull-down devices are turned on in a sequence, and inputs to the capacitors are set to condition the voltage on node n1. As such, a threshold for the capacitive input circuit is set. After the reset phase, an evaluation phase follows. In the evaluation phase, the output of the capacitive input circuit is determined based on the inputs and the logic function configured during the reset phase.
    Type: Grant
    Filed: December 15, 2021
    Date of Patent: May 14, 2024
    Assignee: Kepler Computing Inc.
    Inventors: Amrita Mathuriya, Rafael Rios, Ikenna Odinaka, Rajeev Kumar Dokania, Debo Olaosebikan, Sasikanth Manipatruni
  • Patent number: 11980992
    Abstract: Embodiments described herein relate to integrated abrasive (IA) polishing pads, and methods of manufacturing IA polishing pads using, at least in part, surface functionalized abrasive particles in an additive manufacturing process, such as a 3D inkjet printing process. In one embodiment, a method of forming a polishing article includes dispensing a first plurality of droplets of a first precursor, curing the first plurality of droplets to form a first layer comprising a portion of a sub-polishing element, dispensing a second plurality of droplets of the first precursor and a second precursor onto the first layer, and curing the second plurality of droplets to form a second layer comprising portions of the sub-polishing element and portions of a plurality of polishing elements. Here, the second precursor includes functionalized abrasive particles having a polymerizable group chemically bonded to surfaces thereof.
    Type: Grant
    Filed: September 16, 2022
    Date of Patent: May 14, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Ashavani Kumar, Ashwin Chockalingam, Sivapackia Ganapathiappan, Rajeev Bajaj, Boyi Fu, Daniel Redfield, Nag B. Patibandla, Mario Dagio Cornejo, Amritanshu Sinha, Yan Zhao, Ranga Rao Arnepalli, Fred C. Redeker
  • Patent number: 11985832
    Abstract: A device includes, in a first region, a first conductive interconnect, an electrode structure on the first conductive interconnect, where the electrode structure includes a first conductive hydrogen barrier layer and a first conductive fill material. A trench capacitor including a ferroelectric material or a paraelectric material is on the electrode structure. A second dielectric includes an amorphous, greater than 90% film density hydrogen barrier material laterally surrounds the memory device. A via electrode including a second conductive hydrogen barrier material is on at least a portion of the memory device. A second region includes a conductive interconnect structure embedded within a less than 90% film density dielectric material.
    Type: Grant
    Filed: December 15, 2021
    Date of Patent: May 14, 2024
    Assignee: Kepler Computing Inc.
    Inventors: Somilkumar J. Rathi, Noriyuki Sato, Niloy Mukherjee, Rajeev Kumar Dokania, Amrita Mathuriya, Tanay Gosavi, Pratyush Pandey, Jason Y. Wu, Sasikanth Manipatruni
  • Patent number: 11983178
    Abstract: Various embodiments are generally directed to techniques for building data lineages for queries, such as SQL queries. Some embodiments are particularly directed to a lineage tool that is able to construct data lineages in a recursive manner that uses the text of a query to identify dependent tables. In several embodiments, the data lineage tool may parse SQL queries to identify columns and dependent tables, including analyzing interdependent queries used to populate dependent tables and proceeding until the true source of data is identified. In several embodiments, the data lineage tool may utilize the relationships and dependencies to build element and table level lineages.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: May 14, 2024
    Assignee: Capital One Services, LLC
    Inventors: Srinivas Kumar, Aravind Birudu, Rajeev Tiwari, Puneet Goyal
  • Publication number: 20240154710
    Abstract: Methods, systems, and devices for wireless communications are described that provide for machine learning model generalization in which a machine learning model may be initially configured for a first set of conditions, and the machine learning model may be generalized to apply to one or more conditions that are outside of the first set of conditions. A network entity may provide a user equipment (UE) with one or more machine learning models, the first set of conditions, and information for model evaluation in which one or more key performance indicators (KPIs) may be evaluated for conditions outside of the first set of conditions. The UE may measure the KPIs, and transmit an evaluation report to the network entity that indicates the KPIs for the identified condition. The network entity may generalize the corresponding model based on the reported KPIs, and provide an updated machine learning model.
    Type: Application
    Filed: August 8, 2023
    Publication date: May 9, 2024
    Inventors: Rajeev KUMAR, Taesang YOO
  • Patent number: 11978762
    Abstract: A configuration for efficiently placing a group of capacitors with one terminal connected to a common node is described. The capacitors are stacked and folded along the common node. In a stack and fold configuration, devices are stacked vertically (directly or with a horizontal offset) with one terminal of the devices being shared to a common node, and further the capacitors are placed along both sides of the common node. The common node is a point of fold. In one example, the devices are capacitors. N number of capacitors can be divided in L number of stack layers such that there are N/L capacitors in each stacked layer. The N/L capacitors are shorted together with an electrode (e.g., bottom electrode). The electrode can be metal, a conducting oxide, or a combination of a conducting oxide and a barrier material. The capacitors can be planar, non-planar or replaced by memory elements.
    Type: Grant
    Filed: March 14, 2022
    Date of Patent: May 7, 2024
    Assignee: KEPLER COMPUTING INC.
    Inventors: Rajeev Kumar Dokania, Amrita Mathuriya, Debo Olaosebikan, Tanay Gosavi, Noriyuki Sato, Sasikanth Manipatruni
  • Patent number: 11979148
    Abstract: Asynchronous circuit elements are described. Asynchronous circuit elements include a consensus element (c-element), completion tree, and validity tree. The c-element is implemented using adjustable threshold based multi-input capacitive circuitries. The completion tree comprises a plurality of c-elements organized in a tree formation. The validity tree comprises OR gates followed by c-elements. The multi-input capacitive circuitries include capacitive structures that may comprise linear dielectric, paraelectric dielectric, or ferroelectric dielectric. The capacitors can be planar or non-planar. The capacitors may be stacked vertically to reduce footprint of the various asynchronous circuitries.
    Type: Grant
    Filed: January 14, 2022
    Date of Patent: May 7, 2024
    Assignee: Kepler Computing Inc.
    Inventors: Amrita Mathuriya, Nabil Imam, Ikenna Odinaka, Rafael Rios, Rajeev Kumar Dokania, Sasikanth Manipatruni
  • Patent number: 11974341
    Abstract: A method, a computer-readable medium, and an apparatus are provided for wireless communication at a network node having a split bearer configuration with a user equipment (UE). The network node measures, at a primary node (MN) or a secondary node (SN), a data burst statistic for the network node, the data burst statistic being based on at least one of a burst level throughput or a packet loss measurement for a data burst between the UE and the MN based on a first bearer in the split bearer configuration or between the UE and the SN based on a second bearer in the split bearer configuration. The network node provides the data burst statistic from the network node to at least one of the MN or a core network component.
    Type: Grant
    Filed: August 17, 2021
    Date of Patent: April 30, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Rajeev Kumar, Xipeng Zhu, Shankar Krishnan, Aziz Gholmieh, Ozcan Ozturk, Punyaslok Purkayastha, Umesh Phuyal, Gavin Bernard Horn
  • Publication number: 20240137923
    Abstract: Methods, systems, and devices for extremely high throughput (EHT) and high frequency bandwidth (BW) support indication are described. A first wireless device may establish a wireless communication link with a second wireless device, receive, from the second wireless device, a first message, and transmit a second message to the second wireless device. The first message may indicate that the second wireless device is capable of communicating using a first physical layer (PHY) mode having a first latency below a first threshold and a first BW associated with a throughput having a second latency below a second threshold. The second message may similarly indicate whether the first wireless device is capable of communicating using the first PHY mode and the first BW. The first wireless device may select a second PHY mode and a second BW for communicating data with the second wireless device based on receiving the first message.
    Type: Application
    Filed: October 4, 2022
    Publication date: April 25, 2024
    Inventors: Imran Ansari, Rajeev Kumar Singh, Prashant Harkude, Shaikh Asfaquz Zaman
  • Publication number: 20240132749
    Abstract: A formulation and process of preparing a functionalized-urethane alkyd resin, and a siliconized-urethane alkyd resin, is obtained from an alkyd based on semi drying/drying oils, or their fatty acids, having high iodine number of 120-170 (gm I2/100 gm), followed by grafting of epoxy-alkyl-alkoxy silane or silanol-functional silicone resin into an alkyd backbone. There is also subsequent urethanization of the organosilane grafted alkyd.
    Type: Application
    Filed: January 2, 2024
    Publication date: April 25, 2024
    Applicant: Asian Paints LTD.
    Inventors: Rajeev K. JAIN, Devchandra PANDIT, Ganesh BATHIRI, Sagar PANGAM, Satishchandra SHETTY, Rajeev Kumar GOEL
  • Patent number: 11968563
    Abstract: Methods, systems, and devices for wireless communications are described. Some wireless communications system may utilize an inter-system information report message (e.g., a self-organizing network (SON) information report message) to support inter-system mobility load balancing (MLB). For example, a first node, operating in accordance with a first radio access technology (RAT), may receive an information report message from a second node operating in accordance with a second RAT. The information report message may include a periodic load reporting request information element (IE) or an event-triggered load reporting request IE. In response, the first node may determine a traffic load based on the load reporting request and transmit, to the second node, an information report message which includes one or more IEs for reporting the determined traffic load. The exchange of the load information via the IEs may enable for MLB between nodes of different RAT.
    Type: Grant
    Filed: July 9, 2021
    Date of Patent: April 23, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Shankar Krishnan, Xipeng Zhu, Rajeev Kumar, Gavin Bernard Horn
  • Patent number: 11967954
    Abstract: A class of complex logic gates are presented that use non-linear polar material. The logic gates include multi-input majority gates. At least one input to an individual multi-input majority gate is a fixed input. Other inputs are driven to non-linear input capacitors on their respective first terminals. The second terminals of the non-linear input capacitors are coupled a summing node, which provides a majority function of the inputs. The summing node is coupled to a CMOS logic. Leakage through the capacitors is configured such that capacitors of a majority gate have substantially equal leakage, and this leakage has a I-V behavior which is symmetric. As such, reset device(s) on the summing node are not used. The non-linear charge response from the non-linear input capacitors results in output voltages close to or at rail-to-rail voltage levels, which reduces the high leakage problem faced from majority gates that use linear input capacitors.
    Type: Grant
    Filed: April 20, 2022
    Date of Patent: April 23, 2024
    Assignee: KEPLER COMPUTING INC.
    Inventors: Amrita Mathuriya, Rafael Rios, Ikenna Odinaka, Darshak Doshi, Rajeev Kumar Dokania, Sasikanth Manipatruni
  • Patent number: 11961088
    Abstract: An embodiment of the present invention is directed to a Temporal CVV2 of CVV, which may be represented as a temporary three digit number generated using unique credentials associated with a card product. According to an embodiment of the present invention, the Temporal CVV2 may be generated for each transaction request or other defined set of transactions based on one or more factors, including time period/limit, usage, fraud/risk considerations. With this solution, a customer may request a new Temporal CVV2 each time a purchase is initiated. This may include online purchases, e-commerce transactions, manual link and provision requests, customer authentication for servicing channels, etc. An embodiment of the present invention seeks to mitigate risk and provide a safer and secure solution for customers while providing flexibility to make various purchases before a new card arrives.
    Type: Grant
    Filed: April 21, 2020
    Date of Patent: April 16, 2024
    Assignee: JPMORGAN CHASE BANK, N.A.
    Inventors: Sridhar Aravamudhan, Anishkumar C. Patel, Rajeev Kumar Balasubramanian, Brian P. Dunphe, David Christopher Carey, Jonathan Rosner, Shruti K. Patel, Deepak Joshi
  • Patent number: 11961877
    Abstract: A device includes, in a first region, a first conductive interconnect, an electrode structure on the first conductive interconnect, where the electrode structure includes a first conductive hydrogen barrier layer and a first conductive fill material. A trench capacitor including a ferroelectric material or a paraelectric material is on the electrode structure. A second dielectric includes an amorphous, greater than 90% film density hydrogen barrier material laterally surrounds the memory device. A via electrode including a second conductive hydrogen barrier material is on at least a portion of the memory device. A second region includes a conductive interconnect structure embedded within a less than 90% film density dielectric material.
    Type: Grant
    Filed: December 14, 2021
    Date of Patent: April 16, 2024
    Assignee: KEPLER COMPUTING INC.
    Inventors: Somilkumar J. Rathi, Noriyuki Sato, Niloy Mukherjee, Rajeev Kumar Dokania, Amrita Mathuriya, Tanay Gosavi, Pratyush Pandey, Jason Y. Wu, Sasikanth Manipatruni
  • Publication number: 20240121671
    Abstract: Methods, systems, and devices for wireless communication are described. A user equipment (UE) may receive a first control message indicating a set of mobility parameters associated with a lower layer handover procedure, which may be a layer 1 (L1)/layer 2 (L2) handover procedure. The UE may receive a second control message indicating a first or second reset procedure, which may each indicate a respective set of operating parameters for a higher layer than L1/L2 in the protocol stack. The UE may perform the lower layover handover procedure, which may include switching from a first serving cell to a second serving cell. The UE may perform the first or second reset procedure based on the switching, where the first reset procedure may include maintaining the operating parameters of the second serving cell, and the second reset procedure may include switching the operating parameters of the second serving cell.
    Type: Application
    Filed: October 11, 2022
    Publication date: April 11, 2024
    Inventors: Shanyu Zhou, Jelena Damnjanovic, Rajeev Kumar, Ozcan Ozturk
  • Patent number: 11955512
    Abstract: A device includes, in a first region, a first conductive interconnect, an electrode structure on the first conductive interconnect, where the electrode structure includes a first conductive hydrogen barrier layer and a first conductive fill material. A trench capacitor including a ferroelectric material or a paraelectric material is on the electrode structure. A second dielectric includes an amorphous, greater than 90% film density hydrogen barrier material laterally surrounds the memory device. A via electrode including a second conductive hydrogen barrier material is on at least a portion of the memory device. A second region includes a conductive interconnect structure embedded within a less than 90% film density dielectric material.
    Type: Grant
    Filed: December 15, 2021
    Date of Patent: April 9, 2024
    Assignee: Kepler Computing Inc.
    Inventors: Somilkumar J. Rathi, Noriyuki Sato, Niloy Mukherjee, Rajeev Kumar Dokania, Amrita Mathuriya, Tanay Gosavi, Pratyush Pandey, Jason Y. Wu, Sasikanth Manipatruni
  • Patent number: 11956677
    Abstract: Methods, systems, and devices for wireless communications are described. A user equipment (UE) may measure quality of experience (QoE) metrics and transmit a QoE report that is formatted to be readable by a base station, such that a base station may receive the QoE report and independently perform adjustments associated with the service being utilized by the UE. A UE may receive a configuration message that includes a first configuration for reporting QoE measurements to a base station and a second configuration for reporting QoE measurements to a QoE server. The UE may measure one or more QoE metrics in accordance with the configuration message, and generate a first report for the base station based on the QoE measurements and the first configuration. Upon generating the report, the UE may transmit the first report to the base station in accordance with the first configuration.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: April 9, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Shankar Krishnan, Xipeng Zhu, Rajeev Kumar, Gavin Bernard Horn
  • Patent number: 11955153
    Abstract: A configuration for efficiently placing a group of capacitors with one terminal connected to a common node is described. The capacitors are stacked and folded along the common node. In a stack and fold configuration, devices are stacked vertically (directly or with a horizontal offset) with one terminal of the devices being shared to a common node, and further the capacitors are placed along both sides of the common node. The common node is a point of fold. In one example, the devices are capacitors. N number of capacitors can be divided in L number of stack layers such that there are N/L capacitors in each stacked layer. The N/L capacitors are shorted together with an electrode (e.g., bottom electrode). The electrode can be metal, a conducting oxide, or a combination of a conducting oxide and a barrier material. The capacitors can be planar, non-planar or replaced by memory elements.
    Type: Grant
    Filed: March 15, 2022
    Date of Patent: April 9, 2024
    Assignee: Kepler Computing Inc.
    Inventors: Rajeev Kumar Dokania, Amrita Mathuriya, Debo Olaosebikan, Tanay Gosavi, Noriyuki Sato, Sasikanth Manipatruni