Patents by Inventor Randy B. Osborne

Randy B. Osborne has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5751951
    Abstract: A packet based data transmission system includes a flexible optimized nonocking transmit interface that incorporates optimized buffer modes, dynamic and static chaining, streaming and the utilization of small packet formats. Static chaining refers to connecting together the linked list for successive packets for the same transmit channel or virtual channel. Dynamic chaining refers to means by which the network interface performs this chaining automatically, thereby solving a blocking problem. On the transmit side, streaming refers to initiating the transmission of packet data before the entire packet data has been presented to the interface. This, in turn, permits more rapid recycling of the buffer space. On the receive side, streaming refers to initiating the processing of packet data before the entire packet has been received.
    Type: Grant
    Filed: October 30, 1995
    Date of Patent: May 12, 1998
    Assignee: Mitsubishi Electric Information Technology Center America, Inc.
    Inventors: Randy B. Osborne, John H. Howard, Ross T. Casley, Douglas J. Hahn
  • Patent number: 5745477
    Abstract: In an ATM network interface controller, a traffic management system is provided to allow implementation of available bit rate, or ABR, flow control by an external processor and the use of a new ABR controller within the traffic management system which provides functions that enable an external processor to control the flow control behavior of the network interface controller. The ABR controller accesses an external memory to control the flow of cells injected into the network. In one embodiment, the subject system uses a traffic shaper to control cell transmission rates, submits requests to an external memory which are processed by an external processor, and reads data from an external memory to adjust cell transmission rates and/or generates Resource Management, or RM, cells.
    Type: Grant
    Filed: January 25, 1996
    Date of Patent: April 28, 1998
    Assignee: Mitsubishi Electric Information Technology Center America, Inc.
    Inventors: Qin Zheng, Randy B. Osborne, John H. Howard
  • Patent number: 5732087
    Abstract: A switch for digital communication networks includes a queuing system cape of implementing a broad class of scheduling algorithms for many different applications and purposes, with the queuing system including both a tag-based primary queue which contain ATM cells organized by priority and a secondary queue which contains ATM cells which are not yet scheduled for transmission and which are organized by virtual channel. A queuing decision module is provided to determine in which queue an incoming ATM cell should be deposited. A requeuing module operates when an event occurs that unblocks a particular virtual channel. The requeuing module, on occurrence of such an event, accesses the secondary queue to obtain another cell, to assign it priority and to move it to the primary queue. The queuing decision module, along with a virtual channel table, can be used easily to block virtual channels when necessary. The combination of queues also allows for round robin scheduling.
    Type: Grant
    Filed: May 10, 1996
    Date of Patent: March 24, 1998
    Assignee: Mitsubishi Electric Information Technology Center America, Inc.
    Inventors: Hugh C. Lauer, Abhijit Ghosh, John H. Howard, Harufusa Kondoh, Randy B. Osborne, Chia Shen, Qin Zheng
  • Patent number: 5682553
    Abstract: A network interface using per-application free buffer lists includes a pat processor which processes an incoming message and stores packet data into free buffers designated for the application for which the message intended. The packet processor has memory storing an internal free buffer list. The internal free buffer list is loaded from an external free buffer list memory, which contains a free buffer list for each application. Each time a message arrives for a given application, the packet processor retrieves a portion of the external free buffer list for the application and loads the portion into the internal free buffer list. The portion which is loaded is a number of free buffers which is thought to be sufficient to handle an anticipated size of the incoming message. As a packet is processed, data are deposited in the buffers specified in the internal list.
    Type: Grant
    Filed: April 14, 1995
    Date of Patent: October 28, 1997
    Assignee: Mitsubishi Electric Information Technology Center America, Inc.
    Inventor: Randy B. Osborne