Abstract: An apparatus is provided which comprises: a cavity made in a substrate of a printed circuit board (PCB); a plurality of solder balls embedded in the cavity; and a horizontal trace within the substrate, wherein the horizontal trace is partially directly under the plurality of solder balls and is coupled to the plurality of solder balls and another trace or via in the substrate such that a substrate region under the plurality of solder balls is independent of a stop layer under the cavity.

Abstract: Disclosed herein are integrated circuit (IC) package supports and related apparatuses and methods. For example, in some embodiments, an IC package support may include a non-photoimageable dielectric, and a conductive via through the non-photoimageable dielectric, wherein the conductive via has a diameter that is less than 20 microns. Other embodiments are also disclosed.

Abstract: The invention relates to the treatment of various injuries, disorders, dysfunctions, diseases, and the like of the brain with MAPCs, particularly in some aspects, to the treatment of the same resulting from hypoxia, including that caused by systemic hypoxia and that caused by insufficient blood supply. In some further particulars the invention relates, for example, to the treatment of hypoxic ischemic brain injury with MAPCs, in children for example, and to the treatment of cortical infarcts and stroke with MAPCs in adults, for example.

Abstract: A refill assembly (129) for use in a medicinal inhaler (100). The refill assembly includes a patient port (110), and an adapter (118) configured to cause a dose of medicament to be released. The adapter is movable between a first position in which a dose of medicament is not released and a second position in which a dose of medicament is released. The refill assembly further includes a lockout mechanism positioned to lock the adapter in its first position, and a lockout override actuator (223). The lockout override actuator is movable between a first position in which the lockout mechanism is in a first locked state, and a second position in which the lockout mechanism is in a second unlocked state and the adapter is movable from its first position to its second position even when the refill assembly is not coupled to a reusable assembly.

Abstract: An ophthalmic irrigator-aspirator has a handpiece with aspiration and irrigation openings through its distal end. A tip component connects to the handpiece and has an aspiration cannula. A flexible sleeve has an annular hub for watertight connection to the handpiece or a base portion of the tip. The sleeve has an intermediate portion that forms a channel for an irrigation fluid along the exterior of the cannula to an irrigation port in the sleeve. The distal end portion of the sleeve is sized for a watertight connection over the distal portion of the cannula. Such distal end portion of the sleeve has an aspiration port in communication with the cannula aspiration port. The sleeve proximate, intermediate, and distal portions are integral with each other and are formed of a resilient material that allows the sleeve to be tightly fitted on the handpiece or tip base portion and the cannula.

Abstract: Embodiments include an electronic package with an embedded multi-interconnect bridge (EMIB) and methods of making such packages. Embodiments include a first layer, that is an organic material and a second layer disposed over the first layer. In an embodiment, a cavity is formed through the second layer to expose a first surface of the first layer. A bridge substrate is in the cavity and is supported by the first surface of the first layer. Embodiments include a first die over the second layer that is electrically coupled to a first contact on the bridge substrate, and a second die over the second layer that is electrically coupled to a second contact on the bridge substrate. In an embodiment the first die is electrically coupled to the second die by the bridge substrate.

Abstract: Methods/structures of forming embedded inductor structures are described. Embodiments include forming a first interconnect structure on a dielectric material of a substrate, selectively forming a magnetic material on a surface of the first interconnect structure, forming an opening in the magnetic material, and forming a second interconnect structure in the opening. Build up layers are then formed on the magnetic material.

Abstract: The invention relates to the treatment of various injuries, disorders, dysfunctions, diseases, and the like of the brain with MAPCs, particularly in some aspects, to the treatment of the same resulting from hypoxia, including that caused by systemic hypoxia and that caused by insufficient blood supply. In some further particulars the invention relates, for example, to the treatment of hypoxic ischemic brain injury with MPACs, in children, for example, and to the treatment of cortical infarcts and stroke with MAPCs in adults, for example.

Abstract: An apparatus, comprising a substrate comprising a dielectric, a conductor, comprising a via embedded within the dielectric, the via has a first end and a second end, and substantially vertical sidewalls between the first end and the second end, and a conductive structure extending laterally from the first end of the via over the dielectric, wherein the via and the conductive structure have a contiguous microstructure.

Abstract: Disclosed herein are integrated circuit (IC) package supports and related apparatuses and methods. For example, in some embodiments, an IC package support may include a non-photoimageable dielectric, and a conductive via through the non-photoimageable dielectric, wherein the conductive via has a diameter that is less than 20 microns. Other embodiments are also disclosed.

Abstract: The invention relates to the treatment of various injuries, disorders, dysfunctions, diseases, and like of the brain with MAPCs, particularly in some aspects, to the treatment of the same resulting from hypoxia, including that caused by systemic hypoxis and that caused by insufficient blood supply. In some further particulars the invntion relates, for example, to the treatment of hypoxic ischemic brain injury with MAPCs, in children, for example, and to the treatment of cortical infants and stroke with MAPCs in adults, for example.

Abstract: An apparatus is provided which comprises: a cavity made in a substrate of a printed circuit board (PCB); a plurality of solder balls embedded in the cavity; and a horizontal trace within the substrate, wherein the horizontal trace is partially directly under the plurality of solder balls and is coupled to the plurality of solder balls and another trace or via in the substrate such that a substrate region under the plurality of solder balls is independent of a stop layer under the cavity.

Abstract: Techniques that can assist with fabricating a semiconductor package that includes a zero misalignment-via (ZMV) and/or a trace formed using a polarization process are described. The disclosed techniques can result in creation of ZMVs and/or traces between the ZMVs using a process comprising application of polarized light to one or more resist layers (e.g., a photoresist layer, etc.). One embodiment of a technique includes modulating an intensity of light applied to one or more resist layers by interaction of a light source with a photomask and at least one polarizer such that one or more patterns are created on the one or more resist layers. One embodiment of another technique includes creating patterns on one or more resist layers with different types of polarized light formed from a photomask and at least one polarizer. The disclosed techniques can assist with reducing manufacturing costs, reducing development time, and increasing I/O density.

Abstract: Techniques that can assist with fabricating a package layer that includes a plurality of dual-damascene zero-misalignment-vias (dual-damascene ZMVs) and a trace between the dual-damascene ZMVs are described. The disclosed techniques allow for the dual-damascene ZMVs and their corresponding trace to be plated simultaneously in a single step or operation. As such, there is little or no misalignment between the dual-damascene ZMVs, the trace, and the metal pads connected to the ZMVs. In this way, one or more of the embodiments described herein can assist with reducing manufacturing costs, reducing development time of fabricating a package layer, and with increasing the I/O density in a semiconductor package.

Abstract: An apparatus, comprising a substrate comprising a dielectric, a conductor, comprising a via embedded within the dielectric, the via has a first end and a second end, and substantially vertical sidewalls between the first end and the second end, and a conductive structure extending laterally from the first end of the via over the dielectric, wherein the via and the conductive structure have a contiguous microstructure.

Abstract: A suspension strut including an air spring unit and a damper unit that are aligned on a common axis is disclosed. The air spring unit includes a rolling tube having a flared terminal end that extends over a damper tube associated with the damper unit. The damper tube has a circumferential groove formed in an outer diameter of the damper tube. A retaining ring has a greater outer diameter than the outer diameter of the damper tube and is positioned in the circumferential groove. A base has an inner diameter less than the outer diameter of the retaining ring, and an outer diameter smaller than the predetermined diameter of the flared free end, and is supported on the retaining ring. A torsion element fits around the damper tube and within the flared free end.

Abstract: Methods/structures of forming embedded inductor structures are described. Embodiments include forming a first interconnect structure on a dielectric material of a substrate, selectively forming a magnetic material on a surface of the first interconnect structure, forming an opening in the magnetic material, and forming a second interconnect structure in the opening. Build up layers are then formed on the magnetic material.

Abstract: A power supply control system includes a power supply controller configured to selectively supply electrical power to a venue; and a booking controller located remotely from the venue, the booking controller configured to maintain third party booking information, wherein the power supply controller is configured to control the supply of electrical power based on the third party booking information. A power supply controller and booking controller for the power supply control system are also provided.

Abstract: A patch structure of an integrated circuit package comprises a core having a first side facing downwards and a second side facing upwards. A first solder resist (SR) layer is formed on the first side of the core, wherein the first SR layer comprises a first layer interconnect (FLI) and has a first set of one or more microbumps thereon to bond to one or more logic die. A second solder resist (SR) layer is formed on the second side of the core, wherein the second SR layer has a second set of one or more microbumps thereon to bond with a substrate. One or more bridge dies includes a respective sets of bumps, wherein the one or more bridge dies is disposed flipped over within the core such that the respective sets of bumps face downward and connect to the first set of one or more microbumps in the FLI.

Abstract: A foundation layer and methods of forming a conductive via are described. A die pad is formed over a die. A seed layer is deposited over the die pad and the foundation layer. A first photoresist layer is deposited over the seed layer, and the first layer is patterned to form a conductive line opening over the die pad. A conductive material is deposited into the conductive line opening to form a conductive line. A second photoresist layer is deposited over the first layer, and the second layer is patterned to form a via opening over the conductive line. The conductive material is deposited into the via opening to form the conductive via, where the conductive material only deposits on portions of exposed conductive line. The second and first layers are removed. Portions of exposed seed layer are recessed, and then a top surface of the conductive via is exposed.